{
  "schemaVersion": "1.4",
  "revision": "2026-09-10",
  "language": "en",
  "classification": "Public",
  "title": "NVM Technology Atlas",
  "intro": {
    "schemaVersion": "1.0",
    "revision": "2026-09-10",
    "title": "NVM Technology Atlas",
    "subtitle": "IP Cells, Technology Lineage, Processes and Device Physics",
    "audience": "Readers studying nonvolatile-memory IP, storage mechanisms and process integration",
    "pov": "Neutral educational content and public-source research from the NVM Knowledge Hub",
    "classification": "Public",
    "intro": "Choose a topic to explore IP cell principles, technology lineage, foundry processes or storage physics. Each study connects diagrams and operating conditions to public sources.",
    "scope": "Named OTP, MTP, eFlash, MRAM and ReRAM IP studies are one section of this reference library. Sixteen physical-family and standalone-component topics, comparisons, patents and foundry milestones provide related context. Product history and demonstrated cell mechanisms are tracked separately.",
    "axes": [
      {
        "title": "Storage Physics",
        "body": "Charge, conductive structure, magnetization, ion distribution, crystal phase and polarization determine the physical mechanism. OTP is not one physics: floating-gate OTP stores charge; AntiFuse OTP forms a dielectric path. Study conventional standalone EEPROM separately from embedded MTP IP; within MTP IP, distinguish foundry double-poly EEPROM and third-party single-poly routes. NOR and NAND still describe array organization."
      },
      {
        "title": "Commercial Maturity",
        "body": "Volume production, completed qualification, research demonstrations, and development plans must be tied to a named company, process node, version, and application. Finding one MRAM product in volume production does not establish the same maturity for every SOT-MRAM implementation."
      },
      {
        "title": "System Role",
        "body": "SCM describes an application role that addresses the gap between memory and storage; it is not another bitcell type. Application, access semantics, persistence through power loss, and current supply status must be explained separately."
      }
    ],
    "families": [
      {
        "id": "irreversible",
        "title": "Irreversible Structures",
        "state": "Breaking or forming a conductive path, including eFuse and AntiFuse OTP",
        "topics": [
          "efuse",
          "antifuse"
        ]
      },
      {
        "id": "charge",
        "title": "Charge Storage",
        "state": "Charge shifts the threshold voltage, including one-time floating-gate OTP as well as rewritable EEPROM, MTP and Flash",
        "topics": [
          "eeprom",
          "mtp",
          "nor",
          "sonos",
          "nand"
        ]
      },
      {
        "id": "magnetic",
        "title": "Magnetism",
        "state": "Magnetization direction changes resistance",
        "topics": [
          "toggle",
          "stt",
          "sot"
        ]
      },
      {
        "id": "resistive",
        "title": "Resistive Switching",
        "state": "Ions and defects change conduction",
        "topics": [
          "vcm",
          "ecm"
        ]
      },
      {
        "id": "phase",
        "title": "Phase Change",
        "state": "Resistance contrast between crystalline and amorphous states",
        "topics": [
          "pcm"
        ]
      },
      {
        "id": "ferroelectric",
        "title": "Ferroelectricity",
        "state": "Polarization changes charge or conduction",
        "topics": [
          "feram",
          "fefet",
          "ftj"
        ]
      }
    ],
    "reading": [
      {
        "title": "Compare the Two OTP Storage Events",
        "body": "Read NeoBit and NeoFuse side by side: stored floating-gate charge versus altered gate-dielectric transport."
      },
      {
        "title": "Trace PGM, Erase and Repeated Updates",
        "body": "MTP describes the ability to program more than once. The floating-gate IP lessons compare named PGM/ERS mechanisms; MRAM and ReRAM remain in emerging-NVM categories, while Flash/SONOS retain their own structures. Read each reverse-update operation and its subsequent write. YMC product evidence is separate from the independent CHI/BBHH teaching example."
      },
      {
        "title": "Follow Magnetic and Resistive IP Cells",
        "body": "Trace STT switching and sensing, then compare oxygen-related and metallic-path ReRAM SET/RESET."
      },
      {
        "title": "Return to Physics and Integration When Needed",
        "body": "Use the background topics for device, array, process and system limits. Standalone products provide context rather than the main learning path."
      }
    ],
    "evidenceRules": [
      "Supplier disclosures, datasheets, papers, patents, and editorial inferences serve different purposes. Source categories are not steps on a maturity ladder from weak to strong.",
      "Every performance value must retain its device, capacity, temperature, granularity, test method, and source. Leave undisclosed values as gaps; do not combine the best numbers from unrelated implementations. Public literature and architecture-class pairings are kept as a separate source class: it does not quote unpublished file pages, and it is not a current-macro shipment spec.",
      "A patent supports the disclosure and interpretation of its claims. The assignee alone does not establish that the company's production process uses the same structure.",
      "A technology ceiling describes the principal constraints and trade-offs of current designs. Without sufficient evidence, do not present an engineering limitation as a permanent physical limit."
    ],
    "sources": [
      {
        "id": "INTRO-COURSE",
        "label": "Shimeng Yu: Lecture Six, Emerging NVM, Part One",
        "url": "https://www.youtube.com/watch?v=_Ov2KUZTIv8",
        "kind": "University Course",
        "locator": "2021 course; comparison table at approximately 36:05–43:49, SCM at approximately 50:08, and arrays at approximately 1:00:04",
        "date": "2021; accessed 2026-09-10",
        "limit": "This page independently organizes the material and redraws the operating principles; it does not reproduce the complete lecture deck. Automatic captions cannot replace the original technical material."
      },
      {
        "id": "INTRO-2016",
        "label": "Yu and Chen: Emerging Memory Technologies—Recent Trends and Prospects",
        "url": "https://asu.elsevierpure.com/en/publications/emerging-memory-technologies-recent-trends-and-prospects",
        "kind": "Peer-Reviewed Review",
        "locator": "IEEE Solid-State Circuits Magazine 8(2), 43–56; DOI 10.1109/MSSC.2016.2546199",
        "date": "2016",
        "limit": "A historical comparison baseline. Additions to the 2021 course and commercial status in 2026 are identified separately."
      },
      {
        "id": "INTRO-IRDS",
        "label": "IEEE 2024 IRDS: Beyond CMOS and Emerging Research Materials",
        "url": "https://irds.ieee.org/images/files/pdf/2024/2024IRDS_BC.pdf",
        "kind": "Technology Roadmap Assessment",
        "locator": "Sections 2 and 2.5",
        "date": "2024",
        "limit": "Technology assessments and targets do not establish volume production of named products or a ranking under common measurement conditions."
      }
    ],
    "terminology": "In the course, eNVM means emerging nonvolatile memory. In foundry terminology, eNVM usually means embedded nonvolatile memory. The shared abbreviation does not make the two terms interchangeable."
  },
  "topics": [
    {
      "id": "efuse",
      "title": "eFuse: Permanent Conductance Programming",
      "family": "One-Time Programming / Conductor Structure Change",
      "storage": "A bit is stored as a difference in the resistance of a conductive path. An unprogrammed fuse typically has low resistance; a controlled current causes material migration or a break in a designated region, producing higher resistance. Logic 0/1 is defined by sensing and encoding. High resistance does not intrinsically correspond to a particular bit value, and the programmed state must not be assumed to be an ideal open circuit.",
      "structure": "A polysilicon/silicide fuse has a narrow link between end contacts. A metal-via implementation places the region intended to change near an interconnect layer and via. Its equivalent circuit is a resistor whose state can change permanently, in series with a select or programming transistor and connected to a read sensor. Link dimensions, heat-flow paths, via placement, and peripheral drivers must be shown together; a broken line alone is insufficient.",
      "summary": "eFuse is suited to permanently storing small amounts of on-chip configuration, such as trim codes, repair addresses, and identification data. One-time programming means that each physical location supports an effective transition in only one irreversible direction; separate locations can be programmed in batches. Multiple programming commands to a macro do not make an individual fuse reversibly erasable and rewritable.",
      "maturity": {
        "stage": "Identified Implementation",
        "claim": "IBM's 2007 technology review describes eFUSE evolution from 180 nm to 45 nm and applications in memory redundancy, chip identification, and analog trimming, establishing implementations in identified processes. This material also uses IBM and TSMC patents to explain polysilicon/silicide and metal-via structures.",
        "sourceIds": [
          "ch-maturity-ibm-efuse",
          "ch-pat-efuse-poly",
          "ch-pat-efuse-via"
        ],
        "limit": "The reviewed historical abstract does not enumerate product models or shipment volumes, so no named volume-production product is invented. A patent also does not establish that the same fuse macro can be used in any current TSMC node. Adoption requires qualification evidence for the specified process and IP version.",
        "implementationStage": "Longstanding Implementations in Identified Processes"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Concentrate Current in a Controlled Region",
          "before": "The conductor still has a continuous low-resistance path. The select transistor has not initiated programming, and the read bias is insufficient to induce the intended permanent material change.",
          "stimulus": "Enable the selected driver and apply a programming current calibrated for both the device and pulse duration; keep unselected paths isolated. No process-independent voltage or current is specified here.",
          "after": "A high-resistance path forms at the narrowed region or near the via. Post-program sensing verifies that resistance has crossed the decision boundary, while allowing for residual conduction and drift over time.",
          "explanation": "Carriers travel along the conductor, while local current density and Joule heating increase the rate of material migration. US7417300B2 uses a narrowed geometry to control current crowding and address material backflow; US8847350B2 shapes current concentration through via contact placement. The teaching focus is permanent material redistribution and the final resistance distribution, rather than describing every mechanism as metal rupture."
        },
        {
          "id": "erase",
          "title": "Erase: No Reverse Recovery in Normal Operation",
          "before": "The programmed conductor has material depletion, voids, or a changed conduction path. This is a structural state, not stored charge that can be moved back by changing a gate bias.",
          "stimulus": "There is no specified normal electrical erase pulse that reconstructs the original low-resistance path. Additional high current may cause new damage and must not be treated as a RESET operation.",
          "after": "The original location remains consumed. If an application must modify logical data, the design must use reserved fresh locations, version encoding, or another rewritable memory.",
          "explanation": "Changing the data encoding or activating spare locations can change the information read by the system, but it does not restore the original fuse material. The number of available updates depends on reserved capacity and the protocol, not on the program/erase endurance of one bit. Test flows must also reserve sacrificial test cells rather than treating irreversible programming as a repeatedly recoverable functional test."
        },
        {
          "id": "read",
          "title": "Read: Measure Resistance Without Reprogramming",
          "before": "The selected fuse lies in either the low-resistance or programmed high-resistance distribution. The sensor has a reference current, reference resistance, or voltage decision threshold.",
          "stimulus": "Establish a current path under read conditions far below the programming stress. The selector connects the specified fuse, and sensing measures current magnitude or a node's charging/discharging rate.",
          "after": "The low-resistance path conducts more readily than the high-resistance path. The sensor outputs the encoded bit, without requiring a change to the stored state during normal reading.",
          "explanation": "The required guarantee is that the high- and low-resistance distributions remain distinguishable across temperature, process variation, and time in service. Programmed resistance is not infinite, and unprogrammed resistance is not zero; series resistance from the select transistor and wiring affects the result. The readout must therefore be analyzed with its reference path, rather than judging read reliability solely from a gap in a microscope image."
        }
      ],
      "selection": "A transistor typically selects the cell's programming and read paths. The programming driver must withstand the pulse current, and supply or wiring drops must not leave distant cells underprogrammed; unselected cells must avoid additional stress on shared lines. A small fuse link therefore does not guarantee a small complete macro once drivers, sensing, and wiring are included.",
      "variability": "Fuse width, silicide or metal thickness, via overlap, and the thermal environment change local current density. Programming pulses then translate those differences into a post-program resistance distribution. Measure the distributions before programming, after programming, after thermal treatment, and after read-life stress; examine material backflow, residual paths, and reference-sensing drift rather than reporting only an average programming success rate.",
      "advantages": [
        "A permanently retained physical state suits trim, identification, and repair settings that do not require reversal.",
        "Implementations can use appropriate polysilicon/silicide or metal-interconnect structures, allowing selection to match the available process.",
        "Readout can be reduced to resistance or current comparison and integrated with logic that loads configuration at power-up."
      ],
      "tradeoffs": [
        "The same physical location cannot be erased in normal operation; field updates require reserved locations and data-validity encoding.",
        "Programming current, supply drops, and select-transistor area may dominate the complete macro cost.",
        "Post-program resistance and long-term drift must be controlled; permanence must not be equated directly with security protection or unlimited retention."
      ],
      "ceilings": {
        "device": "The physical limit is the window for reproducible material change: too little stress produces overlapping resistance distributions, while too much may damage neighboring structures. Any local geometry improvement must be demonstrated through sensing margin across process corners and after aging. No single minimum linewidth or programming current applies to every material.",
        "array": "Larger arrays require more decoding, programming-drive, and sensing resources. An individual resistor may shrink, but line drop, selected-cell isolation, reference matching, and test redundancy do not disappear with it. Effective density should be calculated as the number of reliable deliverable bits divided by the area of the complete macro.",
        "process": "Fuse materials and contacts must comply with the baseline process's thermal budget, interconnect reliability requirements, and layout rules. Deliberately induced local migration must not propagate into ordinary wiring failure. Via placement and neighboring structures are part of process integration and cannot be signed off through logic simulation alone.",
        "system": "System limits include remaining programmable locations, the cost of irreversible misprogramming, and the supply's pulse capability. If many data updates are required, additional encoding and redundancy progressively consume capacity. Permanent records still require access permissions, fault handling, and update-transaction integrity."
      },
      "fit": "Suitable for chip identification, analog trimming, manufacturing repair, and permanent options when programming is infrequent and the data lifecycle can be defined in advance. Before selecting it, establish the latest programming point, whether field appends are needed, the reserved bit count for each field, and whether the platform can provide the specified programming pulses and verification.",
      "avoid": "Not suitable as a direct store for frequently rewritten counters, logs, or user settings that must be freely reversible. Low-cost, large-capacity updatable storage requires comparison of complete macro and management costs. The word Fuse also does not make a resettable electronic fuse IC for power protection equivalent to this memory cell.",
      "patents": [
        {
          "id": "US7417300B2",
          "url": "https://patents.google.com/patent/US7417300B2/en",
          "priority": "2006-03-09",
          "assignee": "IBM; checked against bibliographic and assignment records",
          "figures": "Figures 3 and 4A; claim 1",
          "problem": "Programming location and material backflow in a polysilicon/silicide fuse may leave resistance too low or unstable. The design must concentrate current density at an intended location while controlling the remaining post-program path so that the sensor can reliably distinguish the two states.",
          "mechanism": "Local narrowing within the fuse body changes current-crowding and material-migration conditions. When reading Figures 3 and 4A, first trace where current enters the narrowed region from the contacts, then examine how silicide migration, residual polysilicon, and material backflow affect programmed resistance.",
          "claimReading": "Claim 1 defines a combination through specific fuse geometry and structural relationships. Map each actual limitation onto the drawings. An eFuse that uses electromigration is only a technology category; that description does not replace reading the claim's narrowing, terminal, and relative-position requirements.",
          "limit": "This is a lesson on an engineering problem and structure. Patent-family deduplication, validity, legal status, and freedom-to-operate analysis have not been completed, nor has any current IBM product been shown to require this implementation."
        },
        {
          "id": "US8847350B2",
          "url": "https://patents.google.com/patent/US8847350B2/en",
          "priority": "2012-08-30",
          "assignee": "Taiwan Semiconductor Manufacturing Company; checked against the initial 2012 assignment record",
          "figures": "Figures 1 and 5A; claim 1",
          "problem": "Inadequate concentration of current in a metal/via structure can constrain the programming window and required current. Material movement must also avoid unintended conduction to neighboring structures. The problem spans interconnect geometry, the programmable region, and driver capability.",
          "mechanism": "A via that lands partly on the fuse, together with interconnects running in different directions, creates a region of local current concentration. Figure 1 identifies the upper and lower metals and the via; Figure 5A traces the complete current path from the select or programming transistor to the fuse.",
          "claimReading": "Claim 1 centers on a specific arrangement of interconnects, the fuse, and the via contact region. Mark the via's partial overlap and its effect on the current path when reading it. The label metal fuse does not capture all of the patent's concrete limitations.",
          "limit": "The patent supplies neither universal process design rules nor production reliability data. Publication alone is not used here to infer IP availability at a particular node, an actual license scope, or an infringement relationship."
        }
      ],
      "sourceIds": [
        "ch-pat-efuse-poly",
        "ch-pat-efuse-via",
        "ch-maturity-ibm-efuse"
      ],
      "quiz": {
        "question": "If an OTP macro allows ten data appends, does each eFuse have ten program/erase cycles of endurance?",
        "answer": "No. The appends may use ten groups of previously unprogrammed locations and version encoding; each fuse still supports only one irreversible transition. Record the system's update count, the capacity consumed per update, and the rewritability of an individual physical cell separately."
      }
    },
    {
      "id": "antifuse",
      "title": "Antifuse: Permanent Conduction Through Dielectric Breakdown",
      "family": "One-Time Programming / Dielectric Conduction Path",
      "storage": "Before programming, the storage dielectric separates two electrodes and permits only very small leakage. Programming creates a permanent, detectable conduction path through a high electric field. Information resides in the conduction difference before and after breakdown, opposite to the typical eFuse transition from low to high resistance. Both can provide OTP, but their storage materials and programming conditions differ.",
      "structure": "The teaching embodiment in US6667902B2 places a thin-dielectric storage element in series with a select transistor. The column line connects to one side of the storage element; the other side reaches the source line through the selected channel, while the row line controls the select gate. The equivalent circuit combines a dielectric element that changes from low leakage to conduction with a MOS device for current control and isolation. The storage layer must not be drawn as an ordinary gate-controlled switch.",
      "summary": "Antifuse design aims to establish acceptable conduction first in a designated storage dielectric while keeping selectors, peripheral circuits, and half-selected cells functional; it does not rely on uncontrolled breakdown across the chip. Permanent data can support identification, trimming, code, or key storage. Security is separately determined by the readout interface, access controls, and protective design.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Synopsys' 2018 acquisition statement identifies Kilopass antifuse 1T/2T IP, including XPM, Gusto, and SecretCode, and reports aggregate cumulative shipments exceeding 10 billion units. The current OTP page separately lists advanced-node silicon validation and specific automotive qualifications, indicating continued commercial availability.",
        "sourceIds": [
          "ch-maturity-kilopass",
          "ch-maturity-otp-current"
        ],
        "limit": "The historical shipment figure is an aggregate manufacturer statement and cannot be assigned to an individual macro or the 3 nm node. Silicon validation is not volume production, and N5A/N7A automotive qualifications are not common qualifications for every product.",
        "implementationStage": "Identified OTP IP with Volume-Production Shipments"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Apply the Breakdown Field Only to the Selected Dielectric",
          "before": "The storage dielectric is intact and the selected bit has low leakage. Other cells in the same row and column must remain unprogrammed.",
          "stimulus": "In the early embodiment of US6667902B2, Figures 1/8 use a 2.5 V row-select line, a 0 V source line, and a 7 V selected column line. These values apply only to that structure and period, not to current product operation.",
          "after": "The thin dielectric develops detectable conduction. Program verification checks whether current reaches the specified window, rather than mistaking a slight leakage increase for sufficient programming.",
          "explanation": "The selected MOS provides a path that establishes a storage-layer field between the high-potential column line and a low-potential internal node. Programming is dielectric breakdown of the core-device gate oxide: Vpgm is set by that process oxide thickness and the allowed time-to-breakdown, typically several times core Vdd, not a node-independent 2.8–3.5 V. Public Kilopass teaching places program voltage near 8–9 V for a ~32 Å oxide and 5–6 V for ~20 Å. A named foundry example separately shows that a 1.8 V core must survive program stress well above Vdd; that is evidence of the stress class, not a universal Vpgm. This path is not I/O floating-gate hot-carrier injection, whose program window follows the I/O device (about 6.5 V PGM on 3.3 V PMOS and 7.5 V on 5 V PMOS; an NMOS floating-gate cell at the same node needs a higher Vpgm). That I/O FG HCI pairing is public literature / architecture-class and must not be back-filled onto oxide-breakdown AntiFuse. Current must be controlled to protect the selector. Evolution from soft breakdown to stronger conduction is a distributed process, not the formation of an ideal metal wire with identical dimensions and resistance in every cell."
        },
        {
          "id": "erase",
          "title": "Erase: No Repair of the Broken-Down Dielectric in Normal Operation",
          "before": "Permanent defects and a conduction path have changed the dielectric's insulating state.",
          "stimulus": "There is no normal erase operation that fully reconstructs the original dielectric with reverse bias. Repeated high-field stress may worsen damage or change current and cannot be treated as qualified reverse programming.",
          "after": "The physical location remains programmed. Appending or correcting application data must consume a fresh location or use a separate rewritable storage region.",
          "explanation": "Resistive memories that also contain conductive paths may perform SET/RESET through controlled ion migration; antifuse OTP does not provide a product operating contract for reversible recovery. The ability to draw a conductive filament in both devices does not make their endurance, operating directions, or array requirements equivalent."
        },
        {
          "id": "read",
          "title": "Read: Distinguish an Intact Dielectric from a Conductive Path",
          "before": "An unprogrammed cell retains low leakage, while a programmed cell passes more current. The same selector and wiring participate in the actual readout.",
          "stimulus": "In the early patent example above, the row line remains at 2.5 V, the selected column line changes to 1.5 V, and the source line is at 0 V. Read stress is lower than the programming condition.",
          "after": "Current flows from the column line through the established dielectric path and selected MOS to the source line. The sensor compares its magnitude and outputs a bit; an unprogrammed cell does not produce the same effective current.",
          "explanation": "The read criterion is the current distribution of each state under the actual read bias. Selector threshold, series resistance, dielectric leakage, and variation in programmed conduction all affect margin. Validate these over the specified temperature and time conditions rather than treating one high-current measurement immediately after programming as sufficient evidence of lifetime read reliability."
        }
      ],
      "selection": "A selected cell needs both a high column potential and a select path that establishes the low-side potential. Cells in the same row but another column, the same column but another row, and fully unselected cells see different fields, so each category needs its own bias table. Isolation requires more than turning off a row line. High-voltage level shifting, well isolation, and current limiting together allow the storage layer to break down before other devices are damaged.",
      "variability": "Dielectric thickness, local defects, area, and field distribution produce statistical distributions of breakdown time and post-breakdown current. Research should report pulse amplitude/duration, current compliance, initial leakage, and the post-program verify threshold together, and examine accumulated half-select stress. Comparing typical programming voltage alone cannot establish yield or sensing margin.",
      "advantages": [
        "Permanent conduction provides one-time-programmable storage for identification and trim data written after manufacturing.",
        "Identified commercial IP is available in standard logic CMOS processes, although each process version still requires confirmation.",
        "Topologies such as 1T and 2T offer tradeoffs among capacity, area, selection capability, and operating conditions."
      ],
      "tradeoffs": [
        "No normal erase is available; misprogramming recovery and appended updates require reserved capacity and encoding from the outset.",
        "Programming depends on dielectric-breakdown distributions and requires high-field peripheral circuits, current limiting, and post-program sensing verification.",
        "Physical immutability does not imply that data cannot be read out. Security applications still need a separate threat model and product evidence."
      ],
      "ceilings": {
        "device": "The usable window lies between reliably establishing sufficient conduction and avoiding unintended damage. Reducing storage area or changing the dielectric does not necessarily improve breakdown statistics and programmed current proportionally. Limits should be described by complete distributions, specified temperatures, and long-term sensing margin.",
        "array": "Density is jointly limited by selectors, high-voltage decoding, half-select isolation, wiring drops, and sensors. Theoretical cell area is not a substitute for complete macro efficiency. As an array grows, additional unselected leakage and accumulated programming stress must enter its failure-rate budget.",
        "process": "Availability in standard CMOS does not remove the need for qualification. A core-device gate-oxide AntiFuse works only when the storage oxide can form a controlled conduction path before the source/drain junction avalanches. That window typically opens on 1.8 V-class and thinner core oxides and continues into advanced logic; a 2.5 V-class thicker oxide often reaches junction breakdown first, so the bitcell fails before a usable antifuse path forms. Controlled breakdown of the storage dielectric, selector voltage tolerance, thick/thin oxide choices, and reliability tests must be reconfirmed for the foundry process version. Success at one node does not establish usable pulses at another.",
        "system": "System bottlenecks often include the irreversible programming flow, remaining blank bits, and supply conditions during programming. For keys or boot settings, programming permissions, read isolation, lock state, and fault recovery must be validated separately from the storage physics. The OTP label does not replace system design."
      },
      "fit": "Suitable for parameters determined after manufacturing and intended to remain permanent, chip IDs, code with a defined lifecycle, and security settings. Selection starts with the required update count, latest programming location, supply, read timing, and capacity, followed by verification of the identified macro's process, test modes, and qualifications.",
      "avoid": "Not suitable for unrestricted repeated overwrites without a redundancy plan. A system that must directly overwrite the same address or restore an old value should use electrically erasable storage or an upper-layer protocol for a bounded number of appends. High-field test results must not be equated with production yield or resistance to invasive attacks.",
      "patents": [
        {
          "id": "US6667902B2",
          "url": "https://patents.google.com/patent/US6667902B2/en",
          "priority": "2001-09-18",
          "assignee": "Kilopass Technology; checked against the initial assignment and continuation relationships",
          "figures": "Figures 1, 3, and 8; additional embodiments in Figures 12–15",
          "problem": "Using ultrathin dielectric breakdown as readable memory requires sufficient conduction in selected cells while avoiding half-select misprogramming, selector damage, and excessive post-breakdown current. The ability to break down an individual device does not establish a reliable array.",
          "mechanism": "A half-transistor storage element works with a select transistor. Row-, column-, and source-line biases establish a high field across the storage dielectric. Reading lowers the column bias and distinguishes states through post-breakdown current; the figures show alternative cell and array arrangements.",
          "claimReading": "Map the storage dielectric, its electrodes, and the select path onto the claim limitations, then use the Figure 1/8 biases to verify the selected path. The 7 V embodiment value is not the entire inventive concept, and half-select protection must not be omitted when describing the design as a breakdown-capable capacitor.",
          "limit": "This patent supplies an early mechanism and bias lesson. The structures, voltage tolerance, verification algorithms, and qualifications of current Kilopass/Synopsys 1T or 2T IP require separate evidence and are not established directly by this patent."
        }
      ],
      "sourceIds": [
        "ch-pat-antifuse",
        "ch-pat-kilopass-vpp-tox",
        "ch-ememory-neofuse-9v-2016",
        "ch-pat-pmos-otp-6678190",
        "ch-pat-io-nvm-6920067",
        "ch-eetimes-neobit-2003",
        "ch-author-pmos-io-pgm",
        "ch-pat-pmos-vs-nmos-5761121",
        "ch-maturity-kilopass",
        "ch-maturity-otp-current"
      ],
      "quiz": {
        "question": "Why is reducing the gate voltage of an unselected row insufficient to prove that an entire antifuse array is immune to half-select misprogramming?",
        "answer": "Cells sharing a column or row, and internal floating nodes, can develop different storage-layer fields. Turning off a select MOS does not hold every node at zero potential. Each category's bias, leakage, and accumulated stress must be evaluated and then validated with the specified pulse sequence."
      }
    },
    {
      "id": "eeprom",
      "title": "Conventional Standalone EEPROM: Local Windows and Fine Updates",
      "family": "Charge Storage / Standalone Device / Electrical Erase",
      "storage": "A floating gate is a conductive island surrounded by insulating layers, with no direct DC metal connection to it. Retained charge changes how the control gate acts on the channel, shifting the MOS threshold voltage. In a typical n-channel example, adding electrons makes conduction more difficult. Reading measures the channel; normal read operation does not require draining the stored electrons.",
      "structure": "The teaching cross-section contains source, drain, channel, a localized thin tunneling window, floating gate, inter-gate dielectric, and control gate, with a selection function isolating unselected paths. US4115914A explains the local window and capacitive coupling; it is not a teardown of a current serial EEPROM.",
      "summary": "This topic covers conventional standalone EEPROM: the array, voltage boosting, controller, and interface are packaged as a separate device accessed through a serial or parallel interface. Microchip 24LC256 is an identified I2C serial example. Foundry EEPROM macros and third-party MTP IP integrated within a chip are compared in the separate Embedded MTP IP topic.",
      "maturity": {
        "stage": "Production Device",
        "claim": "Microchip publicly offers the 24LC256 serial EEPROM and its full datasheet, covering packages, I2C, byte writes, a page buffer, and an internal high-voltage generator. This establishes a standalone product; the local-window teaching diagram is supported separately by a public patent.",
        "sourceIds": [
          "ch-mtp-standalone-microchip"
        ],
        "limit": "The datasheet does not disclose the bitcell cross-section, polysilicon count, or precise tunneling terminals. US4115914A cannot be treated as the 24LC256 implementation. Capacity, endurance, and retention must follow the specified part and conditions.",
        "implementationStage": "Commercial Standalone Serial EEPROM"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Establish Stored Charge Through a Local Window",
          "before": "The floating gate starts in a known charge range. The control electrode and terminal across the window determine its potential.",
          "stimulus": "The local-window teaching example establishes a high field across the thin dielectric to transfer electrons into the floating gate. In the n-channel explanation, additional electrons raise threshold voltage.",
          "after": "Electrons remain on the insulated floating gate and change channel conduction. In a device, the internal controller executes the write sequence and the system checks completion as specified.",
          "explanation": "FN tunneling occurs at the thin dielectric's high-field region. The control gate acts through capacitive coupling and has no metal connection to the floating gate. Byte/page write commands are interface behavior and do not directly describe bare-cell bias voltages."
        },
        {
          "id": "erase",
          "title": "Erase: Reverse the Window Field to Remove Electrons",
          "before": "The floating gate holds more electrons and the n-channel teaching example has an elevated threshold.",
          "stimulus": "Change terminal potentials within the same identified local-window structure so that its field supports electron transfer out of the floating gate.",
          "after": "Fewer electrons remain and threshold voltage returns toward the erased range for reprogramming.",
          "explanation": "Separate physical erase from host commands. A 24LC256 write includes an internally timed erase/write cycle; the host does not directly apply bare-cell erase biases. Selection lines, shared terminals, and page organization determine the affected region, which the EEPROM label alone does not specify."
        },
        {
          "id": "read",
          "title": "Read: Sense the Channel and Return Data Through the Interface",
          "before": "Stored charge maps to distinguishable threshold ranges and address decoding selects the data.",
          "stimulus": "Apply normal low-stress read biases and enable the selected path. Internal sensing and output control respond to the host read command.",
          "after": "The sensor distinguishes channel-current levels and the serial interface returns data while stored electrons remain on the floating gate.",
          "explanation": "The source-to-drain channel carries the read current; floating-gate electrons need not leave. Interface clock rate, serial transfer, and random/sequential access are device timing conditions, separate from bare-cell sensing time."
        }
      ],
      "selection": "The local window confines charge transfer while selection controls which storage path receives program, erase, or read biases. A standalone device also contains address decoding, page latches, voltage boosting, and command control. Byte-update costs require checking internal update granularity and page-boundary rules.",
      "variability": "Floating-gate charge, coupling ratio, tunnel-oxide thickness, and interface defects determine threshold voltage and its drift. Traps accumulated through cycling change program/erase speed and retention. Studies should measure cycle count, temperature, retention time, and error criteria together. One product's typical cycle count cannot be combined with another product's best retention time to form a common limit.",
      "advantages": [
        "The same location can be electrically erased and reprogrammed for settings and calibration that need updates.",
        "A separate package and standard interface support reuse across host chips, with memory high-voltage control inside the device.",
        "Byte/page update behavior can be checked against a complete datasheet to establish a traceable update sequence."
      ],
      "tradeoffs": [
        "The external device consumes package, board, and interface resources; serial transfer adds end-to-end latency.",
        "Repeated tunneling accumulates dielectric defects, so endurance and retention require joint evaluation.",
        "Interface write size does not identify physical cell erase granularity; power-loss consistency still needs system design."
      ],
      "ceilings": {
        "device": "The localized thin window must support tunneling while preserving long-term insulation. Defect accumulation, coupling ratio, and charge distributions determine the threshold window remaining after repeated operation.",
        "array": "Fine updates require selection, decoding, page latches, and high-voltage distribution. Page boundaries, internal erase/write units, and verification jointly limit update speed; one floating gate's area is an incomplete comparison.",
        "process": "A dedicated memory process controls the tunneling window, inter-gate dielectric, and high-voltage devices. Public teaching cross-sections explain principles; the stack and process conditions of a current part require separate manufacturer evidence.",
        "system": "Serial transfer, internal erase/write busy time, write protection, and power-loss handling define system behavior. Budget lifetime cycles at the actual updated locations; important settings can use versions, checksums, and a controlled switchover."
      },
      "fit": "Suitable for settings, calibration, product identification, and moderately updated state stored outside the host chip. Establish capacity, interface, page rules, write latency, and lifetime cycle demand before selecting a part and temperature grade.",
      "avoid": "Frequent high-throughput logging, large sequential data, and very low latency workloads may be constrained by interface and erase/write timing. For integration within the same chip, use the Embedded MTP IP topic's process routes.",
      "patents": [
        {
          "id": "US4115914A",
          "url": "https://patents.google.com/patent/US4115914A/en",
          "priority": "1976-03-26; parent-application date found in the records; this application was filed in 1977",
          "assignee": "Hughes Aircraft Company; verified from the front page of the original publication",
          "figures": "Figures 3i and 6; claims 2 and 9",
          "problem": "Nonvolatile charge requires good insulation for retention, while electrical erase needs a controlled path for electron transfer. Making the entire dielectric region too thin complicates retention and process control; making it uniformly too thick restricts charge transfer.",
          "mechanism": "A localized thinner tunneling window is placed between the floating gate and semiconductor, while other regions retain stronger isolation. Control-terminal coupling and the field across the window govern charge transfer. Figure 3i shows the cross-section formed by the process; Figure 6 traces the operating arrangement.",
          "claimReading": "The localized thin-dielectric and memory-structure limitations in claims 2 and 9 map to three questions: where the window lies, which terminal it reaches, and how the remaining regions are insulated. The thin window is a concrete structural limitation and cannot be omitted while retaining only the functional statement that the device can be electrically erased.",
          "limit": "The parent-application date is neither a complete historical determination of EEPROM's invention date nor a conclusion about the effective priority of all claims. This lesson does not infer that any current MTP product implements this patent."
        }
      ],
      "sourceIds": [
        "ch-pat-eeprom-window",
        "ch-mtp-standalone-microchip"
      ],
      "quiz": {
        "question": "Does 24LC256 page-write support prove its polysilicon count and local-window cross-section?",
        "answer": "No. The datasheet establishes device interface behavior, update rules, and ratings. A bitcell cross-section needs separate implementation evidence. This topic uses US4115914A to explain a local window without assigning that patent to the 24LC256."
      },
      "eraseCycle": {
        "kind": "electrical",
        "title": "Electrical Erase: The Complete PGM / ERS Cycle",
        "sequence": "PGM → ERS → PGM",
        "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "ch-pat-eeprom-window",
          "ch-mtp-standalone-microchip"
        ],
        "before": "The floating gate holds more electrons and the n-channel teaching example has an elevated threshold.",
        "mechanism": "Change terminal potentials within the same identified local-window structure so that its field supports electron transfer out of the floating gate.",
        "after": "Fewer electrons remain and threshold voltage returns toward the erased range for reprogramming."
      }
    },
    {
      "id": "mtp",
      "title": "Embedded MTP IP: Foundry Double-Poly and Third-Party Single-Poly",
      "family": "Charge Storage / Embedded IP / Process Integration",
      "storage": "This topic focuses on floating-gate embedded MTP/EEPROM IP. Charge remains on an insulated conductive floating node and alters channel conduction through capacitive coupling. n-type and p-type storage transistors have different read-state behavior: adding electrons makes the n-channel US5844271A example harder to turn on, while eMemory describes its p-type NeoMTP device as turning on after electron injection.",
      "structure": "Compare two integration routes: foundry double-poly EEPROM options and third-party single-poly MTP IP. A double-poly stack can place control and floating gates in separate polysilicon layers; a single-poly solution uses capacitive-control regions and a floating node. The buried n-type control electrode in US5844271A is one identified teaching implementation, not the cell of every third-party product.",
      "summary": "MTP IP provides rewritable nonvolatile storage inside the host chip, so selection centers on process and macro integration. Foundry double-poly EEPROM can be supplied through a dedicated NVM option; identified public evidence for third-party single-poly alternatives includes Synopsys MTP EEPROM and eMemory NeoEE/NeoMTP. This category is separate from packaged standalone EEPROM and does not merge SONOS Flash or antifuse OTP into floating-gate MTP.",
      "maturity": {
        "stage": "Commercial IP",
        "claim": "Current Synopsys and eMemory product pages directly identify single-poly MTP/EEPROM IP. The 2003 X-FAB XC06 brief provides a historical foundry double-poly NVM example. YMC has a logic-process MTP offering and a separate single-poly patent; Floadia ZT has a public floating-gate/FN program-and-erase example.",
        "sourceIds": [
          "ch-mtp-synopsys",
          "ch-mtp-ememory-neoee",
          "ch-mtp-ememory-neomtp",
          "ch-mtp-xfab-xc06",
          "ch-mtp-ymc-product",
          "ch-mtp-ymc-singlepoly",
          "ch-mtp-floadia-zt-fg"
        ],
        "limit": "Each product family requires its target process, macro revision, and qualification conditions. A YMC patent does not identify all current ymtp cells; the reviewed Floadia documents do not explicitly state polysilicon count. The historical X-FAB document does not establish current availability.",
        "implementationStage": "Publicly Offered Embedded MTP/EEPROM IP"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Establish the Identified Cell's Charge-Transfer Path",
          "before": "The floating node starts in an identifiable charge state. Control capacitances, source/drain, wells, and selectors jointly establish the selected path.",
          "stimulus": "The US5844271A teaching example combines buried-control coupling with drain-side channel hot-electron injection. NeoEE instead publicly describes FN programming. Each mechanism has its own structure and terminals; do not overlay their arrows on one generic cell.",
          "after": "Electrons remain on the floating node and alter the read conduction state. The target macro's controller manages pulses, verification, and retries.",
          "explanation": "Single-poly does not specify an injection mechanism. NeoMTP uses channel-hot-hole-induced hot-electron injection in a p-type device, distinct from the n-channel teaching example. Floadia ZT separately discloses FN programming. A low core supply does not eliminate internal voltage boosting or high fields."
        },
        {
          "id": "erase",
          "title": "ERS: Restore a State Suitable for Reprogramming",
          "before": "The floating node retains charge from the previous data state and the macro has selected the page, word, or block allowed to update.",
          "stimulus": "The US5844271A teaching example transfers electrons from floating gate to source through FN tunneling. NeoMTP instead identifies an additional erase gate as its destination; NeoEE provides FN paths through MOS structures.",
          "after": "Charge decreases and the floating node returns to a state suitable for programming. Completion is determined by erase verification and the target macro specification.",
          "explanation": "Polysilicon count cannot establish erase destination, polarity, or granularity. Capacitive-control regions and tunneling exits may differ. Changing a control voltage is not a direct metal connection that drains the floating gate. Dielectric defects still accumulate through cycling. Electron removal by FN and net-charge reduction by hot-hole injection are different mechanisms. The separate BBHH teaching model is not evidence that a current YMC product uses BBHH."
        },
        {
          "id": "read",
          "title": "Read: Sense the Selected Channel Under Normal Bias",
          "before": "Charge states correspond to distinguishable conduction ranges, with array selection and references established.",
          "stimulus": "Apply normal read biases to the selected storage transistor and selectors, sensing a small current or voltage signal without initiating high-field program/erase.",
          "after": "The sensing circuit returns data while charge remains on the floating node. n-type and p-type conduction states and logical mappings are defined by their respective circuits.",
          "explanation": "Macro read behavior depends on the cell, coupling ratio, selectors, bitlines, references, and ECC. A public cross-section explains storage principles but does not replace macro timing, output protocol, or usable read margin."
        }
      ],
      "selection": "Single-poly shifts control requirements into capacitive coupling and layout while retaining selectors, well isolation, and controlled high-voltage distribution. Both foundry NVM options and third-party IP require selected, half-selected, and unselected operating conditions, update granularity, and disturb limits. Total area includes boosting, control, sensing, ECC, and redundancy.",
      "variability": "Coupling ratio, oxide quality, channel type, charge-transfer mechanism, and cycling defects jointly govern distribution drift. FN and hot-carrier paths have different energy and stress conditions. Compare vendors at fixed capacity, temperature, cycle count, retention time, and error criteria instead of combining the best figures from unrelated macros.",
      "advantages": [
        "Stores updateable parameters within the same chip, reducing external memory interfaces and packaging needs.",
        "Third-party single-poly solutions can integrate with specified logic, analog, or BCD processes, with zero-added-mask options in identified products.",
        "Foundry NVM options and third-party IP offer distinct integration conditions that can be matched to update lifetime and available process resources."
      ],
      "tradeoffs": [
        "Single-poly does not eliminate area or qualification cost; coupling capacitors, isolation, and high-voltage peripherals still consume die resources.",
        "The MTP label can cover different carrier mechanisms, update granularities, and endurance; verify the specified macro.",
        "An IP listed by a foundry is not necessarily double-poly. Third-party licensed IP can appear in foundry catalogs, so technology origin needs separate checking."
      ],
      "ceilings": {
        "device": "Coupling, tunneling or hot-carrier efficiency, and dielectric reliability limit the usable read window after repeated updates. n/p channel types and different erase destinations cannot share one universal operating limit.",
        "array": "Boosting, selectors, references, ECC, redundancy, and verification determine total macro area and usable throughput. Fine updates can reduce array efficiency; shared lines and half-select disturb constrain parallel program/erase.",
        "process": "Double-poly NVM options and single-poly logic integration have distinct masks, oxides, wells, thermal budgets, and model requirements. Zero added masks still requires memory qualification on the target process. Base-process poly count cannot substitute for the NVM-option stack.",
        "system": "Update frequency, program/erase stalls, power budgets, and power-loss consistency jointly define usability. The host must honor macro busy states, locks, error handling, and test modes while budgeting cycles over product lifetime."
      },
      "fit": "Suitable for analog trimming, PMIC settings, sensor parameters, and device configuration that require updates within the same chip. Fix the foundry process and use lifetime first, then compare foundry EEPROM options, third-party MTP macros, total area, and qualification conditions.",
      "avoid": "Do not substitute the MTP label for physical and macro documentation or treat it as RAM with unlimited rewrites. For a separate memory device, return to conventional EEPROM. Classify SONOS, embedded Flash, and antifuse by their respective storage mechanisms.",
      "patents": [
        {
          "id": "US5844271A",
          "url": "https://patents.google.com/patent/US5844271A/en",
          "priority": "1995-08-21",
          "assignee": "Cypress Semiconductor; checked against bibliographic and 1995 assignment records",
          "figures": "Figures 3–6; claim 1",
          "problem": "Reducing the polysilicon layer count still requires effective floating-gate control, program/erase paths, and protection against leakage caused by overerase. Moving the control terminal into the substrate does not remove coupling, selection, or isolation requirements.",
          "mechanism": "A buried n-type region serves as the control electrode and a single polysilicon layer forms the floating gate. Thick/thin oxide regions and a separate selection region shape the channel. The specified operation uses channel hot-electron programming and FN electron transfer toward the source for erase, demonstrating that a single-poly structure can still provide capacitive control.",
          "claimReading": "Read claim 1 by tracing the buried control electrode, floating gate, oxide-thickness relationships, and split region. Single-poly is a process-layer characteristic, not a substitute for the complete structure. It also does not make every logic-only MTP product the same combination of claim limitations.",
          "limit": "No public evidence links current Synopsys MTP to this patent, so it is used only for structural teaching. Actual commercial implementation, node qualification, and reliability require independent evidence."
        }
      ],
      "sourceIds": [
        "ch-pat-eeprom-singlepoly",
        "ch-product-mtp",
        "ch-mtp-synopsys",
        "ch-mtp-ememory-neoee",
        "ch-mtp-ememory-neomtp",
        "ch-mtp-xfab-xc06",
        "ch-mtp-ymc-product",
        "ch-mtp-ymc-singlepoly",
        "ch-mtp-floadia-zt",
        "ch-mtp-floadia-zt-fg"
      ],
      "quiz": {
        "question": "If two third-party MTP products are both single-poly, can both use the same n-channel hot-electron program and source-FN erase diagram?",
        "answer": "No. NeoEE publicly describes FN charge transfer in both directions. NeoMTP describes a p-type floating-gate device, channel-hot-hole-induced hot-electron injection, and an erase-gate exit. Single-poly establishes layer count; a complete diagram must still match the identified cell, terminals, and operating conditions."
      },
      "integrationRoutes": [
        {
          "id": "foundry-double-poly",
          "title": "Foundry Double-Poly EEPROM Option",
          "provider": "X-FAB XC06 (historical 2003 example)",
          "polyLayers": "2: double-poly NVM stack",
          "controlTopology": "Separate polysilicon layers can form floating and control gates; the XC06 brief does not disclose the complete EEPROM cross-section.",
          "processContract": "Use the target foundry's EEPROM/NVM option and check the actual mask combination and memory specification.",
          "operationContract": "The EEPROM macro defines program/erase mechanism, biases, and granularity; neither layer count nor a process brief is sufficient.",
          "sourceIds": [
            "ch-mtp-xfab-xc06"
          ]
        },
        {
          "id": "third-party-single-poly",
          "title": "Third-Party Single-Poly MTP IP",
          "provider": "Synopsys MTP EEPROM; eMemory NeoEE/NeoMTP",
          "polyLayers": "1: explicitly stated for the identified products",
          "controlTopology": "Capacitive coupling controls a floating node; control capacitors, storage transistors, and erase regions are vendor-specific.",
          "processContract": "Integrate on a specified logic, analog, or BCD platform. Zero added masks applies only to explicitly supported versions.",
          "operationContract": "NeoEE uses FN program/erase; NeoMTP uses p-type storage and an erase gate. The reviewed Synopsys source does not disclose carrier paths.",
          "sourceIds": [
            "ch-mtp-synopsys",
            "ch-mtp-ememory-neoee",
            "ch-mtp-ememory-neomtp"
          ]
        }
      ],
      "implementations": [
        {
          "vendor": "Synopsys",
          "title": "MTP EEPROM IP",
          "polyLayers": "Single-poly",
          "storage": "Floating gate",
          "program": "PGM is supported; the reviewed product page does not disclose carrier paths or terminal biases.",
          "erase": "Electrical ERS is supported; the reviewed product page does not disclose the microscopic erase path or terminal biases.",
          "integration": "Specified standard-CMOS platforms; zero added masks; integrated high-voltage circuitry",
          "limit": "Do not assign US5844271A or another vendor's carrier paths to this product.",
          "sourceIds": [
            "ch-mtp-synopsys"
          ]
        },
        {
          "vendor": "eMemory",
          "title": "NeoEE",
          "polyLayers": "Single-poly",
          "storage": "Floating gate; capacitive-coupling MOS devices and selectors",
          "program": "FN transfer stores charge on the floating gate",
          "erase": "FN transfer removes charge from the floating gate",
          "integration": "Specified logic processes; zero added masks; integrated high-voltage and control circuits",
          "limit": "Complete terminal biases and macro update units require the specified version.",
          "sourceIds": [
            "ch-mtp-ememory-neoee"
          ]
        },
        {
          "vendor": "eMemory",
          "title": "NeoMTP",
          "polyLayers": "Single-poly",
          "storage": "p-type floating-gate MOSFET; additional erase gate",
          "program": "Channel-hot-hole-induced hot-electron injection (manufacturer label: CHEI)",
          "erase": "FN electron transfer from floating gate to erase gate",
          "integration": "Specified logic/BCD platforms; zero-added-mask versions",
          "limit": "Do not substitute an n-type storage transistor or source-erase diagram; use the macro's terminal specifications.",
          "sourceIds": [
            "ch-mtp-ememory-neomtp"
          ]
        }
      ],
      "eraseCycle": {
        "kind": "electrical",
        "title": "Floating-Gate MTP in This Chapter: PGM / ERS Cycle",
        "sequence": "PGM → ERS → PGM",
        "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "ch-pat-eeprom-singlepoly",
          "ch-product-mtp",
          "ch-mtp-synopsys",
          "ch-mtp-ememory-neoee",
          "ch-mtp-ememory-neomtp",
          "ch-mtp-xfab-xc06",
          "ch-mtp-ymc-product",
          "ch-mtp-ymc-singlepoly",
          "ch-mtp-floadia-zt",
          "ch-mtp-floadia-zt-fg"
        ],
        "before": "The floating node retains charge from the previous data state and the macro has selected the page, word, or block allowed to update.",
        "mechanism": "The US5844271A teaching example transfers electrons from floating gate to source through FN tunneling. NeoMTP instead identifies an additional erase gate as its destination; NeoEE provides FN paths through MOS structures.",
        "after": "Charge decreases and the floating node returns to a state suitable for programming. Completion is determined by erase verification and the target macro specification."
      }
    },
    {
      "id": "nor",
      "title": "NOR: Stacked-Gate and Split-Gate Code Storage",
      "family": "Flash Array / Random Read / Floating-Gate Examples",
      "storage": "NOR describes array connectivity and access organization, not a unique storage material. This topic uses floating-gate NOR: charge changes cell threshold voltage, and the selected cell is sensed through the bitline and source path. Both stacked-gate and split-gate cells can serve NOR arrays, but their selection channels, programming efficiency, and erase control differ.",
      "structure": "A stacked-gate example places the control gate, inter-gate dielectric, floating gate, and channel vertically above one another. A split-gate example assigns part of the channel to an independent selection function in series with the storage-region channel. The equivalent circuit must clearly show both channel segments and the shared bitline. NOR cells can each connect to the bitline, unlike a NAND string of series-connected cells, at the cost of higher contact and wiring overhead per cell.",
      "summary": "NOR is commonly used for code storage requiring direct, predictable reads. Stacked-gate cells place storage and selection responsibilities under the cell's gate control; split-gate cells add a selection channel that helps block unselected leakage from overerased cells. Execute-in-place support also depends on the interface, controller, and cache timing and cannot be guaranteed by the NOR name alone.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Microchip's SST39SF020A was listed as in production when reviewed, with a public summary specifying 2 Mb and a 4.5–5.5 V parallel flash interface. SST's SuperFlash technology brochure separately provides an identified technical lineage for split gates, source-side injection, and inter-gate FN erase, allowing commercial implementation evidence to be compared with the mechanism lesson.",
        "sourceIds": [
          "ch-maturity-nor-product",
          "ch-tech-superflash"
        ],
        "limit": "A product's interface supply is not its internal cell bias. Typical endurance, retention, and generation figures in the 2018 brochure are not common guarantees for all NOR. The channel-erase table in US6232180B1 must not be applied to SuperFlash.",
        "implementationStage": "Identified Split-Gate Product in Production"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Compare Channel Hot-Electron and Source-Side Injection",
          "before": "The cell starts in an erased threshold range that permits programming. The selected storage and selection channels must establish the correct potential distribution.",
          "stimulus": "A typical stacked-gate hot-electron example uses the lateral source-to-drain field; SuperFlash uses source-side injection. A separate, bounded embodiment in US6232180B1 specifies a 1.5–2 V select gate, 0 V drain, and 9–12 V source.",
          "after": "Electrons enter the floating gate and the threshold voltage of a typical n-channel storage region rises. Verify the read state after the pulse and keep unselected cells free from program disturb.",
          "explanation": "Source-side injection uses the potential drop at the boundary between the selection and storage regions to energize channel electrons, which are collected by the field toward the floating gate. Source/drain labels and biases must follow the original drawing; injection locations in different structures cannot be interchanged arbitrarily. Higher injection efficiency also does not eliminate the macro's need for voltage boosting, current limiting, or verification."
        },
        {
          "id": "erase",
          "title": "Erase: Follow the Structure's Electron Exit Path",
          "before": "The floating gate retains programmed charge. Cells sharing an erase terminal generally need coordinated biasing.",
          "stimulus": "The SuperFlash brochure describes FN tunneling from the floating gate to another gate. In contrast, the channel-erase example in US6232180B1 leaves the select gate, source, and drain floating and raises the p-well and deep n-well to 10–15 V.",
          "after": "Electrons leave the floating gate through the designated exit and threshold voltage falls. A separate selection channel can suppress some unselected conduction caused by overerase, but does not remove storage-layer reliability requirements.",
          "explanation": "Two split-gate implementations may have different erase barriers and charge exits, so their terminal voltages cannot be combined into one bias set. Erase scope depends on shared gates, wells, and array control. Updating a byte still requires the product's block-erase and data-preservation flow; fine-grained reading is not equivalent to fine-grained erase."
        },
        {
          "id": "read",
          "title": "Read: Sense the Selected Cell's Channel Directly",
          "before": "Different floating-gate charge states produce different conduction levels. Unselected cells on the same bitline must remain isolated.",
          "stimulus": "Apply a read potential to the selected wordline or select gate and establish a small bitline bias. The US6232180B1 example uses Vcc at the select gate, 2 V at the drain, and 0 V at the source and wells.",
          "after": "Current flows through the selected cell's source-to-drain channel and, in a split-gate example, through the selection channel. The sensor distinguishes charge states from the current.",
          "explanation": "NOR does not require an entire string of storage cells to conduct before one cell can be read, which favors random access. An overerased stacked-gate cell that conducts while unselected can corrupt the shared bitline; a separate selection function helps shut off that path. Actual latency still includes wordlines, bitlines, sensing, and the external interface, not only individual-cell speed."
        }
      ],
      "selection": "NOR selects cells through wordlines and bitlines, and leakage from unselected rows directly affects sensing. A split gate adds a channel segment that can be turned off independently, addressing the selection problem associated with overerase. Programming, erase, and reading use different terminal combinations, so selected and unselected paths must be redrawn for each operation rather than inferring program/erase safety from a read circuit alone.",
      "variability": "Floating-gate coupling, oxide thickness, and injection location change the threshold-voltage distribution. Cycling defects and erase nonuniformity widen it further. Split gates reduce certain array-leakage risks but do not eliminate charge-retention requirements, read disturb, or program/erase stress in the storage region. Comparisons must hold product generation, temperature, and cycling conditions constant.",
      "advantages": [
        "The array organization favors random reads and suits code and boot data.",
        "A split gate provides an additional selection function that can suppress unselected leakage caused by overerase.",
        "Identified production products and an established technical lineage allow selection against actual interface and update requirements."
      ],
      "tradeoffs": [
        "More cell contacts and wiring reduce density relative to NAND; complete cost must be compared at the required capacity.",
        "Erase granularity is usually larger than read granularity, so a small update may still require block-level relocation and data preservation.",
        "Additional gates, coupling, and high-voltage control increase process and peripheral costs; split gates do not provide a cost-free endurance improvement."
      ],
      "ceilings": {
        "device": "Injection efficiency, tunnel-dielectric quality, and the threshold-voltage window jointly limit program/erase speed and lifetime. Shrinking a cell can increase sensitivity to coupling, short-channel effects, and electron count. A generation's typical endurance must not be treated as the physical limit of the NOR family.",
        "array": "Bitline contacts and wiring overhead constrain density, while long-line capacitance and leakage constrain sensing speed. Split gates can improve unselected-cell isolation, but erase control, references, and redundancy remain necessary. Comparisons should report capacity, array efficiency, and peripheral area.",
        "process": "Floating gates, inter-gate dielectric, and injection-region geometry require dedicated process control. Different split-gate generations and erase exits are not interchangeable modules. Integration into a logic process requires checking added masks, thermal budget, voltage-tolerant devices, and qualification data.",
        "system": "Code-read performance depends on the interface, controller, cache, and package, and execute-in-place requires a complete timing contract. Data updates are constrained by block erase, read availability during programming, power-loss handling, and cycle budgets. The fastest quoted read time alone cannot determine the solution."
      },
      "fit": "Suitable for boot code, firmware requiring predictable random reads, and resident code of moderate capacity. Execute-in-place must be matched to the processor bus, controller, cache, and actual worst-case access time. If firmware must be updated, additionally validate dual-image handling, erase granularity, and power-loss recovery.",
      "avoid": "For workloads prioritizing large sequential datasets and low cost per bit, compare against NAND's management cost and complete system performance. Frequent small overwrites should not be mapped directly to NOR block erases without first estimating write amplification, movement of retained data, and cycle consumption.",
      "patents": [
        {
          "id": "US6232180B1",
          "url": "https://patents.google.com/patent/US6232180B1/en",
          "priority": "1999-07-02",
          "assignee": "The initial assignment names Worldwide Semiconductor Manufacturing; transferred to Taiwan Semiconductor Manufacturing Company in 2000",
          "figures": "Figure 6 and its operating table; claims 4 and 6",
          "problem": "A split-gate cell must combine efficient programming, controlled erase, and unselected-cell isolation. This patent places source-side injection and channel erase within a specific well and gate structure so that terminal roles support the different operations.",
          "mechanism": "During programming, a low select-gate potential and raised source produce source-side injection. During erase, source, drain, and select gate float while the p-well and deep n-well are raised, removing electrons through the channel side. Reading instead uses a Vcc select gate and low drain bias for sensing.",
          "claimReading": "Read claims 4 and 6 together with the Figure 6 operating table to check the combination of wells, storage region, and selection region. Explicitly identify floating terminals and channel erase; the fact that both technologies use split gates does not permit substituting a SuperFlash inter-gate FN diagram.",
          "limit": "The earliest assignee found is Worldwide Semiconductor Manufacturing; TSMC in an aggregated field does not erase that original record. This is a lesson on a specific operation and does not establish implementation correspondence with SST39SF020A or all split-gate NOR."
        }
      ],
      "sourceIds": [
        "ch-pat-nor-splitgate",
        "ch-tech-superflash",
        "ch-maturity-nor-product",
        "ch-tech-nand"
      ],
      "quiz": {
        "question": "If two cells are both called split-gate NOR, can they share the same erase-bias table?",
        "answer": "No. The SuperFlash brochure's example uses inter-gate FN tunneling, while US6232180B1 provides a channel-erase embodiment. Identify each electron exit, well, and floating terminal before citing its biases. A shared family name does not establish identical operation."
      },
      "eraseCycle": {
        "kind": "electrical",
        "title": "Electrical Erase: The Complete PGM / ERS Cycle",
        "sequence": "PGM → ERS → PGM",
        "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Erase acts on the region defined by shared array controls, commonly a sector or block in the cited products. Preserve still-valid data before erasing; read or program granularity does not define erase granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "ch-pat-nor-splitgate",
          "ch-tech-superflash",
          "ch-maturity-nor-product",
          "ch-tech-nand"
        ],
        "before": "The floating gate retains programmed charge. Cells sharing an erase terminal generally need coordinated biasing.",
        "mechanism": "The SuperFlash brochure describes FN tunneling from the floating gate to another gate. In contrast, the channel-erase example in US6232180B1 leaves the select gate, source, and drain floating and raises the p-well and deep n-well to 10–15 V.",
        "after": "Electrons leave the floating gate through the designated exit and threshold voltage falls. A separate selection channel can suppress some unselected conduction caused by overerase, but does not remove storage-layer reliability requirements."
      }
    },
    {
      "id": "sonos",
      "title": "SONOS and NROM: Charge Trapping in Insulating Layers",
      "family": "Charge Storage / Dielectric Traps / Channel-Wide and Localized Implementations",
      "storage": "Electrons remain in trapping centers within insulating materials such as silicon nitride, changing the potential seen by the channel and its threshold voltage. The trapping layer is not a conductive floating gate, and charge can have a spatial distribution. Channel-wide SONOS program/erase examples and localized NROM charge-trapping examples therefore require different operating and sensing explanations; simply recoloring a floating gate is not sufficient.",
      "structure": "SONOS denotes silicon, oxide, nitride, oxide, and silicon in sequence. From channel toward gate, the stack contains a tunnel oxide, charge-trapping nitride, blocking oxide, and gate. Infineon's identified eFlash implementation adds a series MOS selector to form a 2T cell. NROM emphasizes charge localized near one terminal. Its equivalent model must preserve position along the channel instead of representing storage as one equipotential conductor.",
      "summary": "SONOS/MONOS describe material stacks or gate materials, while NROM refers to an implementation lineage that uses localized trapping and read direction. They are not directly interchangeable product names. Infineon's SONOS has production platforms, so the entire charge-trap family must not be labeled emerging. Its FN program/erase mechanism and reliability figures also must not be transferred to every NROM implementation.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Infineon publicly lists SONOS eFlash production at 130, 65, 55, 40, and 28 nm and explicitly describes a 2T cell with FN program/erase. Its MCU shipments and licensable macro information support classification as an established platform. Localized-charge NROM is treated separately here through Saifun's original patent, with its own evidence boundary.",
        "sourceIds": [
          "ch-product-sonos",
          "ch-pat-nrom"
        ],
        "limit": "The listed 25 ns, 100,000-cycle, and ten-year retention figures are not fully paired across all nodes, capacities, and temperatures, so they are not combined into one guarantee. SONOS production evidence does not automatically establish the same NROM specifications or current product status.",
        "implementationStage": "Identified SONOS eFlash Platforms in Volume Production"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Distinguish Tunneling Capture from Local Hot-Electron Injection",
          "before": "The trapping layer has a known initial charge distribution. A channel-wide SONOS example controls the storage region as a whole; a localized example must also specify which end stores the charge.",
          "stimulus": "Infineon's identified SONOS uses FN programming. In the localized example of Saifun's US5768192A, high gate and drain biases with the source at low potential establish hot-electron injection conditions.",
          "after": "Electrons remain in the trapping layer and raise the barrier in the corresponding channel region. SONOS represents data through distinguishable threshold-voltage windows; the localized example also uses charge position to influence reverse readout.",
          "explanation": "In a tunneling example, charge crosses the thin dielectric from the channel side and is then trapped. In a hot-electron example, carriers first gain energy near the drain, producing localized stored charge. An insulating trapping layer does not automatically equalize potentials and charge distributions as a conductor does. The product page does not disclose the complete film thicknesses and terminal biases, so this explanation remains at the verified mechanism level."
        },
        {
          "id": "erase",
          "title": "Erase: Follow the Trap Stack and Identified Mechanism",
          "before": "Programmed charge occupies a trapping material such as nitride, shifting channel threshold voltage or a local barrier.",
          "stimulus": "The cited Infineon 2T SONOS uses FN erase. In the separate US6664588B2 NROM example, band-to-band tunneling generates holes near the selected bit-line/channel junction; lateral acceleration and the gate field inject hot holes into the local nitride storage region.",
          "after": "The selected storage region returns toward its erase window for subsequent programming. In the NROM example, hole injection must overlap the programmed-electron region; residual electrons or excess holes can otherwise disturb the read threshold.",
          "explanation": "Read US6664588B2 Figures 8A and 9–11 as a named pocket-implant erase example. Do not attribute that structure to US5768192A or substitute the SONOS FN diagram for NROM hot-hole erase. The cited implementation defines selection, pulse verification and erase granularity."
        },
        {
          "id": "read",
          "title": "Read: Sense the SONOS Window and the NROM Direction",
          "before": "Stored SONOS charge changes threshold voltage. Localized NROM charge changes the channel barrier near a particular terminal.",
          "stimulus": "The SONOS 2T example enables its selector and applies a read-gate bias. The localized US5768192A example reverses the direction relative to programming: the gate and original source are biased, while the original drain is held at low potential.",
          "after": "Source-to-drain channel current is sensed. Reverse reading positions charge originally near the programming drain where it controls the carrier-injection-end barrier more effectively, increasing its influence on the readout.",
          "explanation": "Read current travels through the channel; it does not empty all electrons from the nitride. A channel-wide threshold model explains many SONOS operations, but ignoring charge position in a localized cell can obscure why reverse reading works. Read direction must be labeled against the original programming terminals, rather than silently exchanging source and drain names in a drawing."
        }
      ],
      "selection": "In Infineon's 2T SONOS, a MOS selector is in series with the charge-trap storage transistor, separating isolation and storage functions. High-field program/erase also requires consideration of shared wordlines and wells. Localized-charge arrays must additionally manage direction, half-selection, and neighboring data states. Successful reverse reading of one cell does not establish reliable storage of two independent bits in a large array.",
      "variability": "Trap density, energy levels, interface quality, and film thickness affect programming speed, detrapping, and retention. Localized charge also varies in lateral position and distribution width. Compare windows initially, after cycling, and after high-temperature retention. Extending the concept to storage at both ends requires measuring their interaction rather than simply counting an additional possible storage position.",
      "advantages": [
        "The insulating trapping layer offers structural and scaling choices distinct from a conductive floating gate.",
        "Identified SONOS embedded-memory production nodes and licensable macros exist; the technology cannot broadly be described as not yet commercial.",
        "Localized charge position can participate in information encoding and readout design, but additional bits require separate proof that their states remain distinguishable."
      ],
      "tradeoffs": [
        "Trap, interface, and blocking-layer quality jointly determine retention and endurance; charge-loss risk remains.",
        "Channel-wide tunneling and localized hot-electron operations cannot share unqualified bias or reliability data.",
        "Localized trapping increases sensitivity to position and interaction between terminals, requiring more detailed models and measurements."
      ],
      "ceilings": {
        "device": "Program/erase speed and retention depend on the tunneling barrier, trap depth, and blocking layer. Charge that is easier to inject may also escape more readily. Cycling-induced defects change the window, while localized charge is additionally affected by short-channel behavior and lateral distribution. The SONOS name alone does not establish a fixed endurance ceiling.",
        "array": "Selectors and shared biases determine isolation, granularity, and effective density. Localized multibit implementations must keep spatially distinct states distinguishable while accounting for programming direction, half-selection, and neighbor interference. Two charge clusters in a cell illustration do not establish two reliable deliverable bits.",
        "process": "The upper/lower oxides, nitride, and interfaces must retain appropriate traps and barriers within the thermal budget. Changing the metal gate or blocking layer also changes field distribution. Production qualification for an embedded process belongs to a particular stack, node, and macro combination and cannot be extended to arbitrary charge-trap devices.",
        "system": "The system must still budget program/erase latency, supply requirements, post-cycling retention, and ECC conditions. A macro family listing fast reads and long retention does not establish simultaneous operation at maximum temperature, maximum capacity, and maximum accumulated cycles. Obtain the fully paired conditions before committing to an application lifetime."
      },
      "fit": "Suitable for embedded code and parameter storage where the identified process has qualification evidence. When selecting a solution such as Infineon SONOS, obtain the corresponding macro data for the node, capacity, temperature, and read/write requirements. NROM is also useful for understanding the principles and costs of localized charge, reverse reading, and spatial multibit encoding.",
      "avoid": "Do not treat SONOS, MONOS, NROM, and 3D NAND as one interchangeable cell. Requirements involving two-bit storage, very-high-temperature retention, or a specific cycling guarantee need complete product or measurement data for that implementation. The best figures from a different charge-trap family must not be used to fill missing evidence.",
      "patents": [
        {
          "id": "WO1981000790A1",
          "url": "https://patents.google.com/patent/WO1981000790A1/en",
          "priority": "1979-09-13",
          "assignee": "NCR; checked against PCT bibliographic and priority information",
          "figures": "Figure 1; claim 1",
          "problem": "Early charge-trap memories needed longer retention under practical program/erase conditions. If charge readily escapes toward the gate, simply thickening or changing the lower dielectric may not meet both programming-speed and retention requirements.",
          "mechanism": "A blocking oxide is inserted between the silicon-nitride trapping layer and the silicon gate, while a thin tunnel oxide remains below. Figure 1 distinguishes the lower barrier used for electron transfer from the upper barrier that suppresses escape, showing the different responsibilities of the stack's layers.",
          "claimReading": "Claim 1 includes a particular stack and thickness relationships. For example, the early limitations of a 70–100 Å blocking oxide and a lower oxide no thicker than 15 Å must be labeled as conditions of this patent. The technical focus is on which layers tunnel, trap, and block, not on treating these values as modern design rules.",
          "limit": "This patent is not the complete structure or operating specification of modern Infineon SONOS. It also does not provide common performance figures for all MONOS, NROM, or 3D NAND."
        },
        {
          "id": "US5768192A",
          "url": "https://patents.google.com/patent/US5768192A/en",
          "priority": "1996-07-23",
          "assignee": "Saifun Semiconductors; verified from the original publication's front page and 1997 assignment record",
          "figures": "Figure descriptions for localized charge and programming/reverse reading; claims 1 and 23",
          "problem": "The effect of localized trapped charge on the channel depends on read direction. Reading in an unfavorable direction may weaken its control of current. Injection position and read terminals must be paired to distinguish data using the asymmetric charge distribution.",
          "mechanism": "High gate and drain biases inject hot electrons into the trapping layer near the drain. Reversing current direction during readout makes that localized charge control the channel injection barrier more effectively. Storage position and read direction therefore become part of data interpretation.",
          "claimReading": "Read claims 1 and 23 by identifying the localized trapping region, programming direction, and reverse-read conditions in sequence. Extracting only the phrase silicon nitride stores charge misses the relevant combination. A single localized charge region also does not establish that the patent fully describes every two-ended, two-bit array.",
          "limit": "The original publication names Saifun; later Spansion Israel metadata does not replace the original corporate record. This material uses the patent for localized programming and reverse reading. Two-bit erase, current products, and production reliability require separate evidence."
        }
      ],
      "sourceIds": [
        "ch-pat-sonos",
        "ch-pat-nrom",
        "ch-product-sonos",
        "op-pat-nrom-hhi"
      ],
      "quiz": {
        "question": "If a SONOS nitride layer is drawn as one continuous film, does that mean all its charge can freely equalize as it would on a metallic floating gate?",
        "answer": "No. Nitride is an insulating trapping material, so charge can remain at different positions. Readout of a localized-charge cell consequently depends on charge position and read direction. Distinguish continuity of the material, localization of charge, and the way the full channel is sensed."
      },
      "eraseCycle": {
        "kind": "electrical",
        "title": "Electrical Erase: The Complete PGM / ERS Cycle",
        "sequence": "PGM → ERS → PGM",
        "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "ch-pat-sonos",
          "ch-pat-nrom",
          "ch-product-sonos",
          "op-pat-nrom-hhi"
        ],
        "before": "Programmed charge occupies a trapping material such as nitride, shifting channel threshold voltage or a local barrier.",
        "mechanism": "The cited Infineon 2T SONOS uses FN erase. In the separate US6664588B2 NROM example, band-to-band tunneling generates holes near the selected bit-line/channel junction; lateral acceleration and the gate field inject hot holes into the local nitride storage region.",
        "after": "The selected storage region returns toward its erase window for subsequent programming. In the NROM example, hole injection must overlap the programmed-electron region; residual electrons or excess holes can otherwise disturb the read threshold."
      }
    },
    {
      "id": "nand",
      "title": "NAND: Planar Strings, Vertical Stacks, and Multilevel Storage",
      "family": "Flash Array / Series-Connected Cells / Planar and 3D",
      "storage": "NAND data can still be retained by charge in a floating gate or dielectric trapping layer that changes threshold voltage. NAND itself describes an array organization with multiple cells connected in series. Storing N bits per cell requires 2 to the Nth power distinguishable states, such as eight for TLC and sixteen for QLC. More bits do not provide additional windows of unchanged width for free.",
      "structure": "Planar NAND connects a row of memory transistors in series along the substrate, with string selectors, a bitline, and a source line at the ends. In 3D NAND, a vertical channel passes through multiple wordline layers, forming a cell at each intersection. BiCS illustrations show a storage film along the hole and a columnar channel. The equivalent circuit remains a string of wordline-controlled transistors. The early columnar-sidewall drawings in US7696559B2 are not substitutes for every modern gate-all-around cross-section.",
      "summary": "Series connection increases density by sharing contact overhead across cells, but reading one cell requires the other cells in its string to provide a conduction path. Planar feature shrink, additional 3D layers, and more bits per cell are distinct density axes, each with charge-window, process, and reliability costs. Page programming and block erase also make the controller an important part of usable storage.",
      "maturity": {
        "stage": "Commercial Generations Established",
        "claim": "Kioxia's fundamentals explanation records commercial planar 15 nm technology and BiCS FLASH generations: 48 layers in 2015, 96 layers in 2018, 112 layers in 2020, and 162 layers in 2022. This establishes 3D NAND as a mature commercial family and supports a historical comparison of planar scaling and vertical stacking.",
        "sourceIds": [
          "ch-maturity-bics"
        ],
        "limit": "This material deliberately uses verifiable commercial history rather than claiming the latest 2026 layer-count or product ranking. Layer count, bits per cell, capacity, and performance must be cited together for each generation. Sampling or announcing a new layer count is not automatically volume production.",
        "implementationStage": "Commercial History for Both Planar and 3D NAND"
      },
      "operations": [
        {
          "id": "write",
          "title": "Program: Raise the Selected Wordline and Inhibit Other Channels",
          "before": "The block starts in a programmable state, and the controller determines the page data. Bits on the same wordline may either require programming or need to remain unchanged.",
          "stimulus": "Apply the programming potential to the selected wordline and appropriate pass potentials to other wordlines. Bitlines and selectors control each string's channel so that cells to be programmed see a larger tunneling field while inhibited cells see a reduced effective field.",
          "after": "Electrons enter the floating gate or trapping layer from the channel side, raising threshold voltage toward the target state. Multilevel storage requires controlled programming and read verification to maintain state separation, not a single arbitrarily high pulse.",
          "explanation": "The early US7696559B2 example uses Vpgm on the selected wordline and lower pass potentials on the others, with channel conditions inhibiting unwanted programming. Both planar and 3D implementations depend on the effective field across the storage layer, not merely the wordline-to-ground voltage. Specific channel boosting, pulse stepping, and selector timing require verification for each implementation."
        },
        {
          "id": "erase",
          "title": "Erase: Reset the Charge Window of a Shared Block",
          "before": "Cells occupy different programmed threshold-voltage states. A block being reclaimed may still contain other pages whose data must be preserved.",
          "stimulus": "Depending on the structure, raise the channel or well potential relative to the wordlines to establish an erase field that reduces stored electrons. The US7696559B2 example raises the common source line, holds the selected block's wordlines at 0 V, and leaves bitlines and selection-related terminals floating as specified in that embodiment.",
          "after": "The block's cells return to the erased window. The controller must first preserve still-valid pages elsewhere; rewriting a single bit is not a substitute for block erase.",
          "explanation": "Erase granularity follows shared wells, channels, and wordline-bias control, and differs from a read page or a host address. Planar floating-gate cells and modern 3D stacks may use different charge-removal or neutralization paths. This material preserves the boundary of the early embodiment and does not present one common-source bias as the erase specification of all NAND."
        },
        {
          "id": "read",
          "title": "Read: Pass Unselected Cells and Sense the Selected Threshold",
          "before": "The bitline is precharged or otherwise placed in a sensing condition, and the selectors at both string ends prepare a path. The selected cell may occupy one of several threshold-voltage states.",
          "stimulus": "Use a decision potential on the selected wordline and pass potentials on unselected wordlines so that they conduct despite their stored states. Multilevel reading uses the corresponding reference conditions to identify the state interval.",
          "after": "If the selected cell conducts, the string permits a detectable bitline current or discharge; if it remains off, the path is blocked. Data mapping and any required ECC then recover the bits from the sensing results.",
          "explanation": "When one cell is read, the other storage cells still experience pass bias, so the absence of a program command does not mean zero read disturb. String resistance, wordline/bitline loading, and threshold-voltage distributions jointly affect readout. In US7696559B2, the selected 0 V condition belongs only to that early example; one fixed potential cannot distinguish all multilevel states."
        }
      ],
      "selection": "NAND selection has three levels: the block defines the shared control scope, the wordline identifies a position in the string, and bitlines with string selectors determine which strings are programmed or sensed. Half-select inhibition requires management of channel potential and pass stress. Unselected wordline potentials must enable the path without accumulating excessive disturb, so reporting only the selected wordline voltage is insufficient.",
      "variability": "Planar scaling increases sensitivity to small charge losses and neighboring-cell coupling. 3D introduces hole-profile, layer-to-layer process, and channel differences. Abstracts of original measurement studies also identify early retention loss and retention interference. Narrower multilevel windows make these distribution differences more likely to cause errors, so analysis must include cycling, temperature, retention time, and ECC conditions together.",
      "advantages": [
        "Series connection shares contacts, supporting high density and large-capacity data storage.",
        "3D stacking adds storage cells per unit planar area instead of relying only on lateral feature shrink.",
        "Multilevel storage adds bits per cell and can be combined with vertical stacking, at the cost of tighter windows and additional management."
      ],
      "tradeoffs": [
        "Page programming and block erase make small updates involve data movement, write amplification, and garbage collection.",
        "More states reduce threshold-voltage separation and increase the burden on read/program procedures and error management.",
        "Higher layer counts increase deep-hole etching, profile-control, and layer-variation challenges and do not automatically reduce effective cost per bit."
      ],
      "ceilings": {
        "device": "The usable threshold-voltage range is finite; more bits divide that same range into more states. Charge loss, trapping/detrapping, cycling defects, and interference broaden distributions. Physical limits must be expressed through distinguishable state count and specified retention/cycling conditions, not minimum cell area alone.",
        "array": "String length, selectors, pass bias, and wordline loading affect read/program timing and disturb. Layer variation in 3D and multilevel distributions also require reference adjustment, verification, and error correction. Effective density must account for redundancy and management overhead rather than treating layer count multiplied by bits per cell as usable capacity.",
        "process": "High-aspect-ratio 3D memory holes require balanced control of profile, uniformity, etch time, and subsequent film quality. More layers also increase manufacturing time and cost risk. Kioxia's deep-hole process research identifies productivity as a key bottleneck; a layer-count record alone does not demonstrate lower cost per bit.",
        "system": "Host-visible performance and lifetime depend on ECC, data movement, redundancy, the controller, and workload. Cycle count, temperature, and retention time jointly determine reliability. Performance after the cache fills, worst-case tail latency, and write amplification require measurement; a NAND die's peak transfer rate alone is insufficient."
      },
      "fit": "Suitable for SSDs, managed flash, and systems requiring large-capacity data storage. Selection must distinguish raw NAND from products with a controller and evaluate lifetime against actual read/write mix, retention time, operating temperature, and written data volume. Capacity, bits per cell, and ECC conditions must be tied to an identified product.",
      "avoid": "Raw NAND should not be treated as directly and arbitrarily overwritable byte-addressable memory. Individual-device speed or performance with an empty cache is also not representative of application performance. When the primary requirements are small capacity, direct random reads, or highly predictable latency, compare alternatives with controller and management costs included.",
      "patents": [
        {
          "id": "US7696559B2",
          "url": "https://patents.google.com/patent/US7696559B2/en",
          "priority": "2005-12-28",
          "assignee": "Toshiba; checked against bibliographic records and the original publication",
          "figures": "Figures 2 and 5–9; claim 1",
          "problem": "Planar density growth is limited by cell dimensions and contacts. Storage cells need to be arranged vertically while retaining selectable NAND strings, a manufacturable process, and workable program/erase/read biases. Stacked materials alone, without a complete current path, do not form a memory array.",
          "mechanism": "The sidewalls of a columnar semiconductor layer combine with stacked wordlines and an insulating charge-trap layer to form vertical cells. Selectors, bitlines, and a common source complete the string. Figures 7–9 provide specific examples of erase by raising the common source, programming a selected wordline, and reading by bitline discharge.",
          "claimReading": "First map the spatial relationships among the columnar semiconductor layer, gates, and charge-storage dielectric in claim 1, then read them with the array and bias drawings. Vertical NAND is only a family name. This patent's particular sidewall and channel arrangement must not be drawn as the universal cross-section of all modern gate-all-around implementations.",
          "limit": "This is an early vertical-NAND research seed, not a complete patent lineage for planar NAND, channel boosting, or pulse algorithms. The patent alone also does not establish that a contemporary BiCS product implements every claim limitation."
        }
      ],
      "sourceIds": [
        "ch-pat-nand-vertical",
        "ch-tech-nand",
        "ch-tech-multilevel",
        "ch-tech-retention",
        "ch-tech-ecc",
        "ch-tech-deepetch",
        "ch-paper-3dvariation",
        "ch-paper-readdisturb",
        "ch-maturity-bics"
      ],
      "quiz": {
        "question": "Does moving from TLC to QLC while increasing the layer count necessarily improve speed and endurance and reduce cost at the same time?",
        "answer": "No. QLC must distinguish sixteen states, while TLC needs only eight; narrower windows increase verification and error-management demands. More layers add deep-hole process and layer-variation challenges. Evaluate an identified product's usable capacity, manufacturing and controller costs, workload, and reliability conditions together."
      },
      "eraseCycle": {
        "kind": "electrical",
        "title": "Electrical Erase: The Complete PGM / ERS Cycle",
        "sequence": "PGM → ERS → PGM",
        "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Erase acts on the region defined by shared array controls, commonly a sector or block in the cited products. Preserve still-valid data before erasing; read or program granularity does not define erase granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "ch-pat-nand-vertical",
          "ch-tech-nand",
          "ch-tech-multilevel",
          "ch-tech-retention",
          "ch-tech-ecc",
          "ch-tech-deepetch",
          "ch-paper-3dvariation",
          "ch-paper-readdisturb",
          "ch-maturity-bics"
        ],
        "before": "Cells occupy different programmed threshold-voltage states. A block being reclaimed may still contain other pages whose data must be preserved.",
        "mechanism": "Depending on the structure, raise the channel or well potential relative to the wordlines to establish an erase field that reduces stored electrons. The US7696559B2 example raises the common source line, holds the selected block's wordlines at 0 V, and leaves bitlines and selection-related terminals floating as specified in that embodiment.",
        "after": "The block's cells return to the erased window. The controller must first preserve still-valid pages elsewhere; rewriting a single bit is not a substitute for block erase."
      }
    },
    {
      "id": "toggle",
      "title": "Toggle MRAM: Magnetic-Field Sequencing",
      "family": "Magnetic Memory",
      "storage": "The bit is stored in the magnetization direction of the free magnetic layer. Parallel and antiparallel alignment relative to the reference layer produce different resistance levels in the magnetic tunnel junction. A magnetic energy barrier maintains the direction after power is removed. Toggle specifically denotes a write method that reverses data through the rotation of coupled magnetic moments; it is not a general name for all field-written MRAM.",
      "structure": "A representative cross section contains a reference magnetic layer, a thin tunnel barrier, and a coupled free magnetic layer, with the MTJ connected to a read access transistor. Two intersecting write lines near the junction generate magnetic fields through their respective currents. Read current passes through the junction, whereas the write stimulus primarily flows through the lines. Their area and spacing must be included in the bit dimensions.",
      "summary": "Toggle MRAM assigns data retention to the magnetic energy barrier and data modification to precisely sequenced magnetic fields. The controller first determines whether the existing and requested values differ, then toggles only when needed. It does not require the block-erase sequence of Flash, but it adds read, comparison, and toggle control. This complete sequence is essential to a valid comparison of write latency and energy.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Everspin's 2025 annual filing explicitly states that Toggle products entered volume production in 2008 and that devices with capacities of 128kb–32Mb continue to ship. This is commercial evidence for a named product family, rather than maturity inferred from a patent or experimental device.",
        "sourceIds": [
          "EMG-SEC"
        ],
        "limit": "Interfaces, capacities, and grades have individual specifications. Commercial history does not replace a datasheet and availability check for the selected part number."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Compare Before Toggling",
          "before": "The MTJ is in the parallel, low-resistance state, and the requested data is the opposite value.",
          "stimulus": "Read and compare first, then activate the currents in the two write lines in sequence.",
          "after": "The coupled free magnetic moments rotate along the designed trajectory and settle into the antiparallel, high-resistance state.",
          "explanation": "One Toggle sequence reverses the existing state. If the target and existing values match, toggling must be skipped. Products may define their own logic encoding; low resistance does not necessarily represent 0."
        },
        {
          "id": "erase",
          "title": "Reverse Overwrite: No Separate Physical Erase",
          "before": "The junction is in the antiparallel, high-resistance state, and the controller requests the earlier data value.",
          "stimulus": "Compare the data, then apply another qualified Toggle write sequence.",
          "after": "The free layer returns to the low-resistance state, parallel to the reference layer.",
          "explanation": "Restoration here is performed through individual-bit rewriting, not a physical erase that clears the whole array. The result of the same toggle sequence depends on the current state, so the initial read and decision cannot be omitted."
        },
        {
          "id": "read",
          "title": "Read: Sense MTJ Resistance",
          "before": "Data is retained in the parallel or antiparallel magnetic state.",
          "stimulus": "Enable the access transistor, apply a small voltage, and compare the resulting current with a reference.",
          "after": "The sense amplifier outputs data while the original magnetic state remains unchanged under normal operation.",
          "explanation": "Reading requires separation between resistance distributions while keeping disturbance and stress within acceptable limits. Reference cells, temperature, and process variation affect the read margin."
        }
      ],
      "selection": "For reading, the word line normally enables the access transistor and the bit line connects the cell to the sensing circuit. Writing selects the target through the sequence and intersection of two lines; cells that are not fully selected may still experience partial magnetic fields. Verification must therefore examine magnetic-field trajectories and data retention in half-selected cells, as well as the logical address and successful switching of the target cell.",
      "variability": "Free-layer dimensions, coupling strength, magnetic anisotropy, and line current change the safe switching region. Circuits must keep process and temperature distributions within the qualified timing window, using write verification, redundancy, and error correction to control tail failures. If these variations are used for a PUF, reproducibility must also be demonstrated; occasional write errors are not automatically a usable fingerprint.",
      "advantages": [
        "The write stimulus does not require a large current through the tunnel barrier, helping reduce write stress on the barrier.",
        "Long commercial product experience and individual-bit rewriting support systems that frequently preserve small data records.",
        "Normal sensing does not require the read-and-restore sequence of ferroelectric capacitor memory, allowing straightforward system operation and interfaces."
      ],
      "tradeoffs": [
        "The current, spacing, and half-select conditions of magnetic-field lines limit density scaling.",
        "Reading and comparison are required before deciding to toggle, so the complete write sequence takes longer than a single physical reversal.",
        "External magnetic fields, packaging, and temperature conditions require product-specific validation; the device cannot be assumed immune to magnetic fields."
      ],
      "ceilings": {
        "device": "The magnetic energy barrier must be high enough to retain data yet permit reliable reversal by a field generated with reasonable current. An improperly designed coupled free layer can follow an incorrect rotation trajectory or lose stable states.",
        "array": "The spacing, current distribution, and half-select disturbance of two write-line sets constrain array scaling. If the lines cannot scale with the bit, a smaller cell does not produce a proportional improvement in effective density.",
        "process": "Magnetic-layer deposition, coupling-layer thickness, and junction etching affect magnetic uniformity. Thermal processing must accommodate the magnetic layers, tunnel barrier, and CMOS interconnects; package reflow conditions also require separate validation.",
        "system": "Pre-write reading, comparison, and worst-case sequencing belong in the access time. Power-failure atomicity, bus transfers, and capacity cost determine system benefit; magnetic reversal time cannot substitute for complete write latency."
      },
      "fit": "Suitable for small records, industrial control, and equipment-state retention when available products meet capacity requirements, updates are frequent, and data must survive power loss. Selection should check actual capacity, interface, operating temperature, and magnetic-field conditions, considering the availability of mature products together with their lifetime conditions.",
      "avoid": "For maximum bit density, low-cost bulk storage, or very small embedded caches at advanced nodes, commercial Toggle availability alone does not establish the best technology choice. Write-line area, drive current, and comparison operations may dominate cost; compare concrete STT implementations and other options with suitable interfaces.",
      "patents": [
        {
          "id": "US6545906B1",
          "url": "https://patents.google.com/patent/US6545906B1/en",
          "priority": "2001-10-16",
          "assignee": "Original Applicant/Assignee: Motorola",
          "figures": "Figure 3: direct/Toggle regions; Figure 4: two-line current sequence; Figure 5: magnetic-moment rotation.",
          "problem": "Keep field writing within a controllable switching region and reduce the sensitivity of direct writing to magnetic-field amplitude and half-select conditions.",
          "mechanism": "Antiferromagnetically coupled free magnetic layers and sequentially applied write fields rotate the free magnetic moments along a designed trajectory to reverse the state.",
          "claimReading": "Claim 1 links the coupled free layer with the write method. Read the layer structure, field order, and state transition together, rather than extracting only the word \"toggle.\"",
          "limit": "This patent discloses a specific Toggle design. It does not establish the actual internal structure of every Everspin product or the patent's current legal status.",
          "filing": "2001-10-16",
          "publication": "2003-04-08",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-SEC",
        "EMG-P-TOGGLE"
      ],
      "quiz": {
        "question": "If the stored data already matches the target value, why must the controller avoid executing another Toggle sequence?",
        "answer": "A Toggle write reverses the current state. Executing it once would invert data that is already correct. The controller must read and compare first, toggling only when the existing and target values differ."
      },
      "eraseCycle": {
        "kind": "magnetic",
        "title": "Erase Semantics: Direct Magnetic Overwrite, No Separate ERS",
        "sequence": "P ⇄ AP",
        "definition": "MRAM overwrites existing data by changing magnetic state, without a Flash-style erase-before-program step. Clearing to all zeros or ones is a series of target-state writes; the P/AP-to-data mapping is product-specific.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-SEC",
          "EMG-P-TOGGLE"
        ],
        "before": "The junction is in the antiparallel, high-resistance state, and the controller requests the earlier data value.",
        "mechanism": "Compare the data, then apply another qualified Toggle write sequence.",
        "after": "The free layer returns to the low-resistance state, parallel to the reference layer."
      }
    },
    {
      "id": "stt",
      "title": "STT-MRAM: Spin Current Through the Junction",
      "family": "Magnetic Memory",
      "storage": "The stored quantity remains the orientation of the free magnetic layer relative to the reference layer, and reading relies on the resistance difference of the magnetic tunnel junction. The principal difference from Toggle is writing: current passing through the magnetic stack carries spin angular momentum and exerts torque on the free layer, changing its magnetic state. Nonvolatility comes from the magnetic energy barrier, not from keeping current inside the device.",
      "structure": "A typical embedded cell places one access transistor in series with one MTJ. The MTJ contains a reference magnetic layer, a thin MgO barrier, and a free magnetic layer; modern designs often use perpendicular magnetic anisotropy. Bit and source lines apply write biases of opposite polarity, while the word line controls the access transistor. The sensing circuit reads through the same junction, creating a shared read/write path.",
      "summary": "STT concentrates write current in the selected junction and improves on the scaling limitations of magnetic-field write lines, making it an important route for commercial discrete and embedded MRAM. Increasing current can shorten switching time, but also raises access-transistor requirements and barrier stress. Reducing current can lengthen latency and worsen the error-rate tail. The best speed, lifetime, and density values from separate conditions cannot be combined into one product specification.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Everspin has shipped STT products with DDR-derived interfaces and SPI-class products. In 2026, its 64Mb high-reliability xSPI product also has evidence of completed production qualification and ordering availability. Embedded implementations must be linked individually to a specific MCU or process document.",
        "sourceIds": [
          "EMG-SEC",
          "EMG-XSPI",
          "EMG-RA8"
        ],
        "limit": "Interface speed is not junction switching time. Production capacity, automotive grade, and qualification year must not be combined across product families."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Switch with Spin Torque in One Direction",
          "before": "The MTJ is in the parallel, low-resistance state, and the target is the opposite data value.",
          "stimulus": "Enable the word line and drive current of the selected polarity through the MTJ for a sufficient pulse duration.",
          "after": "The free layer switches to antiparallel alignment, increasing the sensed resistance.",
          "explanation": "Switching has a probability distribution. Pulse amplitude and duration must cover process, temperature, and the target error rate. A teaching diagram's current arrow represents one stack convention; actual direction must be checked against the electrodes and current convention."
        },
        {
          "id": "erase",
          "title": "Reverse Overwrite: No Separate Physical Erase",
          "before": "The MTJ is in the antiparallel, high-resistance state.",
          "stimulus": "Reverse the junction write-current direction and apply a qualified pulse.",
          "after": "The free layer returns to the parallel, low-resistance state.",
          "explanation": "STT can directly rewrite either magnetic state without first erasing a whole block. A clear command in a particular product may be a controller or interface function; it does not establish a Flash-like physical erase mechanism."
        },
        {
          "id": "read",
          "title": "Read: Sense Resistance Within Read-Disturb Limits",
          "before": "The junction retains one of its magnetic states.",
          "stimulus": "Read with a small current signal far below the normal write requirement and compare it with a reference current.",
          "after": "Output the bit while aiming to preserve the original magnetic state.",
          "explanation": "Reading also produces spin torque, so the signal cannot be increased without limit. The design must simultaneously satisfy sensing speed, read margin, and the long-term cumulative probability of read disturbance."
        }
      ],
      "selection": "The access transistor in a 1T1MTJ cell isolates unselected cells and supplies write current. The word line and bit/source lines jointly determine the address and current direction. The transistor must drive the MTJ at worst-case voltage and temperature, so its area may become a bottleneck before the magnetic device itself. Reference cells, sense amplifiers, and spare rows also count toward macro density.",
      "variability": "MTJ diameter, barrier thickness, magnetic anisotropy, and reference-layer properties create distributions of resistance and critical current. Thermal fluctuations add a probabilistic switching tail, so average write latency alone is insufficient. Grouped pulse settings, write verification, ECC, redundancy, and read-reference design can reduce errors, but they add energy, time, and peripheral area.",
      "advantages": [
        "Write selection can concentrate current in a single junction, supporting further scaling more readily than field writing.",
        "Individual bits can be rewritten directly, combining power-off retention with frequent updates.",
        "Discrete chips and embedded platforms already exist, allowing actual capacity and reliability to be checked in product documents."
      ],
      "tradeoffs": [
        "Reading and writing share the tunnel barrier, requiring joint design of write stress and read disturbance.",
        "Retention, write speed, and current are subject to physical tradeoffs.",
        "As capacity grows, the distribution tails of difficult-to-write or difficult-to-read bits are more likely to dominate yield."
      ],
      "ceilings": {
        "device": "Shrinking the free layer reduces its magnetic energy barrier and may weaken high-temperature retention. Increasing anisotropy to restore stability can increase write current. Barrier breakdown lifetime and stochastic switching tails jointly constrain the operating window.",
        "array": "Access-transistor size, bit-line voltage drop, and write-polarity asymmetry affect writability at the worst-case location. Large arrays must also account for reference drift, tail bits, redundancy, and the actual area overhead of ECC.",
        "process": "MTJ etch redeposition, sidewall damage, and barrier uniformity directly affect shorts and the resistance ratio. The thermal budget must preserve magnetic properties while supporting interconnects and package reflow. Demonstrating room-temperature switching in a cell is insufficient.",
        "system": "Complete latency includes the bus, macro access, possible write verification, and ECC. Higher-level power-failure consistency, cache writeback, and update frequency determine endurance requirements. A DDR-derived interface does not make every behavior equivalent to DRAM."
      },
      "fit": "Suitable for code, equipment state, data logging, and some persistent working memory that require power-off retention and frequent updates. MCU or SoC integration must jointly confirm available capacity, process options, write latency, temperature-dependent lifetime, and software update strategy. Select a concrete macro rather than the MRAM name alone.",
      "avoid": "Generic STT figures are insufficient for decisions involving extremely high density, the lowest bit cost for long-term bulk storage, or unlimited high-frequency writes without workload conditions. Cache replacement also requires worst-case write error rate, energy, and read-disturb checks, rather than average switching speed alone.",
      "patents": [
        {
          "id": "US5695864A",
          "url": "https://patents.google.com/patent/US5695864A/en",
          "priority": "1995-09-28",
          "assignee": "Original Applicant/Assignee: IBM",
          "figures": "Multilayer structure with fixed and variable magnetic moments; use claim 1 to trace the current path.",
          "problem": "Change a magnetic moment with current flowing through a magnetic structure, providing state control without the magnetic field from external write lines.",
          "mechanism": "Current passes through a layered structure containing fixed and variable magnetic moments. Angular-momentum exchange exerts torque on the variable magnetic moment.",
          "claimReading": "Claim 1 focuses on the relationship among the magnetic roles of the layers, current direction, and the change in magnetic moment. Modern MgO junction materials and all 1T1MTJ peripheral circuits must not be read into this early claim.",
          "limit": "A starting point for research into STT principles. It does not establish adoption of a specific embodiment by a foundry or product, nor does it support a conclusion on legal status.",
          "filing": "1995-09-28",
          "publication": "1997-12-09",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-SEC",
        "EMG-XSPI",
        "EMG-RA8",
        "EMG-P-STT"
      ],
      "quiz": {
        "question": "Why cannot STT-MRAM read current simply be increased indefinitely to accelerate sensing?",
        "answer": "Read current also passes through the MTJ, producing spin torque and electrical stress. Higher current increases the signal but may also increase read disturbance and barrier stress. Sensing margin and error rate must be considered together."
      },
      "eraseCycle": {
        "kind": "magnetic",
        "title": "Erase Semantics: Direct Magnetic Overwrite, No Separate ERS",
        "sequence": "P ⇄ AP",
        "definition": "MRAM overwrites existing data by changing magnetic state, without a Flash-style erase-before-program step. Clearing to all zeros or ones is a series of target-state writes; the P/AP-to-data mapping is product-specific.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-SEC",
          "EMG-XSPI",
          "EMG-RA8",
          "EMG-P-STT"
        ],
        "before": "The MTJ is in the antiparallel, high-resistance state.",
        "mechanism": "Reverse the junction write-current direction and apply a qualified pulse.",
        "after": "The free layer returns to the parallel, low-resistance state."
      }
    },
    {
      "id": "sot",
      "title": "SOT-MRAM: Separate Read and Write Paths",
      "family": "Magnetic Memory",
      "storage": "SOT-MRAM also retains data in the magnetization direction of an MTJ free layer and senses it through magnetoresistance. Its distinguishing feature is that write angular momentum is generated primarily by a spin-orbit material beside or beneath the free layer and injected into it, rather than by sending the main write current through the tunnel barrier. The stored physical quantity is therefore similar to STT, while the write structure and array cost differ.",
      "structure": "A typical three-terminal cell places a heavy-metal or other efficient SOT line next to the MTJ free layer. Lateral current flows through the line; vertical read current flows through the MTJ. Writing and reading require their own terminals and selection paths. Field-free switching may also require structural asymmetry, an internal magnetic field, or material engineering. The simplest schematic is not a complete production-ready stack.",
      "summary": "SOT seeks short write pulses and lower barrier stress by separating the read and write paths, making it a focus of last-level-cache research. However, the third terminal and extra line consume area, and deterministic field-free switching, large-array yield, and process integration must also be established. Low-energy or high-cycle-count cell demonstrations satisfy only part of that validation.",
      "maturity": {
        "stage": "Research Demonstration",
        "claim": "imec demonstrated extremely scaled devices and functional arrays in 2023–2024. TSMC's 2025 annual report also records field-free Type-C SOT-MRAM presented at IEDM 2025. These are concrete device and array research results, but they are insufficient to label a last-level cache as being in volume production.",
        "sourceIds": [
          "EMG-SOT23",
          "EMG-SOT24",
          "EMG-TSMC-SOT"
        ],
        "limit": "Existing STT-MRAM volume production and automotive qualifications cannot be transferred to SOT. Failure to identify a commercial product in this review is not a claim that none exists anywhere in the industry."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Generate Spin Torque with Lateral Current",
          "before": "The MTJ free layer is in a stable magnetic state.",
          "stimulus": "Send a write pulse through the SOT line and provide the symmetry-breaking conditions required by the design.",
          "after": "Spin torque switches the free layer to the target magnetic state.",
          "explanation": "A perpendicularly magnetized system generally needs an additional structure or mechanism to select the final direction reliably. A schematic must not assume that one ideal line alone provides deterministic writing with zero external magnetic field."
        },
        {
          "id": "erase",
          "title": "Reverse Overwrite: No Separate Physical Erase",
          "before": "The free layer is already in the opposite magnetic state.",
          "stimulus": "Reverse the line current or apply another qualified write sequence, as required by the device design.",
          "after": "The free layer returns to its previous magnetic state, and the MTJ resistance changes accordingly.",
          "explanation": "This is direct rewriting, with no inherent block-erase requirement. The relationship between current polarity and magnetic state depends on the SOT material, stack orientation, and field-free switching method."
        },
        {
          "id": "read",
          "title": "Read: Sense Through the Independent MTJ Branch",
          "before": "The MTJ magnetic state retains the data; the SOT write line does not need continuous current.",
          "stimulus": "Select the vertical read branch and sense MTJ resistance at low bias.",
          "after": "Retrieve the data while preserving the original magnetic state under normal conditions.",
          "explanation": "Separate paths can reduce the barrier stress from the main write current, but reading must still satisfy disturbance, leakage, resistance-distribution, and reference-circuit requirements."
        }
      ],
      "selection": "Selection must manage both the lateral SOT line and the vertical MTJ read branch, using different transistor and shared-line arrangements as appropriate. Sharing can reduce area but introduces current through unselected devices, line-resistance effects, and current-distribution concerns. Density assessment must show all terminals, access transistors, and lines rather than comparing only MTJ diameters.",
      "variability": "Differences in SOT conversion efficiency, line thickness, magnetic-layer dimensions, interface roughness, and field-free switching structures change the required current and the probability of the final magnetic state. Array validation must examine worst-case tails, thermal conditions, and mutual disturbance rather than only representative devices. Using stochastic switching for probabilistic computing requires retention specifications and statistical validation to be redefined.",
      "advantages": [
        "The main write current bypasses the tunnel barrier, helping reduce barrier write stress.",
        "Read and write paths can be optimized separately, providing research opportunities for short pulses and high-cycle-count operation.",
        "MTJ magnetoresistive sensing remains applicable, preserving some existing magnetic-memory sensing design experience."
      ],
      "tradeoffs": [
        "The third terminal, write line, and selection circuits add area and may offset the benefit of cell scaling.",
        "Deterministic switching without an external magnetic field is not inherent to every SOT stack.",
        "Write-current density, heat, line resistance, and process damage may dominate macro performance."
      ],
      "ceilings": {
        "device": "Spin-torque efficiency, magnetic stability, and deterministic switching must be achieved together. A material that lowers switching current may introduce high line resistance. Device pulse energy must include actual resistance and switching success probability.",
        "array": "Three terminals and separate paths add selection-area cost, while shared lines introduce mutual disturbance and current shunting. Large arrays require validation of writability, sensing margin, and error-rate tails at every location.",
        "process": "Alignment, etching, sidewall cleaning, and interface quality of the SOT line and MTJ affect both torque and read quality. Integration with advanced logic and subsequent thermal processing can also damage materials, requiring validation of the complete process flow.",
        "system": "Last-level-cache requirements include capacity, standby leakage, worst-case write latency, and bandwidth, as well as ECC and coherence costs. Cell-level fJ energy and high cycle counts do not directly establish the energy per access or lifetime of a complete cache."
      },
      "fit": "Suitable for high-speed memory research combining frequent updates, short latency, and power-off retention, particularly where more complex selection and material integration are acceptable. Research programs should develop device, functional-array, and macro models together so that the benefits of separate read and write paths can be verified in effective density and system energy.",
      "avoid": "A SOT research record alone does not establish production readiness for near-term products needing standard off-the-shelf chips, complete automotive qualification data, or a process replacement without integration risk. If area is tightly constrained or external magnetic fields and complex write assists are unacceptable, first verify the specific field-free approach and its array-selection cost.",
      "patents": [
        {
          "id": "US10930843B2",
          "url": "https://patents.google.com/patent/US10930843B2/en",
          "priority": "2018-12-17",
          "assignee": "Original Applicant/Assignee: Spin Memory; subsequent assignments require separate review",
          "figures": "Figures 3–6: lines, selection, and sensing; Figures 7A–7F: process steps.",
          "problem": "Arrange SOT devices, interconnects, and sensing in a scalable array while controlling the integration and area cost of a three-terminal structure.",
          "mechanism": "Use differently oriented lines and SOT-device formation steps to arrange write excitation and read connections in a manufacturing method suitable for arrays.",
          "claimReading": "Claim 1 emphasizes the relationship between lines in two directions and device formation. Use the process order in Figure 7 to distinguish required structural limitations from optional embodiments in the specification.",
          "limit": "This patent does not define the general principle of all SOT devices or establish volume production at a specific foundry. Area claims in the specification are not measured density; patent-family and legal-status comparisons are incomplete.",
          "filing": "2018-12-17",
          "publication": "2021-02-23",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-SOT23",
        "EMG-SOT24",
        "EMG-P-SOT",
        "EMG-TSMC-SOT"
      ],
      "quiz": {
        "question": "Why can a SOT macro still be larger than an STT macro even when the main write current is moved out of the MTJ?",
        "answer": "SOT typically needs a third terminal, a SOT line, and additional selection paths. Shrinking the MTJ does not mean the entire bit and its peripheral circuits shrink together. Effective macro density must be calculated."
      },
      "eraseCycle": {
        "kind": "magnetic",
        "title": "Erase Semantics: Direct Magnetic Overwrite, No Separate ERS",
        "sequence": "P ⇄ AP",
        "definition": "MRAM overwrites existing data by changing magnetic state, without a Flash-style erase-before-program step. Clearing to all zeros or ones is a series of target-state writes; the P/AP-to-data mapping is product-specific.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-SOT23",
          "EMG-SOT24",
          "EMG-P-SOT",
          "EMG-TSMC-SOT"
        ],
        "before": "The free layer is already in the opposite magnetic state.",
        "mechanism": "Reverse the line current or apply another qualified write sequence, as required by the device design.",
        "after": "The free layer returns to its previous magnetic state, and the MTJ resistance changes accordingly."
      }
    },
    {
      "id": "vcm",
      "title": "VCM ReRAM: Oxygen Redistribution and Conductive Paths",
      "family": "Resistive Switching Memory",
      "storage": "VCM stores data in the ionic distribution, local redox state, or interfacial barrier of an oxide, producing distinguishable resistance states. A typical filament model explains conduction and rupture through redistribution of oxygen ions/oxygen vacancies, but not every device has a single clearly defined filament. Materials, electrodes, and measurement evidence determine the mechanism; a hysteretic I–V curve alone is insufficient to identify VCM.",
      "structure": "The teaching cross section uses a metal/oxide/metal stack, optionally including an oxygen reservoir, barrier, or interface-control layer. A 1T1R cell uses a transistor for both selection and current compliance; a 1S1R cell uses a nonlinear selector to suppress unselected paths in a crosspoint array. The conductive path occupies a very small region, but the periphery still requires pulse drivers, forming control, sensing references, and verification circuits. Two-terminal device area alone cannot estimate macro cost.",
      "summary": "VCM operation centers on controlling reversible local changes without driving the oxide into permanent breakdown. SET commonly lowers resistance, while RESET raises it. Some stacks require initial current-limited forming to activate a conductive path. Rebuilding the path may differ slightly on each cycle, making the relationship among forming, write verification, cycling distributions, and retention more important than one attractive typical I–V curve.",
      "maturity": {
        "stage": "Qualification Completed",
        "claim": "Weebit/DB HiTek 130nm BCD RRAM has public evidence of completed technology qualification, and SkyWater S130 has a named 1T1R reliability test vehicle. These support the maturity of resistive-memory integration; a product name alone cannot reveal its complete VCM material cross section.",
        "sourceIds": [
          "EMG-DBH",
          "EMG-S130"
        ],
        "limit": "The oxide VCM description here is a source-supported teaching model. It does not assign the same oxygen-vacancy stack to all commercial RRAM, including TSMC products. Technology qualification also does not establish volume shipments of customer products."
      },
      "operations": [
        {
          "id": "write",
          "title": "SET: Establish a Lower-Resistance State",
          "before": "The device is in a high-resistance state; controlled forming has been completed first if required.",
          "stimulus": "Apply a SET pulse with the polarity specified for the stack, limiting current through the access transistor or driver.",
          "after": "Local ions and defects rearrange, creating a more conductive path or interface and lowering resistance.",
          "explanation": "Current compliance controls path growth. Excessive SET can make RESET difficult or even cause hard breakdown. Forming is not required for every write, and not every process requires it."
        },
        {
          "id": "erase",
          "title": "RESET: Restore a Higher-Resistance State",
          "before": "The device is in a readable low-resistance state.",
          "stimulus": "Apply a reverse-polarity or different-amplitude pulse as specified by the design to promote local oxidation of the path or redistribution of defects.",
          "after": "A gap appears in the conductive path or the barrier increases, raising resistance.",
          "explanation": "RESET is a local resistance-state transition, not a Flash-like block erase. Polarity, thermal effects, and path morphology depend on the material. One bipolar operating mode cannot define the entire family."
        },
        {
          "id": "read",
          "title": "Read: Distinguish Resistance States at Low Bias",
          "before": "The device retains a state within either the high- or low-resistance distribution.",
          "stimulus": "Apply a low read bias sufficient for sensing but intended to avoid ionic rearrangement.",
          "after": "Compare the sensed current with a reference, ideally preserving the original resistance state.",
          "explanation": "Read bias and accumulated read count may cause disturbance. Check worst-case overlap of high- and low-resistance distributions, temperature variation, line resistance, and sensing noise."
        }
      ],
      "selection": "In 1T1R, the word line controls the access transistor, while bit and source lines apply pulses; the transistor also limits current. In 1S1R, strong selector nonlinearity distinguishes fully selected from half-selected biases. The approaches differ in area, forming capability, and sneak paths. A device that switches under a probe does not necessarily have a usable array-selection window.",
      "variability": "Device-to-device variation must be distinguished from cycle-to-cycle variation within the same device. Path location, width, and defect distribution cause SET/RESET voltages and resistance values to vary. Multipulse verification, differential encoding, ECC, and calibration can reduce the impact. Analog weights additionally require validation of update linearity, symmetry, effective state count, and read noise; demonstrating several resistance values is insufficient.",
      "advantages": [
        "The compact two-terminal structure provides design options for interconnect-layer integration and different selection architectures.",
        "Resistance states can be rewritten directly, supporting research and product adoption for embedded code and configuration storage.",
        "Tunable conductance creates opportunities for analog computing and multilevel-state research, with precision and reliability requiring separate evidence."
      ],
      "tradeoffs": [
        "Forming and path growth are stochastic, so the verification algorithm may dominate write latency.",
        "Lower current can reduce energy but may narrow the read margin or weaken path retention.",
        "Crosspoint arrays must address sneak paths, line resistance, half-select disturbance, and selector integration."
      ],
      "ceilings": {
        "device": "The conductive path must switch with bounded pulses while remaining stable at high temperature and low read bias over time. An overly thick path is difficult to reset; an overly thin path may relax. Defect generation can also accumulate into permanent breakdown.",
        "array": "Sneak current and line resistance alter the bias actually reaching the target device, and forming may exceed the selector operating window. Large arrays require read/write reliability validation across position, half-select count, and the tails of resistance-state distributions.",
        "process": "Oxygen content, electrode oxygen affinity, interfacial layers, and deposition uniformity govern reversible switching. Interconnect thermal budgets and contamination requirements must both be met. Low-temperature material deposition does not establish reliability qualification of the complete process.",
        "system": "Write verification, ECC, redundancy, and wear management add time and energy. In-memory computing may be dominated by ADCs, DACs, line-resistance compensation, and model-level error tolerance; device conductance alone does not establish system cost."
      },
      "fit": "Suitable for embedded NVM when a concrete process provides design and qualification support and macro specifications cover the required capacity and endurance. Research applications include analog weights and small crosspoint computing arrays that can tolerate calibration and error compensation, provided array and peripheral costs are counted alongside device energy.",
      "avoid": "VCM variation and selection requirements may be unsuitable when every write must reach exactly the same analog resistance, when a fixed short write time is required without verification, or when two-terminal devices are assumed to scale directly into an arbitrarily large array. A best-case pulse from one device or an image showing successful forming cannot replace high-capacity yield and post-cycling retention data.",
      "patents": [
        {
          "id": "US8331131B2",
          "url": "https://patents.google.com/patent/US8331131B2/en",
          "priority": "2011-01-31",
          "assignee": "Original Applicant/Assignee: Hewlett-Packard Development",
          "figures": "Figure 3: pulses; Figure 5: ionic distributions and barrier states.",
          "problem": "Control state transitions and intermediate states in multilayer resistive-switching devices, improving on the limited precision of simple two-state pulses.",
          "mechanism": "Use a multilayer structure and specific segmented pulses to alter ionic or defect distributions and barriers, moving the device between target resistance states.",
          "claimReading": "First identify the layer structure and operating relationships required by the independent claims, then connect pulses and physical states using Figures 3 and 5. Do not treat the specification's particular two-stage pulse as mandatory for all VCM.",
          "limit": "A specific oxide-switching design, not substitute evidence for a known commercial RRAM cross section. Patent-family and subsequent granted-scope comparisons are incomplete.",
          "filing": "2011-01-31",
          "publication": "2012-12-11",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-VCM08",
        "EMG-P-VCM",
        "EMG-DBH",
        "EMG-S130"
      ],
      "quiz": {
        "question": "Why does a hysteretic current–voltage curve alone not establish that a device uses oxygen-vacancy VCM?",
        "answer": "Several ionic, interfacial, thermal, or electronic mechanisms can produce resistance hysteresis. Materials and electrodes, polarity, time and temperature response, and structural evidence must be considered together to identify the dominant switching mechanism reasonably."
      },
      "eraseCycle": {
        "kind": "resistance",
        "title": "Erase Semantics: RESET Followed by Another SET",
        "sequence": "SET → RESET → SET",
        "definition": "RESET is the reverse data-state update from low to high resistance; a later SET restores low resistance. This is reversible resistance switching rather than Flash-style block erase. The circuit defines logical zero/one encoding.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-VCM08",
          "EMG-P-VCM",
          "EMG-DBH",
          "EMG-S130"
        ],
        "before": "The device is in a readable low-resistance state.",
        "mechanism": "Apply a reverse-polarity or different-amplitude pulse as specified by the design to promote local oxidation of the path or redistribution of defects.",
        "after": "A gap appears in the conductive path or the barrier increases, raising resistance."
      }
    },
    {
      "id": "ecm",
      "title": "ECM/CBRAM: Growing and Dissolving a Metal Bridge",
      "family": "Resistive Switching Memory",
      "storage": "ECM changes a conductive path through the motion and redox reactions of active-metal ions. An existing conductive bridge commonly produces a low-resistance state; dissolving a critical part of the bridge produces a high-resistance state. Both ECM and oxygen-vacancy VCM exhibit resistive switching, but their ion sources and path materials differ. CBRAM is a common commercial name for this conductive-bridge memory. Sharing the ReRAM label does not justify combining their physical models.",
      "structure": "A representative cross section contains an active electrode that supplies a metal such as Ag or Cu, a solid medium that permits ion migration, and a comparatively inert counter electrode. An access transistor or selector is connected in series and limits current during bridge formation. Practical stacks may also require diffusion barriers and interface control to prevent metal migration into CMOS or interconnect regions where contamination is unacceptable.",
      "summary": "During SET, the active metal oxidizes into ions, moves through the medium under an electric field, and is reduced to progressively establish a metal bridge. RESET dissolves part of that bridge. A thin bridge can reduce switching energy but may be destabilized by heat and surface energy. Fast formation and long-term retention must be checked under the same conditions rather than taken from separate best-case experiments.",
      "maturity": {
        "stage": "Historical Commercial Shipments",
        "claim": "The CBRAM section of Adesto's 2019 annual filing explicitly records commercial product shipments. ECM/CBRAM therefore cannot uniformly be labeled as never commercialized. This evidence supports historical product maturity, but does not establish every subsequent node or availability of the original part numbers in 2026.",
        "sourceIds": [
          "EMG-ADESTO"
        ],
        "limit": "Licensing, technology transfer, and new foundry-development programs cannot be elevated to volume-production status on the strength of historical shipments."
      },
      "operations": [
        {
          "id": "write",
          "title": "SET: Form a Conductive Bridge with Metal Ions",
          "before": "The medium has no stable conductive bridge connecting the two electrodes, and the device is in a high-resistance state.",
          "stimulus": "Oxidize the active electrode, apply an electric field to drive metal-ion migration, and limit forming current.",
          "after": "Metal is reduced and grows at nucleation sites, establishing a lower-resistance conductive path.",
          "explanation": "Growth direction and nucleation location depend on the material and kinetics. A single path in a schematic is not the morphology of every real device. Current compliance prevents an excessively thick bridge that would be difficult to RESET."
        },
        {
          "id": "erase",
          "title": "RESET: Dissolve a Critical Part of the Bridge",
          "before": "A metal bridge creates a low-resistance state between the electrodes.",
          "stimulus": "In this bipolar teaching example, apply a suitable reverse bias to oxidize and ionize metal locally.",
          "after": "A narrow part of the bridge opens, breaking the continuous path and returning the device to a high-resistance state.",
          "explanation": "RESET does not remove all the metal. Residual metal or nucleation sites affect the next SET, creating cycle-history effects and variation that are important in reliability analysis."
        },
        {
          "id": "read",
          "title": "Read: Sense at Low Bias Without Reshaping the Bridge",
          "before": "The device has a distinguishable resistance state corresponding to an intact or interrupted bridge.",
          "stimulus": "Apply a lower read bias and sense current under conditions that limit disturbance.",
          "after": "Determine the resistance state while normally preserving the metal-bridge morphology.",
          "explanation": "Accumulated bias and temperature can still drive metal ions. Validate whether prolonged reading and half-select operations gradually change the bridge, rather than checking only a single low-voltage read."
        }
      ],
      "selection": "1T1R can limit SET current while selecting the cell. Crosspoint implementations require a sufficiently nonlinear selector or an appropriate array-bias scheme. Selector tolerance for forming and RESET pulses, half-select leakage, and reverse current must be matched to the memory device. An active-metal bridge can have very low resistance; without current-limited driving, local overcurrent can easily destroy reversibility.",
      "variability": "Metal-ion nucleation sites, bridge width, and residual metal distributions create both cycle-to-cycle and device-to-device variation. Short pulses, current compliance, and write verification can narrow the resistance window but increase operation count and energy. When using these differences for PUFs or stochastic computing, distinguish reproducible fixed features from path noise that changes each time the bridge is rebuilt.",
      "advantages": [
        "The two-terminal structure and localized metallization provide opportunities for low-energy switching.",
        "Resistance states can be rewritten directly without Flash-like block erase.",
        "CBRAM has a history of commercial shipments, allowing practical tradeoffs to be studied through named products and datasheets."
      ],
      "tradeoffs": [
        "Rapid formation and long-term stability of thin metal bridges constrain each other.",
        "Metal diffusion, electrode depletion, and contamination control complicate process integration.",
        "Bridge morphology changes with cycling history, so average SET voltage does not represent tail reliability."
      ],
      "ceilings": {
        "device": "Lower forming energy often implies a thinner bridge, which may break through thermal or surface-energy effects. An overly thick bridge increases RESET energy. Metal depletion, agglomeration, and residue progressively change the reversible switching window.",
        "array": "Low-resistance bridges, sneak paths, and half-select bias can expose non-target devices to additional current. Bidirectional selector operation, current compliance, and line resistance must be matched, and resistance-distribution tails must be tested after extensive cycling.",
        "process": "Active-metal diffusion barriers, medium uniformity, and interfacial nucleation control determine yield. CMOS contamination rules and subsequent thermal processing may impose stricter limits than the device-formation temperature. The full interconnect integration flow requires validation.",
        "system": "Write verification, error correction, and data-update strategy determine achievable lifetime. If supply-chain evidence covers only historical products, current part numbers, temperature conditions, and long-term supply must be checked again. Material potential does not establish system availability."
      },
      "fit": "Suitable for embedded applications requiring low-energy updates of small data records when a specific product or process provides support, and for research into stochastic and analog functions of metal-ion paths. Practical selection must jointly consider post-cycling retention, read disturbance, temperature, and supply, rather than only one SET energy value or the initial resistance ratio.",
      "avoid": "A conceptual ECM design should not be adopted directly for long-term retention at very high temperature without post-cycling retention data, or where active-metal process-contamination constraints are unacceptable. Maturity and algorithms from oxide VCM also cannot simply be transferred to a metal bridge, because the ion sources and failure paths differ.",
      "patents": [
        {
          "id": "US5761115A",
          "url": "https://patents.google.com/patent/US5761115A/en",
          "priority": "1996-05-30",
          "assignee": "Published Assignment Records Include Axon Technologies and the Arizona Board of Regents",
          "figures": "Figures 1A/1B: lateral structure; Figures 4A/4B: vertical structure; claims 1–2.",
          "problem": "Establish a nonvolatile conductive path that can be formed and restored electrically, rather than treating a one-time metal short as rewritable memory.",
          "mechanism": "Control metal-dendrite growth in a solid medium and reverse the resulting conductive state with opposite polarity.",
          "claimReading": "Read claims 1–2 against the metal source, growth path, and reverse-restoration conditions. The lateral and vertical arrangements in the figures are different embodiments; do not combine them into a cell that the patent does not disclose.",
          "limit": "An early metallization-cell patent that provides an entry point to ECM principles. It does not establish that every CBRAM product uses its specific structure, and current legal status is not addressed.",
          "filing": "1996-05-30",
          "publication": "1998-06-02",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-ADESTO",
        "EMG-P-ECM"
      ],
      "quiz": {
        "question": "Why can an ECM metal bridge still influence the next write after RESET?",
        "answer": "RESET often dissolves only part of the bridge, leaving metal and nucleation sites in the medium. These remnants alter the path and threshold of subsequent metal growth, producing cycle-history effects and variation."
      },
      "eraseCycle": {
        "kind": "resistance",
        "title": "Erase Semantics: RESET Followed by Another SET",
        "sequence": "SET → RESET → SET",
        "definition": "RESET is the reverse data-state update from low to high resistance; a later SET restores low resistance. This is reversible resistance switching rather than Flash-style block erase. The circuit defines logical zero/one encoding.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-ADESTO",
          "EMG-P-ECM"
        ],
        "before": "A metal bridge creates a low-resistance state between the electrodes.",
        "mechanism": "In this bipolar teaching example, apply a suitable reverse bias to oxidize and ionize metal locally.",
        "after": "A narrow part of the bridge opens, breaking the continuous path and returning the device to a high-resistance state."
      }
    },
    {
      "id": "pcm",
      "title": "PCM: Controlling Phase with Thermal History",
      "family": "Phase-Change Memory",
      "storage": "PCM stores data in the fraction and geometry of crystalline and amorphous phase-change material. In a typical electronic device, the crystalline state has lower resistance and the amorphous state higher resistance; material kinetics retain the state after power removal. The actual state is more than an abstract resistance value. It includes the location and size of the phase-change region, degree of crystallization, and evolution over time, which jointly determine reading and lifetime.",
      "structure": "Common cross sections use a small bottom heater contact, phase-change material, and a top electrode, or a confined geometry that reduces the heated volume. Access may use a transistor or a selector in a crosspoint array. Thermal isolation, current concentration, and heat removal through interconnects jointly determine pulse efficiency. Projected-PCM research adds a conductive branch; this is not a standard structure shared by all PCM.",
      "summary": "RESET locally melts material with a short, high-peak pulse and rapidly cools it into an amorphous state. SET uses an appropriate thermal history to crystallize the material. Reducing phase-change volume can lower energy, but retention, cycling failure, and thermal crosstalk must still be considered. PCM appears in production MCUs and is also researched for storage-class memory and analog weights. Different uses do not change its phase-based storage mechanism.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "On 2026-09-10, ST's SR6P6C8 product page explicitly lists production status, includes PCM in the product description, and provides specific ordering codes. This is a concrete commercial example of embedded PCM, avoiding judgments about the entire technology family based only on one discontinued storage-class product.",
        "sourceIds": [
          "EMG-STPCM"
        ],
        "limit": "Other devices in the same family may still be in design or engineering-sample stages. The role of ePCM in an MCU does not establish a storage-class-memory interface or capacity."
      },
      "operations": [
        {
          "id": "write",
          "title": "SET: Recrystallize the Amorphous Region",
          "before": "The phase-change region contains more amorphous material and has higher resistance.",
          "stimulus": "Apply a pulse that maintains the crystallization-temperature range long enough for crystal nuclei to grow.",
          "after": "The crystalline fraction in the conductive path increases, lowering resistance.",
          "explanation": "SET is controlled jointly by time and temperature. A stronger pulse is not necessarily better: remelting followed by rapid cooling may return the material to an amorphous state."
        },
        {
          "id": "erase",
          "title": "RESET: Melt and Rapidly Quench",
          "before": "The device has a lower-resistance crystalline conductive path.",
          "stimulus": "Locally melt the material with a short, high-peak pulse, then rapidly reduce current to quench it.",
          "after": "An amorphous region forms across the main path, increasing resistance.",
          "explanation": "RESET requires control of peak amplitude, duration, and cooling rate. It rewrites the phase-change device state; it does not imply that a whole region must first be erased before writing."
        },
        {
          "id": "read",
          "title": "Read: Sense Resistance Without Thermal Switching",
          "before": "The proportions and shapes of the crystalline and amorphous regions retain the data.",
          "stimulus": "Read current at a low-disturbance bias, using state-dependent references when needed.",
          "after": "Retrieve the data without changing the phase state under normal operation.",
          "explanation": "Amorphous resistance drifts with time and temperature, and multilevel reading requires greater precision than binary reading. A cumulative read method in a specific patent may be destructive; ordinary PCM reads are not therefore all destructive."
        }
      ],
      "selection": "In a transistor-based cell, the word line selects the heater paths that can conduct, and the access device must supply RESET current under worst-case conditions. A crosspoint version additionally requires a selector whose nonlinearity isolates half-selected cells. Selector turn-on, line resistance, and thermal crosstalk can all alter the actual thermal history of the phase-change region. An ideal current waveform cannot simply be assumed at every array location.",
      "variability": "Material composition, heater-contact dimensions, amorphous-region shape, and local thermal resistance create write distributions. Structural relaxation also causes resistance to drift with time. Write verification, differential storage, drift compensation, and ECC can reduce errors. Projected PCM uses an additional branch to reduce the dependence of reading on the drifting material, but introduces new tradeoffs in current shunting and interface design.",
      "advantages": [
        "Direct rewriting and power-off retention are possible, with material and geometry choices offering different speed and energy options.",
        "Controlled partial crystallization can create multilevel or cumulative states for analog-weight and in-memory-computing research.",
        "Named embedded products already exist, connecting device thermal physics to real MCU operating conditions."
      ],
      "tradeoffs": [
        "Peak RESET current may require a larger access transistor.",
        "Material kinetics create a tradeoff between fast crystallization and long-term high-temperature retention.",
        "Resistance drift, thermal crosstalk, and material migration after cycling limit multilevel precision and lifetime."
      ],
      "ceilings": {
        "device": "The material must crystallize readily for fast SET while keeping the amorphous state stable over time. Repeated melting and crystallization can cause segregation, atomic migration, and voids, progressively changing resistance and the energy required for switching.",
        "array": "RESET current, line resistance, and heat removal create position-dependent thermal histories, and neighboring devices can be heated. Selectors and access transistors must match the pulses while preserving half-selected data and the read-resistance window.",
        "process": "Heater-contact dimensions, phase-change composition, interfaces, and package thermal history affect the switched volume. Confined and projected structures have different deposition, etching, and material-compatibility costs. Ideal thermal simulations alone are insufficient.",
        "system": "Write verification, drift tracking, ECC, and update strategies increase control overhead. Storage-class-memory use requires persistence and power-failure consistency; analog-weight use must include data-conversion and calibration energy."
      },
      "fit": "Suitable for code and data storage on an available ePCM platform and for multilevel, cumulative, or analog-computing research that can accommodate verification and calibration. Selection requires post-cycling retention and read conditions for the specific product or stack at its operating temperature, with thermal management and access current included in the system assessment.",
      "avoid": "PCM nonvolatility alone does not establish suitability for drift-free long-term precision analog weights, extremely low peak current, or unconditional long-term retention at high temperature. Production status of one ePCM MCU also cannot be converted into proof of volume production for arbitrary high-capacity SCM or crosspoint arrays.",
      "patents": [
        {
          "id": "US5912839A",
          "url": "https://patents.google.com/patent/US5912839A/en",
          "priority": "1998-06-23",
          "assignee": "Original Applicant/Assignee: Energy Conversion Devices",
          "figures": "Figure 1: current and resistance operating regions; claims 1, 18, and 23.",
          "problem": "Establish multilevel programming and controllable cumulative states in phase-change material rather than using only two resistance extremes.",
          "mechanism": "Apply subthreshold or specific cumulative pulses to change the material state progressively, using corresponding sensing methods to distinguish multilevel data.",
          "claimReading": "Read the claims for multilevel writing separately from those for the specific cumulative read method. The latter may change the state; it does not establish that ordinary low-bias resistance sensing is always destructive.",
          "limit": "This patent is not evidence of the internal thermal structure of an ST product, nor does it guarantee identical multilevel precision, retention, or endurance for every PCM implementation.",
          "filing": "1998-06-23",
          "publication": "1999-06-15",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-STPCM",
        "EMG-P-PCM",
        "EMG-PCMDRIFT",
        "EMG-PCMEND",
        "EMG-PCMPROJ"
      ],
      "quiz": {
        "question": "Why might simply increasing the peak amplitude of a SET pulse fail to produce lower resistance?",
        "answer": "A higher peak may melt the material. Rapid cooling afterward can then form an amorphous high-resistance region. The outcome depends on the complete time–temperature history, not current amplitude alone."
      },
      "eraseCycle": {
        "kind": "thermal",
        "title": "Erase Semantics: RESET Quenching and SET Crystallization",
        "sequence": "SET → RESET → SET",
        "definition": "PCM RESET creates a high-resistance amorphous region through local melting and rapid quenching; SET promotes crystallization with a suitable thermal profile. Data is rewritten through pulse-induced thermal histories, not merely voltage reversal or mandatory Flash-style block erase.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-STPCM",
          "EMG-P-PCM",
          "EMG-PCMDRIFT",
          "EMG-PCMEND",
          "EMG-PCMPROJ"
        ],
        "before": "The device has a lower-resistance crystalline conductive path.",
        "mechanism": "Locally melt the material with a short, high-peak pulse, then rapidly reduce current to quench it.",
        "after": "An amorphous region forms across the main path, increasing resistance."
      }
    },
    {
      "id": "feram",
      "title": "Capacitor FeRAM: Sensing Polarization-Switching Charge",
      "family": "Ferroelectric Memory",
      "storage": "The bit is represented by the polarization direction retained in a ferroelectric material after the external electric field is removed. Unlike DRAM, which relies on temporarily stored free charge, FeRAM is based on switchable remanent polarization. Reading uses the different charge responses when polarization switches and when it does not. Distinguishing the material's retention mechanism from the circuit's sensing method explains why nonvolatile memory may still require restoration after a read.",
      "structure": "Common cells use one access transistor and one ferroelectric capacitor in 1T1C, or two transistors and two capacitors for differential 2T2C sensing. The word line controls the transistor, the bit line connects to the sense amplifier, and the plate line excites the ferroelectric capacitor. Capacitor material, area, and reference design determine the available sensing charge. Traditional commercial materials and HfO₂-based ferroelectric capacitors cannot be treated as the same process.",
      "summary": "Writing sets polarization through the electric-field direction. Reading applies an excitation and identifies the original value from the charge difference between switching and non-switching responses. If reading changes polarization, the circuit must restore the original data. Commercial FeRAM can conceal this sequence behind its interface so that the user sees an ordinary read command, but internal restoration, power-failure conditions, and timing remain part of reliability.",
      "maturity": {
        "stage": "In Volume Production",
        "claim": "Infineon EXCELON F-RAM is a named commercial family with a datasheet for the 16Mb CY15B116QI/CY15V116QI. The document specifies the interface, operating temperature, and retention conditions at different temperatures. It supports discussion of conditional product performance without extrapolating from a single material paper.",
        "sourceIds": [
          "EMG-FRAM"
        ],
        "limit": "This is commercial capacitor-based F-RAM. Its endurance and retention years must not be transferred to HfO₂ FeFET or FTJ."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Set Remanent Polarization with an Electric Field",
          "before": "The ferroelectric capacitor has one polarization direction, and the target is the other logic state.",
          "stimulus": "Select the cell and apply an electric field across the capacitor that exceeds the required switching condition.",
          "after": "Polarization aligns in the target direction; remanent polarization remains after voltage removal.",
          "explanation": "Positive and negative polarization can be assigned to logic 0/1 by the design. Validation must establish voltage distribution, switching charge, and write success probability at the worst-case temperature."
        },
        {
          "id": "erase",
          "title": "Polarization Overwrite: No Separate Block Erase",
          "before": "The capacitor retains the previously written polarization direction.",
          "stimulus": "Apply a reverse write field across the same capacitor.",
          "after": "Polarization reverses into the other retained state.",
          "explanation": "This is direct rewriting and usually does not require a prior block erase. If a product offers a chip-clear command, its controller behavior must be distinguished from the cell's polarization physics."
        },
        {
          "id": "read",
          "title": "Read: Compare Switching Charge and Restore Data",
          "before": "One of the two polarization directions represents the original data.",
          "stimulus": "Apply a read excitation through the plate line and sense the bit-line charge difference between switching and non-switching responses.",
          "after": "Sense the original value; if reading changed the polarization, write it back afterward to restore it.",
          "explanation": "Destructive reading means that the sensing operation may change the internal storage state. It does not mean that every external read loses the data. The complete read sequence must include sense latching and restoration timing."
        }
      ],
      "selection": "The word line enables the access transistor, connecting the ferroelectric capacitor to the bit line. The plate line supplies excitation, and the sense amplifier compares charge with a reference cell. A 1T1C design depends on reference precision; 2T2C allows differential sensing at greater area cost. The array must also control voltage distribution across unselected capacitors to prevent unnecessary switching or fatigue from shared plate lines.",
      "variability": "Capacitor area, grains, ferroelectric-phase fraction, and coercive-field distribution change switching charge. Fatigue reduces switchable polarization, imprint makes switching asymmetric between directions, and reference drift reduces sensing margin. Differential circuits, reference design, and timing control can reduce the impact, but a typical polarization curve cannot replace full-array validation of writing, reading, and restoration.",
      "advantages": [
        "Polarization switching offers fast, low-energy nonvolatile storage that supports frequent updates.",
        "Commercial capacitor-based products have explicit datasheets and support practical applications such as industrial logging.",
        "Direct rewriting without prior whole-block erase simplifies retention of small state records."
      ],
      "tradeoffs": [
        "Reading may require restoration, so internal timing and power-failure scenarios must be included in reliability design.",
        "Smaller capacitors provide less sensing charge, constraining high-density scaling.",
        "Ferroelectric integration, reference circuits, and plate lines add process and array cost."
      ],
      "ceilings": {
        "device": "Shrinking the capacitor reduces switchable charge. Increasing the field to strengthen the signal may increase fatigue and dielectric stress. Retention, imprint, and polarization back-switching also depend on material, temperature, and cycling history.",
        "array": "Bit-line parasitic capacitance dilutes the sensing signal. Reference cells and plate-line distributions affect the worst-case read margin. Differential structures improve discrimination at an area cost, and restoration also consumes array timing.",
        "process": "Ferroelectric-film phase, electrodes, and annealing conditions must be integrated with CMOS. Traditional oxides and HfO₂ systems have different material windows. The ability to deposit a ferroelectric material does not establish array-process maturity.",
        "system": "Read restoration, supply droop, and interface completion conditions determine data consistency. Datasheet cycle counts, retention temperatures, and interface clocks describe different levels and must be matched to the actual update workload and environment."
      },
      "fit": "Suitable for frequent data logging, metering, industrial control, and equipment-state retention when existing capacities and interfaces meet the requirements. Selection can use commercial datasheet tables for temperature, retention, and cycling, while checking minimum supply voltage, write-completion conditions, and the power-failure sequence to turn nonvolatility into verifiable system reliability.",
      "avoid": "If the primary goal is extremely high density, the lowest bit cost, or a read operation that never requires internal restoration, FeRAM's high cycle capability should not obscure its structural cost. Specifications of commercial capacitor-based products also cannot guarantee the performance of FeFET or FTJ technologies still under research.",
      "patents": [
        {
          "id": "US4873664A",
          "url": "https://patents.google.com/patent/US4873664A/en",
          "priority": "1987-02-12",
          "assignee": "Original Applicant/Assignee: Ramtron",
          "figures": "Use claim 1 to identify the ferroelectric capacitor, switching device, bit line, word line, plate line, and restoration sequence.",
          "problem": "Arrange nonvolatile-memory operation that restores the original value when polarization sensing may change the data.",
          "mechanism": "Use an access transistor, plate excitation, and sensing/restoration circuits to read polarization charge and write data back when required.",
          "claimReading": "Identify the capacitor, switching device, and three types of control lines in claim 1, then trace capacitor voltage and polarization before and after sensing. The RAM name alone does not make this DRAM-like free-charge storage.",
          "limit": "A historical circuit patent used as a teaching reference. It does not establish that a specific Infineon product uses exactly the same internal circuit. No legal-status or freedom-to-operate judgment has been made.",
          "filing": "1987-02-12",
          "publication": "1989-10-10",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-FRAM",
        "EMG-P-FERAM"
      ],
      "quiz": {
        "question": "If FeRAM retains data after power loss, why might reading still require a writeback?",
        "answer": "Nonvolatility comes from remanent polarization, but some sensing sequences deliberately switch polarization to obtain a charge difference. The original direction must be restored after sensing to preserve the data held before the read."
      },
      "eraseCycle": {
        "kind": "polarization",
        "title": "Erase Semantics: Polarization Reversal and Subsequent Write",
        "sequence": "A → B → A",
        "definition": "An opposite write stimulus changes ferroelectric polarization to another readable state, which can be rewritten again. Research labels such as ERS or RESET refer to that polarization mechanism, not necessarily floating-gate charge removal or block erase.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-FRAM",
          "EMG-P-FERAM"
        ],
        "before": "The capacitor retains the previously written polarization direction.",
        "mechanism": "Apply a reverse write field across the same capacitor.",
        "after": "Polarization reverses into the other retained state."
      }
    },
    {
      "id": "fefet",
      "title": "FeFET: Translating Polarization into Threshold Voltage",
      "family": "Ferroelectric Memory",
      "storage": "FeFET uses ferroelectric polarization in the gate stack to change channel electrostatics, giving the transistor distinguishable high and low threshold voltages. Reading selects a gate bias between those thresholds and senses channel current. Charge trapping and detrapping also affect the actual memory window, so not every threshold-voltage change can be attributed solely to polarization.",
      "structure": "A typical cross section includes a control gate, ferroelectric layer, interfacial dielectric, and semiconductor channel, with the source and drain forming the read path. MFIS and MFMIS, which adds a floating metal layer, are different integration approaches. The crystalline phase, grains, and interfacial layer of HfO₂-based ferroelectrics control polarization and voltage division. A single transistor in a schematic does not mean every array can operate without additional selection.",
      "summary": "FeFET combines ferroelectric retention with transistor current gain, providing research opportunities for nondestructive reading and density scaling. The challenge is that write voltage is divided across both the ferroelectric and interfacial layers, while polarization switching may also generate or fill traps. Polarization stability, memory window, and endurance are not three independently optimizable numbers.",
      "maturity": {
        "stage": "Research Demonstration",
        "claim": "The KIOXIA study associated with IEDM 2023 and reviewed here explicitly demonstrates control of trapped charge and polarization stability through interface engineering. An original FeFET PUF paper provides additional evidence. These support concrete device and circuit research, but are insufficient to identify a commercial production part using this stack.",
        "sourceIds": [
          "EMG-KIOXIA",
          "EMG-FEPUF"
        ],
        "limit": "Some suppliers' ferroelectric-memory production news may refer to capacitor-based structures. Company or material names alone do not establish FeFET volume production. Failure to identify a product in this review does not establish that none exists anywhere in the industry."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Set the Low-Threshold-Voltage State",
          "before": "Device polarization and interfacial charge produce a higher threshold voltage.",
          "stimulus": "Apply a gate write pulse in the selected direction to switch ferroelectric polarization.",
          "after": "Channel electrostatics change, producing a larger current at the specified read gate voltage.",
          "explanation": "This schematic uses an n-channel device and one stack orientation. The actual polarity corresponding to high and low threshold voltage must be checked against the structure. The pulse may also change trapped charge, so the two effects must be separated."
        },
        {
          "id": "erase",
          "title": "Erase / Polarization Reversal: Set the High-Threshold State",
          "before": "The device is in a low-threshold-voltage state and conducts more readily during reading.",
          "stimulus": "Apply an opposite gate pulse to rearrange polarization and the associated interfacial charge.",
          "after": "Threshold voltage rises and current falls at the same read gate voltage.",
          "explanation": "Research often calls the two directions program and erase, but the mechanism is polarization rewriting. It differs from Flash erase through charge removal or neutralization; the named stack defines its threshold direction and operating conditions."
        },
        {
          "id": "read",
          "title": "Read: Sense Between the Two Threshold Voltages",
          "before": "High and low threshold-voltage distributions represent the two data states.",
          "stimulus": "Apply a read gate voltage intended not to switch polarization, together with a small drain bias.",
          "after": "Sense channel current, ideally preserving the original polarization.",
          "explanation": "Read bias must avoid polarization-switching conditions and substantial trap charging or discharging. If the memory window shrinks or distributions overlap, reliable reading can fail even while a typical device still exhibits hysteresis."
        }
      ],
      "selection": "The array uses word lines for gate operation and bit/source lines to sense the channel. Practical schemes may add access transistors or special biases to suppress write and read interference in unselected cells. Write voltage divides across the ferroelectric and interfacial layers. The terminal potentials of half-selected cells must be drawn explicitly; being a transistor does not automatically provide complete isolation.",
      "variability": "A small device contains only a few ferroelectric grains and may switch in discrete steps. Grain orientation, coercive field, interface thickness, and trap distributions also create device-to-device differences. Analog weights require multilevel windows and update control. PUF research can exploit cycle variation, but reproducibility, bias, environment, and reconfiguration conditions need separate testing. Variation is not itself security.",
      "advantages": [
        "The transistor channel amplifies electrical differences caused by polarization, offering potential for nondestructive reading.",
        "Gate integration provides opportunities for single-transistor storage and further scaling.",
        "Multilevel storage, analog computing, and reconfigurable PUFs can be explored, with each application requiring its own validation metrics."
      ],
      "tradeoffs": [
        "Voltage division between the ferroelectric and interfacial layers may require higher write voltage and increase dielectric stress.",
        "Trapped charge may stabilize polarization but may also narrow or shift the memory window.",
        "Few-grain switching and device variation make large-array tails and multilevel precision difficult to control."
      ],
      "ceilings": {
        "device": "Polarization back-switching, depolarization fields, trap generation, and oxide lifetime jointly limit retention and endurance. Introducing trapped charge to stabilize polarization may sacrifice the initial window. Readable distributions must be compared after both cycling and retention.",
        "array": "Write bias may disturb half-selected gates, while threshold-voltage tails and bit-line leakage limit read margin. A small cell does not imply small high-voltage drivers, references, or redundancy overhead. Multilevel data requires particularly fine control.",
        "process": "Ferroelectric phase, grains, doping, annealing, and interfacial-layer thickness require stable control. The floating metal in MFMIS and the direct interface in MFIS introduce different integration problems. A material patent cannot replace complete process qualification.",
        "system": "Analog computing must compensate for window drift, update asymmetry, and read noise. Digital storage requires ECC and update strategies. PUFs must validate entropy, reliability, and the attack model rather than merely provide an attractive threshold-voltage histogram."
      },
      "fit": "Suitable for research into dense embedded storage, transistor-based analog weights, and PUFs with explicit environmental validation. For a target process, first establish a coupled model of ferroelectric behavior and trapping, then validate the worst-case window through array operation so that small-device potential translates into usable sensing margin.",
      "avoid": "FeFET research data is insufficient to promise a mature standard chip in the near term, calibration-free multilevel precision across all temperatures, or direct reuse of the high-cycle specifications of commercial FeRAM. Hysteresis alone does not establish nonvolatility, and short room-temperature retention cannot replace post-cycling lifetime at high temperature.",
      "patents": [
        {
          "id": "US10153155B2",
          "url": "https://patents.google.com/patent/US10153155B2/en",
          "priority": "2015-10-09",
          "assignee": "Original Applicant/Assignee: University of Florida Research Foundation",
          "figures": "Figures 1/2: stack; Figure 4: material images; claim 1.",
          "problem": "Control materials and thermal processing to form HfO₂-based ferroelectric films suitable for electronic devices.",
          "mechanism": "Use layered doping and annealing to adjust film structure and obtain the required ferroelectric properties.",
          "claimReading": "Claim 1 focuses on the film-formation method and layer structure. Descriptions of use in capacitors or transistor gates do not mean that the claim covers every FeFET array operation.",
          "limit": "An entry point to material engineering, not a complete implementation or endurance qualification for any commercial FeFET.",
          "filing": "2016-10-06",
          "publication": "2018-12-11",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        },
        {
          "id": "US11502083B2",
          "url": "https://patents.google.com/patent/US11502083B2/en",
          "priority": "2019-03-26",
          "assignee": "Original Applicant/Assignee: Xiangtan University",
          "figures": "Figures 2 and 3A–3F: device and process steps; claim 1.",
          "problem": "Arrange the gate stack and interfaces in a ferroelectric transistor to address polarization control and integration conditions.",
          "mechanism": "A structure containing a substrate, isolation, source/drain regions, and a stack of buffer layer, floating electrode, ferroelectric layer, and control gate.",
          "claimReading": "The individual layers of claim 1 cannot be omitted. Compare voltage division in MFMIS and MFIS; effects of a specific structure must not become universal FeFET specifications.",
          "limit": "A published device design does not establish product volume production or complete array qualification. Patent-family and legal-status analysis is incomplete.",
          "filing": "2021-09-25",
          "publication": "2022-11-15",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-KIOXIA",
        "EMG-FEPUF",
        "EMG-FMC",
        "EMG-P-HFO",
        "EMG-P-FEFET"
      ],
      "quiz": {
        "question": "Why cannot all FeFET threshold-voltage drift be treated as weakening polarization?",
        "answer": "Traps in the interface and dielectric capture and release charge, also changing threshold voltage and, in turn, polarization stability. Time, bias, and material evidence are needed to separate the two effects."
      },
      "eraseCycle": {
        "kind": "polarization",
        "title": "Erase Semantics: Polarization Reversal and Subsequent Write",
        "sequence": "A → B → A",
        "definition": "An opposite write stimulus changes ferroelectric polarization to another readable state, which can be rewritten again. Research labels such as ERS or RESET refer to that polarization mechanism, not necessarily floating-gate charge removal or block erase.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-KIOXIA",
          "EMG-FEPUF",
          "EMG-FMC",
          "EMG-P-HFO",
          "EMG-P-FEFET"
        ],
        "before": "The device is in a low-threshold-voltage state and conducts more readily during reading.",
        "mechanism": "Apply an opposite gate pulse to rearrange polarization and the associated interfacial charge.",
        "after": "Threshold voltage rises and current falls at the same read gate voltage."
      }
    },
    {
      "id": "ftj",
      "title": "FTJ: Modulating the Tunnel Barrier with Polarization",
      "family": "Ferroelectric Memory",
      "storage": "FTJ controls tunneling current through the polarization direction of a thin ferroelectric barrier. The two directions produce different effective barrier profiles and resistance levels, commonly described through tunnel electroresistance, or TER. FTJ and FeFET both use polarization, but FTJ does not rely on threshold-voltage amplification in a semiconductor channel. Read current, barrier thickness, electrode screening, and leakage therefore become central tradeoffs.",
      "structure": "A typical cell sandwiches an ultrathin ferroelectric layer between two electrodes; it may also include an interfacial dielectric or asymmetric electrodes. A transistor or selector provides selection, and read current passes directly through the barrier. Electrode material, interfacial screening, ferroelectric thickness, and crystallization jointly determine TER. The cross section must identify which layers provide polarization and which primarily limit current.",
      "summary": "FTJ reverses polarization with a larger pulse, then senses tunneling current at a smaller bias, pursuing two-terminal nondestructive storage and interconnect-layer integration. The barrier must be thin enough to provide readable current while retaining stable ferroelectricity and suppressing leakage. An attractive resistance ratio does not establish sufficient absolute read current, much less a reliable selection window for a large array.",
      "maturity": {
        "stage": "Research Demonstration",
        "claim": "The 2024 original FTJ paper and TSMC FTJ structure patent publication reviewed here support concrete thin-film and reliability research. A datasheet and supply evidence identifying a commercial production part using this structure have not been obtained, so the research-demonstration label is retained.",
        "sourceIds": [
          "EMG-FTJ24",
          "EMG-P-FTJ"
        ],
        "limit": "Production status of other TSMC MRAM/RRAM technologies does not automatically place FTJ in volume production. Patent publication, patent grant, and process-product supply are separate events."
      },
      "operations": [
        {
          "id": "write",
          "title": "Write: Set a Lower Tunneling Resistance",
          "before": "Ferroelectric polarization makes the effective barrier less favorable for electron tunneling.",
          "stimulus": "Apply a write pulse across the barrier strong enough to reverse polarization.",
          "after": "Polarization and interfacial potential change, increasing current at the specified low read voltage.",
          "explanation": "The polarization direction corresponding to low resistance depends on electrode and interface asymmetry. A teaching diagram must not define a fixed relationship between up/down arrows and high/low resistance for the entire family."
        },
        {
          "id": "erase",
          "title": "RESET / Polarization Reversal: Set the Higher-Resistance State",
          "before": "The FTJ carries a higher current at the specified read bias.",
          "stimulus": "Apply a reverse write pulse to reset ferroelectric polarization.",
          "after": "The effective barrier returns to the other profile, reducing tunneling current.",
          "explanation": "This is polarization rewriting, sometimes called SET/RESET or program/erase. Those labels do not imply Flash-style block erase; the electrode structure defines the relation between polarization and resistance."
        },
        {
          "id": "read",
          "title": "Read: Compare Tunneling Current at Low Bias",
          "before": "One polarization direction and its corresponding barrier profile retain the data.",
          "stimulus": "Apply a read bias below the normal polarization-switching condition.",
          "after": "Sense current and determine the bit, ideally preserving the original polarization.",
          "explanation": "TER and absolute current must both be observed. A high resistance ratio with extremely small currents may still be limited by sensing noise, leakage, and read time."
        }
      ],
      "selection": "A single FTJ has only two terminals and does not inherently provide complete array isolation. A 1T1FTJ implementation uses a transistor for selection and biasing; a crosspoint array needs a selector or sufficiently nonlinear current characteristics. Half-select voltages may cumulatively affect polarization, and read leakage may obscure small tunneling currents. Device TER and array readability therefore require separate validation.",
      "variability": "Small film-thickness differences can change tunneling current exponentially. Grains, ferroelectric phase, and interfacial traps also affect polarization switching and the barrier. Multilevel research must distinguish a controllable polarization fraction from random leakage paths. Differential cells, pulse verification, and reference calibration may improve behavior, but their additional area and time must also be quantified.",
      "advantages": [
        "The two-terminal structure and nondestructive resistance reading offer research potential for compact integration.",
        "Electrode and interface engineering can tune the barrier, providing design choices different from FeFET.",
        "Thin-film and multilevel-polarization research can support interconnect-layer storage and analog weights, provided the full operating conditions are validated."
      ],
      "tradeoffs": [
        "Tunneling current and polarization retention impose competing requirements on film thickness.",
        "High TER does not necessarily provide sufficient read current, and leakage may undermine practical sensing.",
        "Low-temperature crystallization, interface quality, selectors, and large-array yield require complete integration evidence."
      ],
      "ceilings": {
        "device": "A thinner barrier improves read current but may reduce polarization stability or increase leakage. A thicker barrier reduces the available sensing signal. Electrode screening, depolarization fields, and traps jointly affect retention and TER after cycling.",
        "array": "Small tunneling currents are easily obscured by sneak currents and sensing noise. Half-select pulses may also change polarization cumulatively. The selector turn-on window, line resistance, and cell-current distributions determine the usable array size.",
        "process": "Ultrathin-layer uniformity, ferroelectric crystallization, and electrode/interface reactions are highly sensitive. Lower annealing temperature can benefit interconnect integration, but phase, polarization, and leakage must all meet requirements; deposition alone is insufficient.",
        "system": "With very small read current, sensing time, amplifiers, and calibration energy may offset device-level write savings. Multilevel weights also require management of drift and update distributions. TER or cell cycle count alone cannot compare complete memories."
      },
      "fit": "Suitable for research into two-terminal polarization storage, interconnect-layer integration, and analog weights that tolerate calibration, particularly when electrodes, interfaces, and selectors can be designed together. Research targets should jointly specify absolute read current, TER, pulses, area, retention, and post-cycling distributions to assess suitability for larger arrays.",
      "avoid": "Available research abstracts do not guarantee standard chips deliverable in the near term, calibration-free high-capacity multilevel storage, or extremely low sensing energy without a long integration time. A low-temperature step in a patent also does not establish validation of the complete back-end process and its reliability.",
      "patents": [
        {
          "id": "US20240057343A1",
          "url": "https://patents.google.com/patent/US20240057343A1/en",
          "priority": "2022-08-11",
          "assignee": "Original Applicant/Assignee: Taiwan Semiconductor Manufacturing Company (TSMC)",
          "figures": "Figure 17: FTJ connection to a transistor; claims 1 and 17.",
          "problem": "Form a thin ferroelectric structure with the required properties within an integrable thermal budget and connect it to a memory circuit.",
          "mechanism": "Bring a catalytic metal into contact with the ferroelectric material and use film and annealing steps to adjust formation conditions. The figures also show an embodiment connected to a transistor.",
          "claimReading": "Claim 1 focuses on the material and its contact with a catalytic metal; claim 17 focuses on the formation method. Distinguish structure, method, and effects described in the specification. Do not read every feature from every figure into every claim as a required limitation.",
          "limit": "The reviewed document is the A1 publication. Family records include US12550335B2, granted on 2026-02-10; discussing the granted scope requires a separate reading of B2. Neither publication nor grant establishes FTJ volume production.",
          "filing": "2022-08-11",
          "publication": "2024-02-15",
          "verifiedAt": "2026-09-10",
          "dateNote": "Priority, the filing date of this U.S. application, and the publication/grant date of the listed publication number are recorded separately. Dates were checked against published patent bibliographic records; no conclusion on legal rights or status is made."
        }
      ],
      "sourceIds": [
        "EMG-FTJ24",
        "EMG-P-FTJ"
      ],
      "quiz": {
        "question": "Why can an FTJ still read slowly despite a large high-to-low resistance ratio?",
        "answer": "A large ratio does not mean a large absolute current. If both state currents are very small, the sense circuit needs a longer integration time and becomes more sensitive to leakage and noise. TER and current magnitude must be evaluated together."
      },
      "eraseCycle": {
        "kind": "polarization",
        "title": "Erase Semantics: Polarization Reversal and Subsequent Write",
        "sequence": "A → B → A",
        "definition": "An opposite write stimulus changes ferroelectric polarization to another readable state, which can be rewritten again. Research labels such as ERS or RESET refer to that polarization mechanism, not necessarily floating-gate charge removal or block erase.",
        "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
        "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
        "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
        "sourceIds": [
          "EMG-FTJ24",
          "EMG-P-FTJ"
        ],
        "before": "The FTJ carries a higher current at the specified read bias.",
        "mechanism": "Apply a reverse write pulse to reset ferroelectric polarization.",
        "after": "The effective barrier returns to the other profile, reducing tunneling current."
      }
    }
  ],
  "comparison": {
    "sources": [
      {
        "id": "CMP-YU2016",
        "label": "Yu and Chen: Emerging Memory Technologies—Recent Trends and Prospects",
        "url": "https://knowen-production.s3.amazonaws.com/uploads/attachment/file/5249/yu2016.pdf",
        "kind": "Original Technical Review",
        "locator": "IEEE Solid-State Circuits Magazine 8(2), 43–56; p44, Table 1; DOI 10.1109/MSSC.2016.2546199",
        "date": "2016",
        "limit": "The original table includes only STT-MRAM, PCRAM, and RRAM in its emerging-technology columns. Representative values and cell-level energy estimates are not guarantees for modern products."
      },
      {
        "id": "CMP-LECTURE2021",
        "label": "Shimeng Yu: Comparison Table from Lecture 6, 2021",
        "url": "https://www.youtube.com/watch?v=_Ov2KUZTIv8&t=2165s",
        "kind": "Lecture and Supplied Screenshot",
        "locator": "Slide p14, dated 2021/11/1; comparison segment at 36:05–43:49; every table cell was checked against the screenshot at its original size",
        "date": "2021-11-01",
        "limit": "The course cites and extends the 2016 paper, adding SOT-MRAM, FeRAM, and FeFET. This website retains the historical values without presenting them as universal specifications for 2026."
      },
      {
        "id": "CMP-FRAM-PRODUCT",
        "label": "Infineon CY15B104QSN-108SXI Product Status",
        "url": "https://www.infineon.com/part/CY15B104QSN-108SXI",
        "kind": "Supplier Product Page",
        "locator": "Product status, 4 Mb capacity, and interface specifications",
        "date": "Verified 2026-09-10",
        "limit": "Active supply status applies to the specified part number; it cannot be generalized to every ferroelectric-memory implementation."
      },
      {
        "id": "CMP-FRAM-DS",
        "label": "Infineon CY15B104QSN/CY15V104QSN Datasheet",
        "url": "https://www.infineon.com/dgdl/Infineon-CY15B104QSN_CY15V104QSN_4Mb_EXCELON_Ultra_Ferroelectric_RAM_F-RAM_Serial_quad_SPI_512K_8_108_MHz_industrial-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee59c446d71",
        "kind": "Product Datasheet",
        "locator": "002-18293 Rev. *N; p1 and p105, Table 63",
        "date": "2024-07-25",
        "limit": "The 151-year retention rating applies at 65°C; retention at 85°C is 10 years. Interface frequency is not cell read or write latency."
      },
      {
        "id": "CMP-MRAM-PRODUCT",
        "label": "Everspin MR25H40 Products and Part Numbers",
        "url": "https://www.everspin.com/products/series/mr25h40",
        "kind": "Supplier Product Page",
        "locator": "Toggle MRAM technology field, production status, and part numbers by temperature grade",
        "date": "Verified 2026-09-10",
        "limit": "Supply status and temperature grades vary by part number. Toggle MRAM specifications do not describe STT or SOT implementations."
      },
      {
        "id": "CMP-MRAM-DS",
        "label": "Everspin MR20H40/MR25H40 Datasheet",
        "url": "https://www.everspin.com/sites/default/files/EST00459_MR2xH40_Datasheet_Rev12.6_08092020.pdf",
        "kind": "Product Datasheet",
        "locator": "Revision 12.6; p1 product features and interface description",
        "date": "2020-08",
        "limit": "Unlimited read/write cycling is the supplier's specification for this product, not a physical law that all MRAM can never fail."
      },
      {
        "id": "CMP-EVERSPIN2024",
        "label": "Everspin 2024 Annual Filing",
        "url": "https://www.sec.gov/Archives/edgar/data/1438423/000155837025001827/mram-20241231x10k.htm",
        "kind": "Statutory Company Filing",
        "locator": "STT-MRAM product and shipment disclosures",
        "date": "Filed in 2025; fiscal year 2024",
        "limit": "Supports commercial shipments of 256 Mb and 1 Gb STT-MRAM. It does not establish volume production for unlisted densities or technologies."
      },
      {
        "id": "CMP-EVERSPIN2026",
        "label": "Everspin High-Reliability xSPI MRAM Production Qualification Progress",
        "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
        "kind": "Supplier Announcement",
        "locator": "Completed qualification and orderability of 64 Mb; expected schedules for 128 Mb/256 Mb",
        "date": "2026-03-05",
        "limit": "Only completed milestones establish completion. Passing a forecast date does not automatically demonstrate that the plan was fulfilled."
      },
      {
        "id": "CMP-RERAM-PRODUCT",
        "label": "RAMXEED ReRAM Product Family",
        "url": "https://www.ramxeed.com/zh-tw/products/reram-products/",
        "kind": "Supplier Product Page",
        "locator": "Production-status fields for MB85AS8MT and MB85AS12MT",
        "date": "Verified 2026-09-10",
        "limit": "The 8 Mb device is listed as in mass production; the 12 Mb device requires an inquiry. A datasheet or sampling announcement is not evidence of volume production."
      },
      {
        "id": "CMP-RERAM-DS",
        "label": "RAMXEED MB85AS8MT Datasheet",
        "url": "https://www.ramxeed.com/assets/images/products/datasheet/ReRAM/MB85AS8MT-DS2v2-E.pdf",
        "kind": "Product Datasheet",
        "locator": "DS501-00060-2v2-E; p8, p12–13, p17, and p20",
        "date": "2024",
        "limit": "Product tWC includes the internal nonvolatile-write sequence and differs from a switching pulse measured on a research cell. Endurance is specified per 4 bytes."
      },
      {
        "id": "CMP-PCM-PRODUCT",
        "label": "ST SR6P6C8 Microcontroller with Embedded PCM",
        "url": "https://www.st.com/en/automotive-microcontrollers/sr6p6c8.html",
        "kind": "Supplier Product Page",
        "locator": "Production status at the top of the page, memory features, and the quality-and-reliability part-number table",
        "date": "Verified 2026-09-10",
        "limit": "Supports volume production of SR6P6C8 and its listed part numbers. It does not establish the status of every Stellar device or PCM implementation."
      },
      {
        "id": "CMP-TSMC-STT2019",
        "label": "TSMC 22 nm STT-MRAM: Reflow, Automotive Reliability, and Performance Options",
        "url": "https://research.tsmc.com/page/mram/1.html",
        "kind": "Authors' Research Abstract",
        "locator": "Gallagher et al., 2019; 20 Mb design and alternative MTJ options",
        "date": "2019",
        "limit": "The 6 ns sensing result and write time slightly above 30 ns belong to a performance option that gives up reflow retention. They cannot be combined with the separate high-retention option."
      },
      {
        "id": "CMP-KIOXIA2026",
        "label": "Kioxia/Sandisk Research on 10th-Generation 2 Tb QLC NAND",
        "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-92.html",
        "kind": "Author-Institution Research Article",
        "locator": "ISSCC 2026; DOI 10.1109/ISSCC49663.2026.11409136; 332 layers and die-level density",
        "date": "2026-07-15",
        "limit": "Die-level Gb/mm² and write throughput cannot be substituted directly for cell F² or host-visible SSD performance. Publication of research does not by itself establish volume production across the product range."
      },
      {
        "id": "CMP-OPTANE-PERF",
        "label": "Intel Optane P5800X Performance and Test Conditions",
        "url": "https://edc.intel.com/content/www/us/en/products/performance/benchmarks/intel-optane-ssd-p5800x-series/",
        "kind": "Supplier System Measurement",
        "locator": "Items 11 and 12; Xeon 8380, Ubuntu 20.04.2, and FIO 3.16",
        "date": "Tested 2021-03-18",
        "limit": "Average latency for 512 B and 4 KB random reads. These values are not tail latency, cell switching time, or evidence of new-product availability in 2026."
      },
      {
        "id": "CMP-MICRON2021",
        "label": "Micron 3D XPoint and Data-Center Portfolio Strategy Update",
        "url": "https://investors.micron.com/news/press-release/2021/Micron-Updates-Data-Center-Portfolio-Strategy-to-Address-Growing-Opportunity-for-Memory-and-Storage-Hierarchy-Innovation-03-16-2021/default.aspx",
        "kind": "Supplier Announcement",
        "locator": "Immediate discontinuation of 3D XPoint development and a shift toward CXL-related investment",
        "date": "2021-03-16",
        "limit": "Establishes the end of development; it does not mean that manufacturing or shipments of all existing products stopped on the same date."
      },
      {
        "id": "CMP-MICRON-CALL2021",
        "label": "Micron 3D XPoint Strategy-Update Prepared Remarks",
        "url": "https://investors.micron.com/static-files/c858cbb2-bfd2-4f84-ba10-f69b385cf4bf",
        "kind": "Company Investor-Call Document",
        "locator": "p4: manufacturing to end after industry commitments are fulfilled",
        "date": "2021-03-16",
        "limit": "Manufacturing withdrawal follows existing commitments. The document does not determine the last shipment date for every part number."
      },
      {
        "id": "CMP-MICRON-LEHI2021",
        "label": "Micron Completes the Sale of the Lehi Fab",
        "url": "https://www.micron.com/about/blog/company/partners/sale-of-lehi-fab",
        "kind": "Supplier Announcement",
        "locator": "Transaction closing date and background on 3D XPoint production",
        "date": "Transaction closed 2021-10-22",
        "limit": "The fab sale is a separate event; it does not mean that all systems or support services ended at the same time."
      },
      {
        "id": "CMP-INTEL2023",
        "label": "Intel Optane Customer Letter",
        "url": "https://cdrdv2-public.intel.com/774331/IOG-DCL-March%202023.pdf",
        "kind": "Supplier Lifecycle Announcement",
        "locator": "Discontinuation of further development in July 2022; inventory and support statements",
        "date": "2023-03-21",
        "limit": "Availability through 2025 was a demand-dependent inventory forecast made at the time. Support resources through 2030 are not a commitment to continued manufacturing."
      },
      {
        "id": "CMP-SNIA-PM",
        "label": "SNIA Definition of Persistent Memory",
        "url": "https://www.snia.org/education/what-is-persistent-memory",
        "kind": "Industry-Organization Technical Explanation",
        "locator": "Nonvolatility, byte addressability, low latency, and CXL attachment",
        "date": "Verified 2026-09-10",
        "limit": "The definition and use of persistent memory depend on context; the term SCM has not been used identically across different periods."
      },
      {
        "id": "CMP-CXL2022",
        "label": "CXL 3.0 Specification",
        "url": "https://computeexpresslink.org/wp-content/uploads/2024/02/CXL-3.0-Specification.pdf",
        "kind": "Original Specification",
        "locator": "Version 3.0, p636: flags for volatile and persistent memory ranges",
        "date": "2022-08-01",
        "limit": "Protocol support for persistence does not mean that every CXL device contains persistent media or shares the same failure-protection domain."
      },
      {
        "id": "CMP-CXL-FAQ2021",
        "label": "CXL Consortium Persistent-Memory Webinar Questions and Answers",
        "url": "https://computeexpresslink.org/blog/questions-from-the-compute-express-link-cxl-supporting-persistent-memory-webinar-2407/",
        "kind": "Standards-Organization Technical Q&A",
        "locator": "CXL.mem, multiple media types, controllers, and device forms",
        "date": "2021-07-27",
        "limit": "Supports treating media and attachment as separate concepts. The concepts discussed do not guarantee that a particular product implements every optional capability."
      },
      {
        "id": "CMP-SAMSUNG-CMM",
        "label": "Samsung CXL Memory and CMM-D",
        "url": "https://semiconductor.samsung.com/cxl-memory/",
        "kind": "Supplier Product-Technology Explanation",
        "locator": "CMM-D name, DRAM media, and CXL interface",
        "date": "Verified 2026-09-10",
        "limit": "DRAM memory expansion and sharing do not imply data retention through power loss."
      },
      {
        "id": "CMP-CXL2026",
        "label": "DRAM, NAND, and Backup Energy in CXL Persistent Memory",
        "url": "https://computeexpresslink.org/blog/from-nvdimm-n-to-cxl-persistent-memory-bringing-persistence-to-the-memory-fabric-4635/",
        "kind": "Member Technical Article Published by the CXL Consortium",
        "locator": "Netlist: NVDIMM-N and CXL save/restore architectures",
        "date": "2026-05-25",
        "limit": "An architectural explanation, not direct evidence that a specific CXL persistent-memory product is in volume production. The DRAM cells themselves remain volatile."
      },
      {
        "id": "CMP-IBM-SELECTOR2017",
        "label": "IBM: Memory Selector Devices and Crossbar Array Design",
        "url": "https://research.ibm.com/publications/memory-selector-devices-and-crossbar-array-design-a-modeling-based-assessment",
        "kind": "Author-Institution Research Abstract",
        "locator": "An Chen; nonlinearity, rectification, and array trade-offs for two-terminal selectors",
        "date": "2017-09-02",
        "limit": "Selector capabilities must be assessed together with the storage device and array conditions. A single nonlinearity ratio cannot establish complete-system feasibility."
      },
      {
        "id": "CMP-IBM-ARRAY2014",
        "label": "IBM: Design Space for Resistive-Memory Arrays with MIEC Selectors",
        "url": "https://research.ibm.com/publications/exploring-the-design-space-for-resistive-nonvolatile-memory-crossbar-arrays-with-mixed-ionic-electronic-conduction-miec-based-access-devices",
        "kind": "Authors' Research Abstract",
        "locator": "DRC 2014; selector leakage, write power, wire resistance, and array size",
        "date": "2014-06-22",
        "limit": "This study uses a specific MIEC selector and circuit simulations. It illustrates trade-offs; it does not establish that the same factor limits every crossbar array."
      },
      {
        "id": "CMP-NIST-VERIFY2017",
        "label": "NIST: Impact of RRAM Read Fluctuations on Program Verify",
        "url": "https://www.nist.gov/publications/impact-rram-read-fluctuations-program-verify-approach",
        "kind": "Original-Research Page at the Authors' Institution",
        "locator": "Nminibapiel et al.; IEEE Electron Device Letters; false reads and distribution tails",
        "date": "2017-05-22",
        "limit": "Experiments on a specific oxide RRAM show that read fluctuations can mislead verification. They do not imply that every program-verify method is ineffective."
      },
      {
        "id": "CMP-IBM-PCM2020",
        "label": "IBM: Precision Limits of Closed-Loop PCM Programming",
        "url": "https://research.ibm.com/publications/precision-of-synaptic-weights-programmed-in-phase-change-memory-devices-for-deep-learning-inference",
        "kind": "Authors' Research Abstract",
        "locator": "IEDM 2020; array experiments with more than 1,000 PCM devices",
        "date": "2020-12-12",
        "limit": "Read-noise and drift results for analog-weight programming cannot be treated directly as product specifications for every digital PCM implementation."
      },
      {
        "id": "CMP-TSMC-ECC2023",
        "label": "TSMC and Collaborators: Read Compensation and ECC in an RRAM Macro",
        "url": "https://research.tsmc.com/page/artificial-intelligence/3.html",
        "kind": "Authors' Research Abstract",
        "locator": "2023, 40 nm RRAM compute macro; offset, leakage, IR drop, and error rate after calibration",
        "date": "2023",
        "limit": "The compute-macro demonstration illustrates the importance of peripheral circuits and calibration. Its compute efficiency and error rate do not represent all storage-oriented RRAM."
      },
      {
        "id": "CMP-PMDK",
        "label": "PMDK libpmem Persistence Operations",
        "url": "https://pmem.io/pmdk/libpmem/",
        "kind": "Original Software-Project Documentation",
        "locator": "Cache flushing and hardware-buffer draining for persistence; platform differences",
        "date": "Verified 2026-09-10",
        "limit": "An educational example of persistence semantics. Implementations still require the correct API for the platform and software version; this is not a universal processor-instruction sequence."
      },
      {
        "id": "CMP-SNIA-ATOMICS2017",
        "label": "SNIA: Persistent Memory Atomics and Transactions",
        "url": "https://www.snia.org/sites/default/files/technical-work/whitepapers/SNIA-Persistent-Memory-Atomics-Transactions-WP.pdf",
        "kind": "Industry-Organization Technical White Paper",
        "locator": "p14 and related sections: flush ordering, linked data structures, and failure atomicity",
        "date": "2017-01-10",
        "limit": "Atomic-write granularity in the examples belongs to the assumed machine architecture. Persistence and transaction atomicity must not be conflated."
      },
      {
        "id": "CMP-SNIA-NPM",
        "label": "SNIA NVM Programming Model",
        "url": "https://www.snia.org/sites/default/files/technical-work/npm/release/SNIA-NVM-Programming-Model-v1.pdf",
        "kind": "Original Technical Specification",
        "locator": "Version 1; Section 10.2.4 and p59: synchronization, persistence domains, and atomicity boundaries",
        "date": "Version 1; historical specification",
        "limit": "Used for fundamental semantics and the development of the concepts. This does not claim that the cited version is the latest implementation specification in 2026."
      }
    ],
    "historicalTable": {
      "intro": "This historical comparison table is reconstructed from the screenshot of slide 14 in the course dated 2021-11-01. That slide cites Yu and Chen's 2016 paper and adds SOT-MRAM, FeRAM, FeFET, and several numerical updates, so the complete table cannot be called the original 2016 table. The course values are retained as a baseline for learning how to compare technologies; they are not uniform product specifications for each family in 2026. F is the lithographic feature size used in the course, and energy is estimated at the cell level. The original slide also describes the values as representative, rather than best-case or worst-case figures.",
      "columns": [
        "SRAM",
        "DRAM",
        "NOR Flash",
        "NAND Flash",
        "PCM",
        "RRAM",
        "STT-MRAM",
        "SOT-MRAM",
        "FeRAM",
        "FeFET"
      ],
      "rows": [
        {
          "metric": "Cell Area",
          "values": [
            ">150 F²",
            "6 F²",
            "10 F²",
            "<4 F² (3D)",
            "4–50 F²",
            "4–50 F²",
            "6–50 F²",
            "12–100 F²",
            "6–50 F²",
            "6–50 F²"
          ],
          "note": "The course's area notation is retained. The original slide also states that PCM, RRAM, and FeFET could reach below 4 F² through 3D integration. This is not a strictly equivalent comparison of physical cell area, effective area per bit, and complete-die density within one process."
        },
        {
          "metric": "Bits per Cell",
          "values": [
            "1",
            "1",
            "2",
            "3–4",
            "2–3",
            "2–3",
            "1",
            "1",
            "1",
            "2–3"
          ],
          "note": "The course's representative values are retained. A multibit research demonstration does not establish the usable number of bits in a specified product under its temperature, endurance, and retention conditions."
        },
        {
          "metric": "Operating Voltage",
          "values": [
            "<1 V",
            "<1 V",
            ">10 V",
            ">10 V",
            "<3 V",
            "<3 V",
            "<1 V",
            "<1 V",
            "<2 V",
            "<3 V"
          ],
          "note": "The course does not distinguish supply, read, write, forming, and internally boosted voltages in every cell of the table. Updated product comparisons must separate these quantities; they cannot be compared directly with a part number's VDD."
        },
        {
          "metric": "Read Time",
          "values": [
            "~1 ns",
            "~10 ns",
            "~50 ns",
            "~10 µs",
            "<10 ns",
            "<10 ns",
            "<10 ns",
            "~1 ns",
            "<100 ns",
            "<50 ns"
          ],
          "note": "These are representative time scales from the course. They are not tied to common capacity, peripheral circuits, sensing methods, or interface completion points."
        },
        {
          "metric": "Write Time",
          "values": [
            "~1 ns",
            "~10 ns",
            "10 µs–1 ms",
            "100 µs–1 ms",
            "~50 ns",
            "<100 ns",
            "<20 ns",
            "<3 ns",
            "<100 ns",
            "<100 ns"
          ],
          "note": "An updated comparison must separately record erase, SET/RESET, pulse duration, verification and retries, and total time from entry into a data buffer to completion of the nonvolatile write."
        },
        {
          "metric": "Data Retention",
          "values": [
            "N/A",
            "~64 ms",
            ">10 years",
            ">10 years",
            ">10 years",
            ">10 years",
            ">1 years",
            ">1 years",
            ">10 years",
            ">1 years"
          ],
          "note": "The original table does not specify temperature, prior cycling, or extrapolation conditions for every entry. SRAM requires power. The time scale for dynamic storage or refresh in DRAM is not the same guarantee as power-off retention in NVM."
        },
        {
          "metric": "Endurance",
          "values": [
            ">10¹⁶ cycles",
            ">10¹⁶ cycles",
            "~10⁵ cycles",
            "10³–10⁴ cycles",
            "10⁶–10⁹ cycles",
            "10³–10⁹ cycles",
            "10⁶–10¹⁴ cycles",
            "~10¹² cycles",
            "10⁹–10¹² cycles",
            "10⁶–10⁹ cycles"
          ],
          "note": "Historical ranges are retained cell by cell. The sources do not use a common bit/page/block granularity, definition of a read/write cycle, error threshold, ECC policy, temperature, or retention test."
        },
        {
          "metric": "Write Energy",
          "values": [
            "~fJ-scale/bit",
            "~10 fJ/bit",
            "100 pJ/bit",
            "~10 fJ/bit",
            "~10 pJ/bit",
            "~pJ-scale/bit",
            "~pJ-scale/bit",
            "~pJ-scale/bit",
            "~100 fJ/bit",
            "~fJ-scale/bit"
          ],
          "note": "The original slide explicitly limits these estimates to the cell level, excluding the complete array periphery. fJ denotes 10⁻¹⁵ J and pJ denotes 10⁻¹² J. Entries without a numerical coefficient remain order-of-magnitude estimates; no precise value is invented."
        }
      ],
      "corrections": [
        {
          "old": "Treating Every Technology and Value in the Course Screenshot as Table 1 of the 2016 Paper",
          "current": "The emerging-technology columns in the 2016 paper contain only STT-MRAM, PCRAM, and RRAM. The 2021 course adds SOT-MRAM, FeRAM, and FeFET.",
          "reason": "Distinguish the original paper from the lecturer's later additions so that the provenance remains traceable.",
          "sourceIds": [
            "CMP-YU2016",
            "CMP-LECTURE2021"
          ]
        },
        {
          "old": "Assuming the 2016 and 2021 Tables Have Identical Values",
          "current": "Three differences have been verified: SRAM area changes from >100 F² to >150 F²; NAND bits per cell change from 3 to 3–4; and STT-MRAM endurance changes from >10¹⁵ to 10⁶–10¹⁴ cycles.",
          "reason": "These differences show that the course table was updated, but a representative value from any particular year is not a guarantee for an entire technology family.",
          "sourceIds": [
            "CMP-YU2016",
            "CMP-LECTURE2021"
          ]
        },
        {
          "old": "Assuming FeRAM, MRAM, ReRAM, and PCM Are All Preproduction Because They Are Called Emerging Memories",
          "current": "As of 2026-09-10, these families have verifiable commercial products or implementations in volume production: CY15B104QSN, MR25H40/Everspin STT-MRAM, MB85AS8MT, and ST SR6P6C8.",
          "reason": "Maturity must be tied to the subtechnology, materials, process, and specific part number, not assigned solely by the family name.",
          "sourceIds": [
            "CMP-FRAM-PRODUCT",
            "CMP-MRAM-PRODUCT",
            "CMP-EVERSPIN2024",
            "CMP-RERAM-PRODUCT",
            "CMP-PCM-PRODUCT"
          ]
        },
        {
          "old": "Using a Nanosecond Cell Pulse to Label the Entire Product's Write Latency as Nanoseconds",
          "current": "Separate cell switching, array sensing, macro completion, and host-visible latency. The MB85AS8MT specifies product tWC of 5 ms typical and 10 ms maximum, and write-completion status must be checked.",
          "reason": "Buffering, internal programming, and control sequences can all add time.",
          "sourceIds": [
            "CMP-RERAM-DS",
            "CMP-OPTANE-PERF"
          ]
        },
        {
          "old": "Equating 40 MHz SPI with a Complete Read or Write Transaction in 25 ns",
          "current": "25 ns is the clock period. A complete transaction also includes the instruction, address, data transfer, and any internal write wait.",
          "reason": "Frequency describes the transfer cadence; latency describes how long it takes to complete an operation.",
          "sourceIds": [
            "CMP-MRAM-DS",
            "CMP-RERAM-DS"
          ]
        },
        {
          "old": "Treating 151-Year and 10-Year Retention as Unconditional Family Characteristics",
          "current": "The CY15B104QSN's 151-year rating applies at 65°C; the rating is 38 years at 75°C and 10 years at 85°C. Retention must also be paired with the specified cycling and test conditions.",
          "reason": "Temperature and usage history change the probability of state failure. Comparing years alone is insufficient.",
          "sourceIds": [
            "CMP-FRAM-DS"
          ]
        },
        {
          "old": "Treating Below 4 F², 332 Layers, and 37.6 Gb/mm² as the Same Density Metric",
          "current": "Record physical cell footprint, layer count, bits per cell, array efficiency, and complete-die bit density separately.",
          "reason": "3D stacking and multibit storage change effective bit density. Peripheral circuits, redundancy, and ECC also occupy area.",
          "sourceIds": [
            "CMP-LECTURE2021",
            "CMP-KIOXIA2026"
          ]
        },
        {
          "old": "Using Cell-Level fJ per Bit to Rank Product or System Energy Efficiency",
          "current": "Compare cell pulses, wire charging and discharging, selector leakage, charge pumps, verification, ECC, and interface energy at their respective levels.",
          "reason": "Low cell energy does not guarantee the same advantage in a large array or a workload with low utilization.",
          "sourceIds": [
            "CMP-LECTURE2021",
            "CMP-IBM-ARRAY2014",
            "CMP-TSMC-ECC2023"
          ]
        },
        {
          "old": "Treating Volume Production, Emerging Memory, and SCM as Mutually Exclusive Bitcell Categories",
          "current": "Volume production is a maturity state; emerging describes a development stage or a convention in the literature; SCM is a system role within the memory/storage hierarchy.",
          "reason": "The same storage physics can support different maturity levels and applications. The classification dimensions must remain separate.",
          "sourceIds": [
            "CMP-YU2016",
            "CMP-SNIA-PM",
            "CMP-CXL-FAQ2021"
          ]
        },
        {
          "old": "Assuming Every CXL Device Retains Data After Power Loss",
          "current": "CXL can carry volatile or persistent memory; Samsung CMM-D uses DRAM. Persistence must be established through the media, backup energy, and platform semantics together.",
          "reason": "An interconnect protocol is not storage physics and does not automatically guarantee recovery after failure.",
          "sourceIds": [
            "CMP-CXL2022",
            "CMP-SAMSUNG-CMM",
            "CMP-CXL2026"
          ]
        },
        {
          "old": "Presenting Optane's Historical Commercial Implementation as an SCM Roadmap Still Investing in New Products",
          "current": "Micron discontinued 3D XPoint development on 2021-03-16; Intel discontinued further Optane development in July 2022. The inventory forecasts and support statements in the 2023 letter must be recorded separately.",
          "reason": "Development, manufacturing, inventory shipments, warranties, and support are different lifecycle events.",
          "sourceIds": [
            "CMP-MICRON2021",
            "CMP-MICRON-CALL2021",
            "CMP-INTEL2023"
          ]
        }
      ]
    },
    "logicIpMap": {
      "kicker": "NAMED LOGIC-PROCESS IPs",
      "title": "Nine Named IPs Map onto Selection-Matrix Leaves; They Do Not Enter the 2016/2021 Course Table",
      "intro": "The Yu 2016 paper and the 2021 course table compare SRAM, DRAM, NOR, NAND, PCM, RRAM, STT-MRAM, SOT-MRAM, FeRAM and FeFET. The logic-process OTP / MTP / eFlash IPs below are not columns of that table, and they do not share a unified voltage or cycle number that could be pasted into it. This section only maps each named IP onto a selection-matrix family leaf and links to its cell study.",
      "matrixUrl": "technology-comparison.html#sec-matrix",
      "matrixLabel": "Open the 11-leaf selection matrix",
      "historyLabel": "Historical Course Table and Corrections",
      "atlasNote": "Historical-table numbers remain the course baseline. Biases, cycle counts and production nodes for named IPs stay bound to each cell study and its VERIFY limits; this page does not invent datasheet figures.",
      "groups": [
        {
          "leaf": "AntiFuse OTP",
          "leafNote": "A dielectric is permanently made conductive; one-time program. The teaching leaf is not floating-gate OTP and not a blown fuse.",
          "items": [
            {
              "id": "cfx-otp",
              "name": "CFX · GOX OTP",
              "map": "Teaching default is gate-oxide breakdown. Public materials also list eFuse and floating-gate routes; the three must not collapse into one cell."
            },
            {
              "id": "floadia-za",
              "name": "Floadia · LEE Fuse ZA",
              "map": "Zero extra-mask anti-fuse. The product name is LEE Fuse ZA; if a page writes LEE Flash ZA it still belongs here, not to ZT / G1 / G2. Published only as a dielectric made permanently conductive; breakdown site unpublished — not a GOX path."
            }
          ]
        },
        {
          "leaf": "eFuse family: blow-class and I-fuse",
          "leafNote": "Blow-class programs by electromigration rupture of a link; I-fuse is listed separately and is not the same physics.",
          "items": [
            {
              "id": "attopsemi-ifuse",
              "name": "Attopsemi · I-fuse",
              "map": "Poly / metal-gate / metal fuse. Heat-assisted electromigration below thermal runaway; not AntiFuse and not explosive blow-class eFuse."
            }
          ]
        },
        {
          "leaf": "LD-MTP (FN/FN single-poly class)",
          "leafNote": "The family leaf uses NeoEE / LEE Flash ZT as the FN/FN reference. Actt and TwinBit do not inherit that cell physics.",
          "items": [
            {
              "id": "floadia-zt",
              "name": "Floadia · LEE Flash ZT",
              "map": "Zero-mask floating-gate MTP; FN program and erase. Public page body and table disagree on cycle count; neither figure is a common guarantee."
            },
            {
              "id": "actt-cmt",
              "name": "Actt · LogicFlash MTP",
              "map": "CMT is 2016 acquisition lineage, not a current SKU. Public at 180–55 nm, +0–1, Flash-like interface; product-page up to ~10k cycles, not a table guarantee. Cell physics unpublished — do not invent FN, HCI, or channel-current readout."
            }
          ]
        },
        {
          "leaf": "MTP that sits on neither LD nor HD",
          "leafNote": "The HD-MTP leaf is CHI/FN floating gate. Schottky TwinBit belongs to neither leaf.",
          "items": [
            {
              "id": "nscore-twinbit",
              "name": "NSCore · TwinBit MTP",
              "map": "P-channel Schottky; hot-hole program and hot-electron erase; 40–22 nm, zero extra masks. PermSRAM is an OTP sibling and must not merge with TwinBit."
            }
          ]
        },
        {
          "leaf": "SST SuperFlash",
          "leafNote": "The split-gate eFlash leaf is this family, not SONOS.",
          "items": [
            {
              "id": "sst-superflash",
              "name": "SST · SuperFlash",
              "map": "Source-side injection program and interpoly FN erase. Public foundry nodes about 180–28 nm; the home page also states 500 nm–28 nm."
            }
          ]
        },
        {
          "leaf": "SONOS eFlash",
          "leafNote": "Charge trapping. G1 and G2 are both SONOS but differ in mask count, read path and array organization; they are not one specification cell.",
          "items": [
            {
              "id": "floadia-g1",
              "name": "Floadia · LEE Flash G1",
              "map": "SONOS, +2–3 extra masks, FN program/erase; public description includes BCD."
            },
            {
              "id": "floadia-g2",
              "name": "Floadia · LEE Flash G2",
              "map": "SONOS sandwiched by switch transistors, +4, VDD-read; marked as ongoing development. Not a node extension of G1."
            }
          ]
        }
      ]
    },
    "benchmarks": [
      {
        "id": "CMP-BENCH-FRAM",
        "technology": "FeRAM/F-RAM",
        "implementation": "Infineon CY15B104QSN, 4 Mb EXCELON Ultra F-RAM",
        "level": "Complete Product",
        "values": [
          "Up to 108 MHz SDR or 54 MHz DDR",
          "Endurance: 10¹⁴ read/write cycles",
          "Data retention: 10 years at 85°C, 38 years at 75°C, and 151 years at 65°C"
        ],
        "conditions": [
          "Datasheet 002-18293 Rev. *N, 2024-07-25, Table 63.",
          "Endurance is specified over the operating-temperature range listed in the table. Each retention rating must be cited together with its corresponding temperature.",
          "MHz describes the interface clock; it does not imply that a complete command takes a single cycle."
        ],
        "lesson": "Compare test conditions before comparing numbers. Removing 65°C from the 151-year rating changes the meaning of the specification.",
        "sourceIds": [
          "CMP-FRAM-DS",
          "CMP-FRAM-PRODUCT"
        ]
      },
      {
        "id": "CMP-BENCH-TOGGLE",
        "technology": "Toggle MRAM",
        "implementation": "Everspin MR25H40, 4 Mb SPI MRAM",
        "level": "Complete Product",
        "values": [
          "SPI up to 40 MHz",
          "Supply voltage: 3.0–3.6 V",
          "Data retention exceeding 20 years",
          "The supplier specifies unlimited read/write cycling"
        ],
        "conditions": [
          "MR2xH40 datasheet revision 12.6, 2020-08. This example uses the MR25H40's 40 MHz specification, not the MR20H40's 50 MHz specification.",
          "The product has multiple temperature grades and part numbers; the design must use the applicable version.",
          "Unlimited cycling is a product specification. It does not mean that the magnetic materials and dielectric layers never age under any conditions."
        ],
        "lesson": "Identify the write mechanism even within the same technology family. Toggle specifications cannot represent STT or SOT.",
        "sourceIds": [
          "CMP-MRAM-DS",
          "CMP-MRAM-PRODUCT"
        ]
      },
      {
        "id": "CMP-BENCH-RERAM",
        "technology": "Oxide ReRAM",
        "implementation": "RAMXEED MB85AS8MT, 8 Mb SPI ReRAM",
        "level": "Complete Product",
        "values": [
          "SPI up to 10 MHz",
          "Endurance at 85°C: 10⁶ cycles per 4 bytes",
          "Data retention at 85°C: 10 years",
          "Write cycle tWC: 5,000 µs typical, 10,000 µs maximum"
        ],
        "conditions": [
          "Datasheet DS501-00060-2v2-E, p17: tWC is specified with all data bits toggling.",
          "Up to 256 bytes are first received in the data register; internal nonvolatile programming starts after CS rises.",
          "During internal programming, completion must be checked through WIP in the status register. The 10 MHz interface rate is not the nonvolatile-write speed.",
          "See p20 for endurance and retention conditions. The granularity of 4 bytes must be retained."
        ],
        "lesson": "A research cell may switch with ns pulses while a commercial product's complete write sequence takes ms. The two measurements describe different levels of implementation.",
        "sourceIds": [
          "CMP-RERAM-DS",
          "CMP-RERAM-PRODUCT"
        ]
      },
      {
        "id": "CMP-BENCH-STT",
        "technology": "STT-MRAM",
        "implementation": "TSMC 22 nm Embedded STT-MRAM: 20 Mb Research Design and Performance Option",
        "level": "Array / Research Design",
        "values": [
          "Sensing-signal development time: 6 ns at 125°C",
          "Average write-pulse duration: slightly above 30 ns at −40°C"
        ],
        "conditions": [
          "Gallagher et al., research abstract published in 2019.",
          "These performance results use an option with smaller MTJs that gives up data retention through reflow.",
          "The same paper also discusses options with stronger reflow and retention capability. The conditions of these options cannot be combined into a single implementation.",
          "Neither sensing-signal development nor average write-pulse duration is the complete access latency visible to a CPU."
        ],
        "lesson": "The most useful comparison is often the explicit trade-off within one study, rather than a selection of best-case values from unrelated papers.",
        "sourceIds": [
          "CMP-TSMC-STT2019"
        ]
      },
      {
        "id": "CMP-BENCH-NAND",
        "technology": "3D NAND / QLC",
        "implementation": "Kioxia/Sandisk 10th-Generation 2 Tb BiCS FLASH, 4 Bits per Cell",
        "level": "ISSCC 2026 Die Demonstration",
        "values": [
          "4 bits per cell",
          "332 word-line layers",
          "Die-level bit density: 37.6 Gb/mm²",
          "Write throughput exceeding 85 MB/s"
        ],
        "conditions": [
          "Kioxia's research article dated 2026-07-15 corresponds to an ISSCC 2026 paper.",
          "The stated capacity is for the 2 Tb die, and density uses die area as the denominator.",
          "Write throughput describes the memory die, not the host-visible write performance of an arbitrary SSD.",
          "A research publication does not directly establish volume production of an entire product generation."
        ],
        "lesson": "Assess 3D density through layer count, bits per cell, and peripheral efficiency together. F² alone misses major contributors to cost.",
        "sourceIds": [
          "CMP-KIOXIA2026"
        ]
      },
      {
        "id": "CMP-BENCH-OPTANE",
        "technology": "3D XPoint / Optane",
        "implementation": "Intel Optane SSD P5800X: Historical Product-Platform Measurement",
        "level": "Complete SSD and Host Platform",
        "values": [
          "Average 512 B random-read latency: 3.5 µs",
          "Average 4 KB random-read latency: below 6 µs"
        ],
        "conditions": [
          "Intel test date: 2021-03-18.",
          "The platform included dual Xeon Platinum 8380 processors, 512 GB DDR4, Ubuntu 20.04.2, and FIO 3.16. See source items 11 and 12 for complete details.",
          "512 B and 4 KB are different test granularities. An average is not a tail-latency measurement.",
          "This is a historical system-level example, not evidence of new-product availability in 2026."
        ],
        "lesson": "User-visible latency also includes the controller, interface, and platform. SSD values in µs cannot be ranked directly against cell values in ns.",
        "sourceIds": [
          "CMP-OPTANE-PERF",
          "CMP-INTEL2023"
        ]
      }
    ],
    "systems": [
      {
        "id": "array",
        "title": "From One Bit to a Complete Array: Selection, Sensing, and Program Verify",
        "summary": "Switching a device twice establishes only that it has usable storage states. A practical memory must also select its target from a large population of cells, avoid disturbing its neighbors, and read data correctly across temperature, aging, and process variation. Selectors, wires, and peripheral circuits therefore determine how much of the cell-level advantage survives.",
        "sections": [
          {
            "title": "A Storage Device Is Not Yet a Memory",
            "body": "For a resistive cell, data may be represented by high- and low-resistance states, but an external address does not directly select a laboratory probe. Row and column decoders first identify the target. Word lines, bit lines, and access devices then establish the current path. The read circuit converts a finite current or voltage difference into digital data, while the controller schedules reads, writes, and error handling.\n\nThis path gives cell switching time and complete access time different meanings. The former may record only the pulse needed to change the material state; the latter also includes decoding, wire charging and discharging, sensing, verification, and data transfer. The first step in interpreting any performance number is therefore to identify where the measurement starts and what defines completion."
          },
          {
            "title": "1T1R: Transistor Selection Also Provides Write Control",
            "body": "A 1T1R cell consists of an access transistor and a resistive storage device. The transistor gate provides an independent control terminal that can isolate unselected cells. With an appropriate circuit design, the transistor can also limit forming or programming current to prevent excessive resistive switching. A read selects the target path, applies a lower bias, and uses the sensing circuit to determine the state.\n\nThe trade-off is transistor area. The required write current and voltage affect transistor sizing and voltage tolerance. Shrinking the storage material does not mean the complete cell can shrink by the same ratio. This explains why papers may report a very small resistive device while a practical 1T1R array occupies substantially more area."
          },
          {
            "title": "1S1R and Crossbar Arrays: Density Depends on Suppressing Sneak Paths",
            "body": "A 1S1R cell places a two-terminal selector in series with a storage device. Strong nonlinearity, rectification, or threshold switching can suppress current at low bias while delivering enough current at the selected read or write bias. The two-terminal structure fits at the intersection of crossing wires and creates opportunities for vertical stacking. A volatile selector does not prevent its series-connected storage device from retaining data: the two components perform different functions.\n\nWithout sufficient isolation, current can flow through other low-resistance cells along parasitic paths, overwhelming the target read signal or altering programming conditions. A selector also consumes voltage headroom and introduces leakage and variability. IBM's array research shows why the selector and storage device must be assessed together with the wires, operating biases, and array size. A high nonlinearity ratio does not establish operation at arbitrary scale. Devices with intrinsic rectification or selection require separate evidence for their array conditions."
          },
          {
            "title": "Half-Select Bias: Cells Outside the Target Also Experience Stress",
            "body": "Consider an idealized V/2 scheme: drive the selected word line to V, the selected bit line to 0, and all other word and bit lines to V/2. The target intersection sees V. Cells sharing one selected line with the target see approximately V/2. The remaining cells see no voltage difference if the wires are ideal. Cells selected at only one terminal are called half-selected cells.\n\nEven if a half-select voltage cannot switch a cell during one pulse, repeated exposure can cause cumulative disturbance. Real arrays also have wire voltage drops and voltage division across selectors, so the voltage delivered to a distant cell may differ from the driver's setting. V/2 is therefore a biasing strategy that must be validated, not a universal solution across materials and switching polarities."
          },
          {
            "title": "Sense Margin Depends on Distribution Tails, Not Just Average Resistance",
            "body": "The sense circuit compares a cell signal with a reference. Even when average high- and low-resistance states are widely separated, a minority of cells can approach the decision boundary because of process variation, temperature, read noise, or programming history. In a large array, these distribution tails can determine product yield more strongly than the typical curve of a well-behaved device.\n\nReducing read bias generally helps reduce disturbance, but it can also reduce the signal, require more settling time, or demand a more precise sense circuit. Practical macros use reference tracking, offset compensation, and measures to address wire voltage drop. The 40 nm RRAM macro studied by TSMC and collaborators treats read-channel mismatch, leakage, ADC offset, IR drop, and cell variability as coupled problems. The device resistance ratio cannot substitute for this circuit-level evidence."
          },
          {
            "title": "Program Verify: Feedback Reduces Error but Adds Time and Energy",
            "body": "Program verify applies a programming pulse, reads the cell back, and checks whether it lies within the target range. If it does not, the controller adjusts or adds pulses until the target is reached or the retry limit is exhausted. This feedback helps manage device-to-device and cycle-to-cycle variation. It is particularly important for multistate storage, where each state has a narrower usable margin.\n\nVerification has a cost and its own limitations. Every readback consumes time and energy, and the verification measurement is itself affected by noise. NIST's oxide-RRAM experiments show that read fluctuations can produce false-pass decisions and leave longer tails in the state distribution. IBM's analog-PCM work also shows that read noise and drift limit closed-loop programming precision. To assess write quality, report pulse count, verification thresholds, retries, failure fraction, and the delay after programming together."
          },
          {
            "title": "ECC, Redundancy, and Repair: Include Usable Data in Density",
            "body": "Error-correcting codes (ECC) add check information to detect or correct errors within a defined capability. Spare rows, spare columns, and defect replacement can avoid some permanent failures. These methods translate raw-cell error rates into data reliability acceptable to the system, but consume capacity, area, latency, or computation.\n\nSuccessful data retrieval does not mean that the raw bits contained no errors. Reports should distinguish error rates before and after ECC. ECC also has finite capability against overlapping state distributions, correlated errors, and failed bits. Effective density should divide actual usable data capacity by the area that includes the associated periphery, rather than simply multiplying layer count by bits per cell."
          },
          {
            "title": "An Array's Ceiling Requires Three Accounts: Signal, Energy, and Area",
            "body": "The signal account asks how much read and write margin remains at the worst location and under the worst data pattern. The energy account includes not only the selected cell but also wire charging and discharging, leakage through unselected paths, and repeated verification. The area account includes decoders, drivers, sense circuits, ECC, and redundancy.\n\nA larger array is therefore not necessarily more efficient. Partitioning it into smaller subarrays can add some peripheral overhead while improving voltage drop, speed, and reliability. A research result should identify the bottleneck under the stated material, array, and operating conditions, rather than declare that an entire technology family has reached an immutable physical endpoint. A persuasive improvement reports performance, reliability, and cost under the same conditions."
          }
        ],
        "sourceIds": [
          "CMP-YU2016",
          "CMP-LECTURE2021",
          "CMP-IBM-SELECTOR2017",
          "CMP-IBM-ARRAY2014",
          "CMP-NIST-VERIFY2017",
          "CMP-IBM-PCM2020",
          "CMP-TSMC-ECC2023",
          "CMP-RERAM-DS"
        ],
        "quiz": {
          "question": "A paper demonstrates that an RRAM cell switches with a 10 ns pulse. Does that establish a 10 ns write time for a 1 Gb memory? What additional categories of evidence are needed?",
          "answer": "No. Establish whether the material and implementation are the same, whether selection uses 1T1R or 1S1R, the actual bias at the array's worst location, sense margin, pulse and verification counts, retry and failure thresholds, ECC and peripheral latency, and the product's definition of write completion. The cell pulse describes only one part of the complete path."
        }
      },
      {
        "id": "scm",
        "title": "SCM and Persistent Memory: From Media to Systems",
        "summary": "Storage-class memory (SCM) addresses the gap in requirements between DRAM and NAND storage. It is not another bitcell type, and adopting CXL does not automatically establish an SCM implementation. Understanding SCM requires distinguishing storage physics, attachment, access granularity, and which data can actually be recovered after failure.",
        "sections": [
          {
            "title": "SCM Is a System Role; Persistent Memory Has Specific Semantics",
            "body": "DRAM provides low-latency working memory, while NAND supports large-scale storage through high capacity and low cost per bit. SCM is often used to discuss the space between them in performance, capacity, cost, and endurance. Different publications may include low-latency storage products or NVM with a memory interface, so any discussion of SCM should first define its scope.\n\nThis topic treats SCM as a system role rather than a material name. Technologies such as PCM and ReRAM have been explored as candidates. Persistent-memory discussions focus more specifically on properties such as nonvolatility, byte addressability, and low latency, together with how software guarantees recoverability. Not every NVM is suitable as main memory, and not every low-latency SSD provides the same load/store semantics."
          },
          {
            "title": "CXL Changes Attachment, Not DRAM Physics",
            "body": "CXL is an interconnect protocol built on a PCIe physical link that can let a processor access memory on a device. The specification distinguishes volatile and persistent memory ranges. They can share an attachment architecture while retaining different data-persistence properties. Samsung CMM-D, for example, is a DRAM memory module using CXL.\n\nCapacity expansion, memory sharing, and pooling therefore do not establish retention through power loss. Assessing a CXL device requires identifying its media, exposed address ranges, platform-supported capabilities, and handling of host, link, or device failures. The interface name alone answers none of these questions."
          },
          {
            "title": "Persistence Can Come from the Media or from a Complete Save/Restore Mechanism",
            "body": "One approach uses media that inherently retain data. Another lets fast but volatile DRAM handle normal reads and writes, then combines it with NAND and backup energy to save data during power loss and restore it after restart. NVDIMM-N is an example of the latter. A member technical article published by the CXL Consortium in 2026 also discusses a similar CXL architecture.\n\nThe guarantee depends on sufficient backup energy, successful completion of the save sequence, firmware identification of valid data, and platform coordination. The architecture does not make a DRAM bitcell nonvolatile; it provides data persistence through system design. An architectural diagram must also keep conceptual feasibility, product qualification, and volume-production status separate."
          },
          {
            "title": "3D XPoint and Optane: Commercial History Must Include the Exit Timeline",
            "body": "3D XPoint and Optane are important commercial implementations in the history of SCM, but their lifecycle has changed. On 2021-03-16, Micron announced the immediate discontinuation of 3D XPoint development and stated that manufacturing would end after existing commitments were fulfilled. It completed the sale of the Lehi fab on 2021-10-22. Intel announced in July 2022 that it would discontinue further Optane product development.\n\nIntel's customer letter dated 2023-03-21 stated that, at the time, media inventory was expected to support customer demand through 2025, with support resources planned through 2030. Inventory, warranties, and support cannot be described as continued investment in next-generation manufacturing, nor does that letter establish that every part number remains available in 2026. The history also shows why the exit of one commercial roadmap does not eliminate an entire storage-physics family such as PCM: ST SR6P6C8 provides a separate embedded-PCM implementation in volume production."
          },
          {
            "title": "A Completed Processor Store Does Not Mean the Data Is Safely Persistent",
            "body": "After a program executes a store instruction, the new data may still reside in a CPU cache, memory controller, or device buffer. If any of those locations lack power-loss protection, the system can lose power before the nonvolatile media ever receive the data. The persistence domain is the boundary within which the platform guarantees that data are retained, or their retention is completed, under specified failure conditions.\n\nSoftware must use platform-appropriate synchronization, cache flushing, and ordering mechanisms to ensure that data reach this domain. PMDK documentation explains the process in terms of cache flushing and hardware-buffer draining, and notes that some platforms can omit certain steps. The objective is not to memorize a universal instruction sequence, but to identify what the platform protects and which completion event establishes persistence."
          },
          {
            "title": "Persistence and Atomicity Are Different Problems",
            "body": "Suppose a program creates a new data record and then updates an index pointer to refer to it. If the pointer becomes persistent before the content does, recovery may find an incomplete record. Requiring both writes to become persistent eventually does not remove the need to control their order. Conversely, persisting the content before updating the index can leave unreferenced data, which requires a reclamation or recovery strategy.\n\nThis is a failure-consistency problem. A persistence operation guarantees that data reach the persistence domain; it does not automatically combine multiple fields into an indivisible transaction. Logging, commit markers, version information, and transaction mechanisms establish recognizable recovery points. The platform must guarantee the relevant atomic-write granularity; arbitrary-size writes cannot be assumed to survive as complete units. SNIA's white paper on atomics and transactions illustrates these distinctions through data structures."
          },
          {
            "title": "Latency and Granularity Must Match the Workload",
            "body": "Byte or cache-line access can reduce some software and data-movement overheads. Block SSDs use controllers and parallelism to increase throughput. Each approach has suitable applications; one number in ns or µs cannot determine the role. Granularity, queue depth, read/write ratio, access locality, and synchronization frequency all affect user-visible performance.\n\nFor example, Intel's 2021 P5800X tests report average 512 B random-read latency of 3.5 µs and average 4 KB random-read latency below 6 µs. These are results for a specific complete SSD and host platform, not material-level pulse durations. Average latency also cannot substitute for tail latency. For databases and logging, the relevant measure is transaction latency after data become persistent, rather than merely the speed of handing data to a buffer."
          },
          {
            "title": "SCM's Ceiling Also Includes Cost, Supply, and Software Adoption",
            "body": "A technology positioned between DRAM and NAND does not necessarily sustain a commercial position between them. Media density, yield, controller and packaging costs, supply scale, software modification costs, and alternatives within existing systems all influence adoption. Micron's 2021 announcement explicitly cited insufficient market validation to support scaled investment as part of its decision. That is a commercial judgment, not proof that a single physical-performance metric failed.\n\nEvaluate an SCM candidate through three questions: Which specific workload bottleneck does it address? What is the complete system cost under the same capacity, reliability, and failure-protection requirements? If the media or supplier change, is there still a viable path for the software and hardware? This connects bitcell principles to practical product decisions."
          }
        ],
        "sourceIds": [
          "CMP-SNIA-PM",
          "CMP-CXL2022",
          "CMP-CXL-FAQ2021",
          "CMP-SAMSUNG-CMM",
          "CMP-CXL2026",
          "CMP-MICRON2021",
          "CMP-MICRON-CALL2021",
          "CMP-MICRON-LEHI2021",
          "CMP-INTEL2023",
          "CMP-PCM-PRODUCT",
          "CMP-PMDK",
          "CMP-SNIA-NPM",
          "CMP-SNIA-ATOMICS2017",
          "CMP-OPTANE-PERF"
        ],
        "quiz": {
          "question": "A CXL card uses DRAM plus NAND and advertises memory expansion. Can it be called persistent memory on that basis alone? Can power be removed immediately after a program completes a store?",
          "answer": "The interface or combination of media is insufficient. Verify whether the device exposes a persistent range, its backup energy and save/restore mechanism, protection for buffers from host to device, synchronization and ordering semantics, and the software recovery method. Store completion does not necessarily mean the data have reached the persistence domain. Even after persistence, updates to multiple fields still require failure atomicity and consistency."
        }
      }
    ],
    "glossary": [
      {
        "term": "CHI and CHEI",
        "definition": "CHI is shorthand for channel hot-carrier injection. Name the actual carrier and cell polarity: the YMC course model injects energetic channel electrons, while eMemory describes NeoBit/NeoMTP programming as channel-hot-hole-induced hot-electron injection (CHEI). In the latter case, holes generate carriers in silicon and electrons enter the floating gate. For an I/O PMOS floating-gate cell, a 3.3 V device programs near 6.5 V and a 5 V device near 7.5 V; an NMOS floating-gate cell at the same node needs a higher Vpgm. That I/O FG HCI pairing is public literature / architecture-class and must not be mixed with core-oxide-breakdown AntiFuse, whose program voltage tracks that process gate oxide rather than this I/O floating-gate window."
      },
      {
        "term": "Fowler–Nordheim (FN) Tunneling",
        "definition": "A sufficiently strong field changes the dielectric energy barrier so electrons can tunnel through it. State the electron origin, destination and field direction separately. NeoEE uses FN transport for both updates; NeoMTP uses FN electron transfer toward an erase gate for the reverse update."
      },
      {
        "term": "BBT, BBHH and DAHHI",
        "definition": "Band-to-band tunneling (BBT) creates electron/hole pairs inside silicon. Band-to-band hot-hole injection (BBHH) then uses energetic holes to cross the dielectric. Drain-avalanche hot-hole injection (DAHHI) uses avalanche generation instead; shared hot-hole injection does not make the carrier-generation mechanisms identical."
      },
      {
        "term": "Direct Tunneling and Antifuse Readout",
        "definition": "In eMemory's published ultrathin-dielectric explanation, programming generates defects that reduce effective tunneling distance and increase gate current. Preserve this named mechanism when discussing NeoFuse; an ideal metal short or a generic trap-assisted-tunneling label is not a substitute."
      },
      {
        "term": "P/AP and SET/RESET",
        "definition": "P and AP describe parallel and antiparallel magnetic-layer states, generally associated with lower and higher MTJ resistance. SET and RESET describe transitions to lower and higher resistance in the ReRAM examples. These state labels do not prescribe a universal terminal polarity or logic 0/1 encoding."
      },
      {
        "term": "Bitcell",
        "definition": "The smallest circuit or combination of devices that stores data in a physical state. A complete bitcell may also include an access transistor or selector; it is not necessarily just the storage material."
      },
      {
        "term": "Array and Macro",
        "definition": "An array organizes many cells through wires. A macro generally also includes peripheral functions such as decoding, driving, sensing, and control, and can serve as a memory block within a chip design."
      },
      {
        "term": "Word Line and Bit Line",
        "definition": "A word line usually participates in selecting a row of cells, while a bit line carries a data-dependent current or voltage. Connections and biasing strategies differ across array architectures."
      },
      {
        "term": "Selector",
        "definition": "A device controlling which storage cell participates in a read or write. It may be a transistor, diode, nonlinear two-terminal device, or threshold-switching device. Its purpose is to conduct when selected and suppress unintended paths when unselected."
      },
      {
        "term": "Half-Select Disturbance",
        "definition": "Cells sharing one selected line with the target also experience part of the operating bias. Repeated stress can alter their stored state or reliability."
      },
      {
        "term": "Sneak Path",
        "definition": "An unintended current path through non-target cells. It can corrupt the read signal, alter programming bias, and increase energy consumption."
      },
      {
        "term": "Sense Margin",
        "definition": "The usable signal separation between a stored state and the decision boundary in the presence of noise, variability, and operating conditions. It must be evaluated across distributions and worst-case conditions."
      },
      {
        "term": "Program Verify",
        "definition": "A feedback sequence that reads a cell after programming, checks whether it meets the target, and adjusts or adds pulses if necessary. It improves state control but adds time and energy."
      },
      {
        "term": "Endurance",
        "definition": "The number of read/write or program/erase cycles supported under specified operating conditions, error thresholds, and retention requirements. The granularity—bit, byte, page, or block—must be stated."
      },
      {
        "term": "Data Retention",
        "definition": "How long data remain valid under specified temperature, prior cycling, power, and error requirements. Retention in years cannot be compared independently of those conditions."
      },
      {
        "term": "F² and Effective Bit Density",
        "definition": "F² expresses area normalized to the square of the feature size. Effective bit density also depends on layer count, multibit storage, peripheral circuits, redundancy, and ECC; the two measures must remain distinct."
      },
      {
        "term": "Access Granularity",
        "definition": "The amount of data involved in one read, write, erase, or guaranteed atomic operation. Byte, cache-line, page, and block granularities affect performance and software behavior."
      },
      {
        "term": "Error-Correcting Code (ECC)",
        "definition": "A method that adds check information to detect or correct errors within the code's capability. It adds capacity and processing overhead and has a defined boundary beyond which errors cannot be corrected."
      },
      {
        "term": "Persistence Domain",
        "definition": "The part of a platform within which data are guaranteed to be retained, or their retention completed, under specified failure conditions. It may involve media, controllers, buffers, and backup energy."
      },
      {
        "term": "Failure Atomicity",
        "definition": "After recovery from a failure, an update appears either fully completed or not completed, rather than as an ambiguous partial update. The platform or transaction mechanism must define the atomic granularity and guarantee."
      },
      {
        "term": "Storage-Class Memory (SCM)",
        "definition": "A system role used to discuss the performance, capacity, and cost space between DRAM and NAND storage. It is not a single material or bitcell type."
      },
      {
        "term": "CXL",
        "definition": "An interconnect protocol supporting memory-related access between processors and devices. It can attach volatile or persistent memory; the protocol name alone does not guarantee retention through power loss."
      },
      {
        "term": "Standalone EEPROM",
        "definition": "Delivered as a separate memory IC, with an external interface to the host chip; a packaged I²C serial EEPROM is one example. Capacity, page-write behavior and timing describe the component interface, not its undisclosed internal poly stack."
      },
      {
        "term": "Embedded MTP IP",
        "definition": "MTP describes programmability more than once. This site uses its embedded MTP IP chapter for floating-gate MTP/EEPROM macros; it is not a reclassification of MRAM, ReRAM, Flash or SONOS. Identify the actual storage mechanism, erase or overwrite behavior, process, update granularity and reliability for each implementation."
      },
      {
        "term": "Double-Poly EEPROM",
        "definition": "The first poly layer forms the floating gate and a second poly layer forms the control gate, separated by an interpoly dielectric. This describes the NVM stack; a base-logic process label does not determine an optional memory module."
      },
      {
        "term": "Single-Poly MTP",
        "definition": "One poly layer implements storage and the required gates, with MOS capacitors, wells or other specified terminals coupling the floating node. Single-poly implementations can still differ in carriers, program/erase paths, selectors and area costs."
      },
      {
        "term": "NVM Process Option",
        "definition": "An optional memory process module on a selected foundry platform. Verify second-poly, tunnel-oxide and added-mask requirements for that module. Logic compatibility and zero added masks are separate integration claims."
      }
    ]
  },
  "foundry": {
    "title": "GF, TSMC and UMC Embedded Memory Roadmaps",
    "asOf": "2026-09-10",
    "scope": "A traceable timeline based on public primary sources from 2022–2026, with earlier baselines retained. An annual report's reporting year is the period in which the events occurred; publication is usually in the following year. An undated product page establishes only the status observed on the verification date.",
    "statusLegend": {
      "announced": "Announced or planned; does not establish completed qualification",
      "development": "In development or demonstrated on a test chip; does not establish commercial availability",
      "designReady": "A design kit is available, prototyping is supported, or the technology is ready for tapeout",
      "qualified": "Qualification is complete for a specific technology, version, or specification",
      "productionReady": "Ready for production; does not establish customer volume shipments",
      "production": "The supplier explicitly reports production or volume production",
      "target": "Forward-looking target; no completion announcement has been obtained",
      "unresolved": "Public information is insufficient to confirm the version, date, or completion status"
    },
    "sources": [
      {
        "id": "FND-GF-2020-MRAM",
        "label": "GF: 22FDX eMRAM Production Announcement",
        "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
        "kind": "Supplier Press Release",
        "date": "2020-02-27",
        "locator": "Sections on production, reliability, and macros",
        "claim": "22FDX eMRAM has entered production: one hundred thousand cycles, ten-year retention over the stated temperature range, and five solder-reflow cycles. Grade 2 design support is available; Grade 1 development was targeted for the following year.",
        "evidence": "Full text reviewed",
        "limit": "Applies to the platform and macro conditions disclosed at the time; cannot be generalized to all MRAM.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2020-CBRAM",
        "label": "GF and Dialog: 22FDX CBRAM Licensing Agreement",
        "url": "https://investors.gf.com/node/6441/pdf",
        "kind": "Joint Supplier Press Release",
        "date": "2020-10-19",
        "locator": "Sections on licensing and the planned availability year",
        "claim": "Dialog licensed conductive-bridge memory, with an embedded 22FDX option then planned for 2022.",
        "evidence": "Text from the official search index",
        "limit": "Establishes a planned schedule only. CBRAM and the later OxRAM offering must not be treated as the same material system or version.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2022-MAP",
        "label": "GF 2022 Investor Presentation: Platform Feature Roadmap",
        "url": "https://investors.gf.com/static-files/65f5f1b9-2aea-47a3-8455-10413c6560f4",
        "kind": "Supplier Investor Presentation",
        "date": "2022",
        "locator": "Investing for a Bold Future chart",
        "claim": "The chart lists platform features including 22FDX, 22FDX+, MRAM, and MRAM-G2.",
        "evidence": "Text from the official index; the PDF could not be opened",
        "limit": "The color legend and graphical associations have not been verified. Flattened text is not used to declare that a platform is in volume production, and MRAM-G2 is not independently mapped to later naming.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2023-MAP",
        "label": "GF 2023 Investor Presentation: Platforms and Features",
        "url": "https://investors.gf.com/static-files/9aecbb31-1a7a-43a5-b1ed-d5e0d4380cee",
        "kind": "Supplier Investor Presentation",
        "date": "2023",
        "locator": "Platform feature roadmap on page 32",
        "claim": "The chart continues to list MRAM, MRAM-G2, and development directions for multiple platforms.",
        "evidence": "Text from the official index",
        "limit": "Text extraction loses the association between individual features and the production/development legend. It does not establish that 12LP MRAM is in volume production.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2024-AUTO",
        "label": "GF: Automotive Platform Innovation and 12LP+ AutoPro150",
        "url": "https://gf.com/news-and-events/blog/driving-automotive-innovation-on-the-semiconductor-superhighway/",
        "kind": "Supplier Technical Blog",
        "date": "2024-06-11",
        "locator": "Sections on eMRAM and 12LP+ features",
        "claim": "Describes the 12LP+ automotive offering and lists MRAM among features being deployed, while describing some features as forthcoming.",
        "evidence": "Main text reviewed",
        "limit": "Does not provide a completed qualification date, production date, or full electrical conditions for the MRAM macro. Power improvements in the logic platform are not MRAM metrics.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2025-MCU",
        "label": "GF: Automotive MCUs and Software-Defined Vehicles",
        "url": "https://gf.com/news-and-events/blog/inside-a-cars-digital-brain-mcus-the-engine-powering-sdv-innovation/",
        "kind": "Supplier Technical Blog",
        "date": "2025-05-22",
        "locator": "Sections on 12LP+ MRAM and 22FDX MRAM",
        "claim": "GF lists 12LP+ MRAM and 22FDX MRAM as technologies for automotive controllers.",
        "evidence": "Main text reviewed",
        "limit": "These are platform and application claims; they do not provide macro-specific evidence of volume production or completed qualification for 12LP+ MRAM.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2025-RRAM",
        "label": "GF 2025 Technology Summit: 22FDX+ RRAM Available for Prototyping",
        "url": "https://gf.com/news-and-events/news/globalfoundries-announces-availability-of-22fdx-rram-technology-for-wireless-connectivity-and-ai-applications/",
        "kind": "Supplier Technology Summit Press Release",
        "date": "2025-08-28",
        "locator": "Subtitle, OxRAM section, and final design-kit section",
        "claim": "Uses OxRAM; preliminary macro design kits are available, with volume production targeted for 2026.",
        "evidence": "Full text reviewed",
        "limit": "The maturity wording in the opening paragraph of the regional Chinese page differs from the English original. This timeline follows the English original's distinction between prototyping and future volume production and does not repeat the mistranslated production claim.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-2026-AUTO",
        "label": "GF: FDX+ AutoPro150 eMRAM Available for Prototyping",
        "url": "https://gf.com/news-and-events/news/globalfoundries-announces-availability-of-autopro-150-emram-technology-on-enhanced-fdx-platform-for-advanced-automotive-applications/",
        "kind": "Supplier Press Release",
        "date": "2026-03-09",
        "locator": "Subtitle, performance section, design kits, and volume-production target",
        "claim": "Auto Grade 1 ready; five hundred thousand cycles, read access below 10 ns, and operation up to 150°C. The PDK is available, with volume production in Dresden targeted for the second half of 2026.",
        "evidence": "Full text reviewed",
        "limit": "The announcement does not disclose a joint test matrix for all metrics, ECC, or the failure distribution. No subsequent announcement confirming completed volume-production ramp was obtained as of the verification date.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-GF-CURRENT-FDX",
        "label": "GF Current FDX Platform and Embedded Memory Page",
        "url": "https://gf.com/technologies/cmos/fdx-fd-soi/",
        "kind": "Dynamic Supplier Product Page",
        "date": null,
        "locator": "MRAM, RRAM, and AutoPro150 sections",
        "claim": "The MRAM page states more than five hundred thousand cycles and twenty-year retention at 150°C; RRAM uses in-house OxRAM integration.",
        "evidence": "Main text reviewed; verified on 2026-09-10",
        "limit": "The page has no version or update date. Its performance claims are not treated as confirmation that a new version has entered volume production, and twenty-year retention and the maximum cycle count are not assumed to have been achieved together on the same sample under the same workload.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-EVERSPIN-12LP",
        "label": "Everspin/GF 12LP MRAM Joint Development Agreement Amendment",
        "url": "https://www.sec.gov/Archives/edgar/data/1438423/000155837021002369/mram-20201231xex10d11d4.htm",
        "kind": "Public Contract Exhibit",
        "date": "2019-12-31",
        "locator": "Preamble to Amendment No. 4 and Section 3.2.1",
        "claim": "Establishes that the parties have a scope of work for joint development of 12LP MRAM.",
        "evidence": "Official filing text reviewed",
        "limit": "The agreement establishes collaboration, not commercial volume production, finished-product specifications, or macro compatibility between 12LP+ and 12LP.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2022-AR",
        "label": "TSMC 2022 Annual Report: 16FFC MRAM and 22/28ULL RRAM",
        "url": "https://investor.tsmc.com/static/annualReports/2022/english/ebook/files/basic-html/page97.html",
        "kind": "Supplier Annual Report",
        "date": "2023",
        "locator": "Printed page 95; e-book page 97",
        "claim": "16FFC MRAM completed reliability qualification and was production-ready in 2022; automotive Grade 1 was targeted for 2023. Customer products using 22/28ULL RRAM began volume production in 2022.",
        "evidence": "Official e-book text reviewed",
        "limit": "Production readiness and volume production are distinct. Grade 1 was still a forward-looking target at that point.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2023-AR",
        "label": "TSMC 2023 Annual Report, Chapter Five: Process Services and Emerging Memory",
        "url": "https://investor.tsmc.com/static/annualReports/2023/english/pdf/2023_tsmc_ar_e_ch5.pdf",
        "kind": "Supplier Annual Report",
        "date": "2024",
        "locator": "Printed pages 97 and 101; PDF pages 2 and 4",
        "claim": "The process-services chapter records Grade 1 qualification for 16FFC MRAM in 2023 and the second year of volume production for 22/28ULL RRAM. The R&D chapter separately records completed consumer-grade qualification for 16nm and exploration of a next-generation 16nm technology with smaller bits.",
        "evidence": "Official PDF text reviewed",
        "limit": "The MRAM scopes and versions described in different chapters of the same report are not fully mapped to one another. All 16nm qualification events must not be collapsed into a single first-completion date.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2024-AR",
        "label": "TSMC 2024 Annual Report: Emerging Memory with Smaller Bits",
        "url": "https://investor.tsmc.com/static/annualReports/2024/english/ebook/files/basic-html/page104.html",
        "kind": "Supplier Annual Report",
        "date": "2025",
        "locator": "Printed page 102; e-book page 104",
        "claim": "12nm RRAM completed consumer-grade technology qualification; 6nm RRAM is in development. A smaller, more energy-efficient 16nm MRAM was targeted for automotive qualification in 2025; 12/5nm MRAM is in development.",
        "evidence": "Official e-book text reviewed",
        "limit": "No mapping of macro versions and names across generations is provided. Technology qualification for 12nm RRAM is not directly equivalent to volume production.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2024-BUS",
        "label": "TSMC 2024 Annual Report: Automotive Technology Services",
        "url": "https://investor.tsmc.com/static/annualReports/2024/english/ebook/files/basic-html/page21.html",
        "kind": "Supplier Annual Report",
        "date": "2025",
        "locator": "Printed page 19; e-book page 21",
        "claim": "Reiterates that 16nm MRAM met automotive Grade 1 requirements in 2023.",
        "evidence": "Official e-book text reviewed",
        "limit": "Coexists with the R&D chapter's 2025 target. Differences in version scope must be retained.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2025-AR",
        "label": "TSMC 2025 Annual Report: Second-Generation MRAM and Third-Generation RRAM",
        "url": "https://investor.tsmc.com/static/annualReports/2025/english/pdf/2025_tsmc_ar_e_ch5.pdf",
        "kind": "Supplier Annual Report",
        "date": "2026",
        "locator": "Printed page 101; Chapter Five PDF page 2; Section 5.1, Specialty Technologies",
        "claim": "Second-generation 16MRAM passed automotive qualification in 2025, with a chip failure rate below 1 ppm after one million cycles. N12e RRAM completed consumer-grade qualification for production in 2025; 22RRAM completed qualification for one hundred thousand cycles.",
        "evidence": "Official chapter PDF reviewed in full; the accessible official chapter version was used after the original full-report link failed",
        "limit": "The annual report does not provide full capacity, ECC, temperature, or sample-distribution information. The chip failure rate cannot be extrapolated to arbitrary macros.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-2025-20F",
        "label": "TSMC Form 20-F for Fiscal Year 2025",
        "url": "https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm",
        "kind": "Official Company Regulatory Filing",
        "date": "2026-04-17",
        "locator": "Automotive platform technology section",
        "claim": "Second-generation 16nm MRAM and 22ULL RRAM met Automotive Grade 1 requirements in 2025.",
        "evidence": "Full-text excerpts from the official index; the filing could not be opened directly",
        "limit": "Establishes completion within the reporting year, but provides no volume-production start date, customer part number, or full test conditions.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-CURRENT-LOGIC",
        "label": "TSMC Current 16/12nm Technology Page",
        "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_16_12nm",
        "kind": "Dynamic Supplier Product Page",
        "date": null,
        "locator": "Sections on N12 RRAM and N16 MRAM qualification",
        "claim": "Records completed consumer-grade qualification for N12 RRAM and automotive Grade 1 qualification for N16 MRAM in 2025.",
        "evidence": "Text from the official index; verified on 2026-09-10",
        "limit": "The 2017 volume-production year of the underlying 12FFC+ logic platform must not be substituted for the RRAM macro's production year.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-CURRENT-NVM",
        "label": "TSMC Current Embedded Nonvolatile Memory Page",
        "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/specialty/eflash",
        "kind": "Dynamic Supplier Product Page",
        "date": null,
        "locator": "Main text on eMRAM and eRRAM",
        "claim": "22/16nm eMRAM is automotive-qualified and in production; 40/28/22/12nm eRRAM is in volume production. 12nm automotive MRAM, 5nm high-speed MRAM, and 6nm RRAM are in development.",
        "evidence": "Text from the official index; direct access returned only the specialty-technology navigation; verified on 2026-09-10",
        "limit": "The website is dynamic and has no revision date. This is a snapshot of current status, not evidence of the first year of volume production.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-2022",
        "label": "TSMC 2022 North America Technology Symposium Press Release",
        "url": "https://pr.tsmc.com/english/news/2939",
        "kind": "Official Annual Technology Symposium Press Release",
        "date": "2022-06-16",
        "locator": "N6e ultra-low-power platform section",
        "claim": "The public release mentions an embedded NVM technology portfolio.",
        "evidence": "Main text reviewed",
        "limit": "The public release does not contain a complete roadmap sufficient to determine volume-production status for each MRAM/RRAM generation.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-2023",
        "label": "TSMC 2023 North America Technology Symposium Press Release",
        "url": "https://pr.tsmc.com/system/files/newspdf/attachment/af320740c347534184a5705ac01982e22e743978/2023%20Tech%20Symposium%20%28E%29_final_wmn.pdf",
        "kind": "Official Annual Technology Symposium Press Release",
        "date": "2023-04-26",
        "locator": "Three-page public press release",
        "claim": "The public technology highlights primarily cover logic and integration platforms.",
        "evidence": "PDF reviewed and searched for MRAM",
        "limit": "No occurrence of MRAM was found. A symposium date cited by media is not substituted for official evidence of completion.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-2024",
        "label": "TSMC 2024 North America Technology Symposium Press Release",
        "url": "https://pr.tsmc.com/english/news/3136",
        "kind": "Official Annual Technology Symposium Press Release",
        "date": "2024-04-24",
        "locator": "Sections on new technologies and advanced automotive packaging",
        "claim": "The main public symposium release covers A16, system-on-wafer technology, and automotive packaging.",
        "evidence": "Main text reviewed and searched for MRAM",
        "limit": "The main release contains no complete MRAM/RRAM node timeline. Annual reports provide supplemental evidence; access to conference slides is not claimed.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-2025",
        "label": "TSMC 2025 North America Technology Symposium Press Release",
        "url": "https://pr.tsmc.com/system/files/newspdf/attachment/167c59998c7117f14c13647c8e46a6b20a43316c/2025%20Tech%20Symposium%20%28E%29_Final_wmn.pdf",
        "kind": "Official Annual Technology Symposium Press Release",
        "date": "2025-04-23",
        "locator": "Three-page public press release",
        "claim": "The public technology highlights cover advanced logic, packaging, and platforms.",
        "evidence": "PDF reviewed and searched for MRAM",
        "limit": "The main release contains no complete MRAM/RRAM timeline suitable for verification. Unobtained internal symposium pages are not used to invent completion dates.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-2026",
        "label": "TSMC 2026 North America Technology Symposium Press Release and Public Video Portal",
        "url": "https://pr.tsmc.com/english/news/3302",
        "kind": "Official Annual Technology Symposium Press Release",
        "date": "2026-04-23",
        "locator": "The US event took place on 2026-04-22; press release and technology highlights",
        "claim": "The public release records the annual technology symposium and progress in specialty technologies.",
        "evidence": "Main text reviewed and searched for MRAM",
        "limit": "The public release does not provide a complete MRAM/RRAM roadmap. A presentation uploaded by a third party is not treated as an official version.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-TSMC-SYMP-ACCESS",
        "label": "TSMC 2026 Technology Symposium Public Video Portal",
        "url": "https://www.tsmc.com/english/symposium_highlights/2026",
        "kind": "Official Conference Portal",
        "date": "2026",
        "locator": "Access instructions for the full on-demand videos",
        "claim": "Public highlights and full conference videos are separate; full on-demand access requires an invitation.",
        "evidence": "Official text reviewed",
        "limit": "This review did not obtain invitation-only conference content and cannot claim to have checked the complete internal roadmap.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-SEC-2019-28FDS",
        "label": "Samsung Foundry: 28FDS eMRAM commercial production announcement",
        "url": "https://news.samsung.com/global/",
        "kind": "Vendor official press release",
        "date": "2019-03-06",
        "locator": "28FDS eMRAM commercial shipment and reliability section",
        "claim": "Samsung announced commercial shipment of 28nm FD-SOI embedded MRAM with faster writes and lower power versus eFlash alternatives.",
        "evidence": "Full official press release reviewed",
        "limit": "28FDS-specific platform; extensions to 14FDS and 8nm automotive/radio require separate macro qualification.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-SEC-2024-MBCFET",
        "label": "Samsung Foundry: SF3 / SF2 MBCFET advanced nodes and next-gen eMRAM roadmap",
        "url": "https://semiconductor.samsung.com/foundry/process-technology/",
        "kind": "Vendor technology forum and product brief",
        "date": "2024-06-12",
        "locator": "SFF 2024 MBCFET GAA and advanced embedded NVM planning",
        "claim": "Samsung publicly discusses SF3/SF2 GAA platforms with advanced embedded eMRAM development goals for automotive HPC and edge AI.",
        "evidence": "Official technology forum summary reviewed",
        "limit": "SF3/SF2 eMRAM remains in R&D/validation targets — not declared volume production.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-INTC-2018-22FFL",
        "label": "Intel Foundry: 22FFL embedded STT-MRAM (IEDM 2018)",
        "url": "https://www.intel.com/content/www/us/en/newsroom/news/intel-showcases-technologies-iedm-2018.html",
        "kind": "Conference paper and official release",
        "date": "2018-12-03",
        "locator": "IEDM 2018 paper 13.3, 22FFL STT-MRAM cell and reliability",
        "claim": "Intel published 22FFL FinFET embedded STT-MRAM with 0.0446 µm² cell, 10^6 endurance, 200°C retention, and 1E-9 BER under named ECC conditions.",
        "evidence": "IEDM paper and official release reviewed",
        "limit": "22FFL low-power FinFET specialty process; metrics depend on ECC and temperature.",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "FND-INTC-2024-18A",
        "label": "Intel Foundry: 18A RibbonFET and PowerVia BSPDN roadmap",
        "url": "https://www.intel.com/content/www/us/en/newsroom/news/intel-foundry-direct-connect-2024.html",
        "kind": "Vendor official event release",
        "date": "2024-02-21",
        "locator": "IFDC 2024 18A production plan, PowerVia back-side power, embedded IP ecosystem",
        "claim": "Intel 18A integrates RibbonFET GAA with PowerVia BSPDN for next-gen dense embedded memory and logic AntiFuse OTP key cells.",
        "evidence": "Official release and technical brief reviewed",
        "limit": "18A enters production preparation in 2024–2025; forward eNVM/MRAM still in R&D validation.",
        "accessedAt": "2026-09-10"
      }
    ],
    "annualForumCoverage": [
      {
        "year": 2022,
        "tsmcSourceId": "FND-TSMC-SYMP-2022",
        "gfSourceId": "FND-GF-2022-MAP",
        "finding": "TSMC's public release establishes only the relevant platform scope; GF's investor platform chart was obtained through indexed text. Node-specific completion status is supported by annual reports and formal product announcements."
      },
      {
        "year": 2023,
        "tsmcSourceId": "FND-TSMC-SYMP-2023",
        "gfSourceId": "FND-GF-2023-MAP",
        "finding": "TSMC's main symposium release was reviewed, but no complete MRAM roadmap was found. The graphical associations in GF's chart were not fully verified, so the limitations are retained."
      },
      {
        "year": 2024,
        "tsmcSourceId": "FND-TSMC-SYMP-2024",
        "gfSourceId": "FND-GF-2024-AUTO",
        "finding": "TSMC's main release is not a complete memory timeline. GF's official automotive technical article supports the direction of 12LP+ MRAM but provides no volume-production date."
      },
      {
        "year": 2025,
        "tsmcSourceId": "FND-TSMC-SYMP-2025",
        "gfSourceId": "FND-GF-2025-RRAM",
        "finding": "GF's annual summit provides directly citable evidence of RRAM prototyping availability and a 2026 target. TSMC completion events are verified against the subsequent annual report."
      },
      {
        "year": 2026,
        "tsmcSourceId": "FND-TSMC-SYMP-2026",
        "gfSourceId": "FND-GF-2026-AUTO",
        "finding": "Access to TSMC's full videos beyond the public highlights requires an invitation; no access to restricted slides is claimed. GF's March AutoPro150 announcement and its undated current-status page are recorded separately."
      }
    ],
    "performanceBoundaries": [
      {
        "platform": "GF 22FDX eMRAM (Version Announced in 2020)",
        "values": "One hundred thousand cycles; ten-year retention over −40°C to 125°C; five solder-reflow cycles; silicon-validated macros from 4–48 Mbit.",
        "conditions": "The announcement states Grade 2 design support; Grade 1 was a development target at the time.",
        "sourceIds": [
          "FND-GF-2020-MRAM"
        ],
        "limit": "The selectable 4–48 Mbit macro range, endurance, and retention metrics must not be treated as guaranteed in every combination. A complete test matrix is unavailable."
      },
      {
        "platform": "GF FDX+ AutoPro150 eMRAM (2026)",
        "values": "Press release: up to five hundred thousand cycles, reads below 10 ns, and operation up to 150°C. Current page: more than five hundred thousand cycles and twenty-year retention at 150°C.",
        "conditions": "The sources use different wording, which is retained for each metric. Exact capacity, ECC, failure rate, and read/write conditions require the design kit.",
        "sourceIds": [
          "FND-GF-2026-AUTO",
          "FND-GF-CURRENT-FDX"
        ],
        "limit": "Read latency is not write latency. Qualification for operation at 150°C and twenty-year data retention are different metrics."
      },
      {
        "platform": "GF 12LP/12LP+ MRAM",
        "values": "No MRAM macro performance specification with complete traceability was obtained in this review.",
        "conditions": "12LP is a FinFET joint-development platform; official 12LP+ articles describe an automotive offering.",
        "sourceIds": [
          "FND-EVERSPIN-12LP",
          "FND-GF-2024-AUTO",
          "FND-GF-2025-MCU"
        ],
        "limit": "Neither 22FDX figures nor improvements in 12LP+ logic performance are transferred to MRAM performance."
      },
      {
        "platform": "TSMC 16FFC/Second-Generation 16MRAM",
        "values": "Early 16FFC: one million cycles and solder-reflow capability. Second-generation 16MRAM: chip failure rate below 1 ppm after one million cycles.",
        "conditions": "Statements from different annual reports and technology generations are kept separate. The second generation completed automotive qualification in 2025.",
        "sourceIds": [
          "FND-TSMC-2023-AR",
          "FND-TSMC-2025-AR"
        ],
        "limit": "The public summaries do not disclose complete capacity, temperature, ECC, or sample-distribution information. These results cannot be directly compared with the write error rate of an individual MTJ."
      },
      {
        "platform": "TSMC 22RRAM/N12e RRAM",
        "values": "22RRAM completed qualification for one hundred thousand cycles in 2025; N12e completed consumer-grade qualification for production in 2025.",
        "conditions": "High-endurance options, automotive options, and consumer-grade platforms have distinct qualification scopes.",
        "sourceIds": [
          "FND-TSMC-2025-AR",
          "FND-TSMC-2025-20F"
        ],
        "limit": "Without complete macro data, no single shared endurance or retention value is assigned to all RRAM."
      }
    ],
    "corrections": [
      {
        "issue": "Assigning 2025 as the First Automotive Qualification Year for All 16nm MRAM",
        "replacement": "16FFC has a documented Grade 1 completion in 2023. Separate automotive milestones for smaller bits and second-generation 16MRAM appear in 2024–2025. Preserve the version distinctions and the limitation that a complete macro mapping is unavailable.",
        "sourceIds": [
          "FND-TSMC-2023-AR",
          "FND-TSMC-2024-AR",
          "FND-TSMC-2025-AR"
        ]
      },
      {
        "issue": "Treating the 2024 N12 RRAM Technology Qualification as Volume Production",
        "replacement": "Record the 2024 technology qualification, the 2025 consumer-grade qualification for production, and the product page's volume-production confirmation as of the verification date separately. No unique first volume-production date has been established.",
        "sourceIds": [
          "FND-TSMC-2024-AR",
          "FND-TSMC-2025-AR",
          "FND-TSMC-CURRENT-NVM"
        ]
      },
      {
        "issue": "Reporting GF 22FDX+ RRAM's 2026 Target as Completed",
        "replacement": "The 2025 summit announced prototyping availability and preliminary design kits. The verifiable 2026 milestone remains a target and requires a subsequent completion announcement.",
        "sourceIds": [
          "FND-GF-2025-RRAM"
        ]
      },
      {
        "issue": "Treating GF's 2020 CBRAM Collaboration and 2025 OxRAM as the Same Product",
        "replacement": "The conductive-bridge material mechanism and oxide resistive switching cannot be merged under the shared RRAM name. Record each collaboration, platform, version, and schedule separately.",
        "sourceIds": [
          "FND-GF-2020-CBRAM",
          "FND-GF-2025-RRAM"
        ]
      },
      {
        "issue": "Conflating 12LP, 12LP+, and 22FDX as a Single MRAM Platform",
        "replacement": "12LP/12LP+ belong to the FinFET family; 22FDX is FD-SOI. Joint development, application marketing, and production-macro qualification require separate evidence.",
        "sourceIds": [
          "FND-EVERSPIN-12LP",
          "FND-GF-2024-AUTO",
          "FND-GF-2020-MRAM"
        ]
      },
      {
        "issue": "Assuming That All Emerging NVM Remains Outside Volume Production",
        "replacement": "Production evidence exists for GF 22FDX MRAM and multiple TSMC MRAM/RRAM nodes. New nodes, automotive variants, and high-endurance variants still require their own qualification.",
        "sourceIds": [
          "FND-GF-2020-MRAM",
          "FND-TSMC-CURRENT-NVM"
        ]
      }
    ],
    "milestones": [
      {
        "id": "FND-M01",
        "year": 2020,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "22FDX (22nm FD-SOI)",
        "stage": "Volume Production",
        "claim": "GF officially announced that eMRAM had entered production.",
        "sourceIds": [
          "FND-GF-2020-MRAM"
        ],
        "limit": "Provides a production baseline preceding 2022; it does not imply that every subsequent version was completed in 2020."
      },
      {
        "id": "FND-M02",
        "year": 2022,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "22FDX/22FDX+",
        "stage": "Unresolved",
        "claim": "The existing 22FDX production baseline traces back to 2020. MRAM-G2 appears in the 2022 roadmap, but this review has not established its separate qualification or completed volume-production status.",
        "sourceIds": [
          "FND-GF-2020-MRAM",
          "FND-GF-2022-MAP"
        ],
        "limit": "Planned features shown in a chart must not all be marked as in production."
      },
      {
        "id": "FND-M03",
        "year": 2022,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "16FFC",
        "stage": "Production-Ready",
        "claim": "Completed reliability qualification, with one million cycles and solder-reflow capability. The technology was production-ready; Grade 1 was then targeted for 2023.",
        "sourceIds": [
          "FND-TSMC-2022-AR"
        ],
        "limit": "Does not establish completed automotive qualification or customer volume shipments in that year."
      },
      {
        "id": "FND-M04",
        "year": 2022,
        "foundry": "TSMC",
        "technology": "RRAM",
        "node": "22ULL/28ULL",
        "stage": "Volume Production",
        "claim": "Several customers completed product qualification and began volume production.",
        "sourceIds": [
          "FND-TSMC-2022-AR"
        ],
        "limit": "Applies to specific platforms and customer products; does not establish automotive qualification for every capacity."
      },
      {
        "id": "FND-M05",
        "year": 2023,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "22FDX/22FDX+; 12LP Listed Separately",
        "stage": "Unresolved",
        "claim": "The platform chart continues to show MRAM development. Joint development is documented for 12LP, but this does not confirm embedded MRAM volume production in that year.",
        "sourceIds": [
          "FND-GF-2023-MAP",
          "FND-EVERSPIN-12LP"
        ],
        "limit": "Foundry manufacturing of discrete STT-MRAM products and GF's embedded macro availability must be distinguished."
      },
      {
        "id": "FND-M06",
        "year": 2023,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "16FFC (Version in That Year's Process-Services Chapter)",
        "stage": "Qualified",
        "claim": "The annual report records completed AEC-Q100 Grade 1 reliability qualification, providing subsequent completion evidence for the target stated in 2022.",
        "sourceIds": [
          "FND-TSMC-2023-AR",
          "FND-TSMC-2024-BUS"
        ],
        "limit": "The same year's R&D chapter separately describes a consumer-grade version and a next generation with smaller bits. A precise mapping of macro versions is unavailable."
      },
      {
        "id": "FND-M07",
        "year": 2023,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "22nm; 16nm R&D Version",
        "stage": "Volume Production",
        "claim": "The R&D chapter explicitly records volume production of 22nm consumer-grade MRAM, completed consumer-grade technology qualification at 16nm, and continued development of a next generation with smaller bits.",
        "sourceIds": [
          "FND-TSMC-2023-AR"
        ],
        "limit": "This statement of 22nm production is not used as the sole evidence for the first volume-production year. Distinct 16nm versions are not conflated."
      },
      {
        "id": "FND-M08",
        "year": 2023,
        "foundry": "TSMC",
        "technology": "RRAM",
        "node": "40/28/22nm; 12nm",
        "stage": "Volume Production",
        "claim": "40/28/22nm was in volume production, while 12nm and the next generation remained in development. 22/28ULL was in its second year of volume production.",
        "sourceIds": [
          "FND-TSMC-2023-AR"
        ],
        "limit": "Volume production of the underlying 12nm logic platform does not establish volume production of embedded RRAM."
      },
      {
        "id": "FND-M09",
        "year": 2024,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "12LP+ AutoPro150 (FinFET)",
        "stage": "Announced",
        "claim": "The official article describes the direction of eMRAM deployment and its use in automotive MCUs.",
        "sourceIds": [
          "FND-GF-2024-AUTO"
        ],
        "limit": "No macro-specific qualification or production-completion date is available for verification. MRAM figures from 22FDX must not be applied."
      },
      {
        "id": "FND-M10",
        "year": 2024,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "Smaller, More Energy-Efficient 16nm Bits; 12/5nm",
        "stage": "In Development",
        "claim": "Automotive qualification for the smaller-bit 16nm technology was targeted for 2025; development began at the 12nm and 5nm nodes.",
        "sourceIds": [
          "FND-TSMC-2024-AR"
        ],
        "limit": "The earlier 16FFC Grade 1 completion in 2023 remains valid. A target for a new version must not be misrepresented as a delay of the entire node."
      },
      {
        "id": "FND-M11",
        "year": 2024,
        "foundry": "TSMC",
        "technology": "RRAM",
        "node": "12nm; 6nm",
        "stage": "Qualified",
        "claim": "The annual report's R&D chapter states that 12nm consumer-grade technology qualification was completed and 6nm entered development.",
        "sourceIds": [
          "FND-TSMC-2024-AR"
        ],
        "limit": "The 2025 annual report additionally records consumer-grade qualification for production. Both source statements are retained; no single first-qualification date is assigned independently."
      },
      {
        "id": "FND-M12",
        "year": 2025,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "12LP+/22FDX",
        "stage": "Announced",
        "claim": "The automotive article lists MRAM on both platforms as technologies supporting MCUs.",
        "sourceIds": [
          "FND-GF-2025-MCU"
        ],
        "limit": "An application claim cannot replace production and quality documentation for a 12LP+ macro."
      },
      {
        "id": "FND-M13",
        "year": 2025,
        "foundry": "GF",
        "technology": "RRAM",
        "node": "22FDX+ OxRAM",
        "stage": "Design Kit Available",
        "claim": "The technology summit announced prototyping availability and preliminary macro design kits, with volume production targeted for 2026.",
        "sourceIds": [
          "FND-GF-2025-RRAM"
        ],
        "limit": "Its mechanism and version differ from the 2020 Dialog CBRAM collaboration. It is not treated as evidence that the earlier plan was completed."
      },
      {
        "id": "FND-M14",
        "year": 2025,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "Second-Generation 16MRAM",
        "stage": "Qualified",
        "claim": "Passed automotive Grade 1. The annual report states a chip failure rate below 1 ppm after one million cycles.",
        "sourceIds": [
          "FND-TSMC-2025-AR",
          "FND-TSMC-2025-20F",
          "FND-TSMC-CURRENT-LOGIC"
        ],
        "limit": "Limited to the second generation; does not rewrite the earlier record of 16FFC completion in 2023."
      },
      {
        "id": "FND-M15",
        "year": 2025,
        "foundry": "TSMC",
        "technology": "RRAM",
        "node": "N12e; 22RRAM/22ULL",
        "stage": "Qualified",
        "claim": "N12e completed consumer-grade qualification for production; 22RRAM completed qualification for one hundred thousand cycles; 22ULL RRAM met automotive Grade 1 requirements.",
        "sourceIds": [
          "FND-TSMC-2025-AR",
          "FND-TSMC-2025-20F",
          "FND-TSMC-CURRENT-LOGIC"
        ],
        "limit": "The three qualification scopes remain separate. One hundred thousand cycles and all automotive conditions must not be automatically combined into a commitment for the same macro."
      },
      {
        "id": "FND-M16",
        "year": 2026,
        "foundry": "GF",
        "technology": "MRAM",
        "node": "FDX+ AutoPro150",
        "stage": "Design Kit Available",
        "claim": "The March announcement stated Grade 1 ready, PDK availability, and specified performance. Volume production in Dresden was targeted for the second half of 2026.",
        "sourceIds": [
          "FND-GF-2026-AUTO",
          "FND-GF-CURRENT-FDX"
        ],
        "limit": "As of September 10, this review had not obtained an announcement confirming volume production of the new version. Entering the second half of the year does not establish volume production."
      },
      {
        "id": "FND-M17",
        "year": 2026,
        "foundry": "GF",
        "technology": "RRAM",
        "node": "22FDX+ OxRAM",
        "stage": "Volume-Production Target",
        "claim": "Retains the 2026 volume-production target from the 2025 announcement; the current FDX page continues to describe RRAM.",
        "sourceIds": [
          "FND-GF-2025-RRAM",
          "FND-GF-CURRENT-FDX"
        ],
        "limit": "No explicit completion announcement was obtained in this review. A feature listed on a product page is not evidence of its completion date."
      },
      {
        "id": "FND-M18",
        "year": 2026,
        "foundry": "TSMC",
        "technology": "MRAM",
        "node": "22/16nm; 12nm Automotive; 5nm High-Speed",
        "stage": "Volume Production",
        "claim": "As of the verification date, official product text lists 22/16nm as automotive-qualified and in production, with 12nm automotive and 5nm high-write-speed versions in development.",
        "sourceIds": [
          "FND-TSMC-CURRENT-NVM"
        ],
        "limit": "This is a dynamic current-status snapshot. 2026 is not assigned as the first volume-production year of each platform; not all performance conditions are published."
      },
      {
        "id": "FND-M19",
        "year": 2026,
        "foundry": "TSMC",
        "technology": "RRAM",
        "node": "40/28/22/12nm; 6nm",
        "stage": "Volume Production",
        "claim": "As of the verification date, official text lists 40/28/22/12nm in volume production and 6nm in development.",
        "sourceIds": [
          "FND-TSMC-CURRENT-NVM"
        ],
        "limit": "A 12nm automotive qualification date or 6nm volume-production date must not be added without public primary evidence of completion."
      },
      {
        "id": "UMC-2017",
        "year": 2017,
        "foundry": "UMC",
        "technology": "ReRAM",
        "node": "40nm",
        "stage": "Joint development",
        "claim": "Panasonic collaboration targeting samples in 2018.",
        "limit": "Sampling and production were forward plans; existing 180nm production does not establish 40nm production.",
        "sourceIds": [
          "RES-PANASONIC-UMC-2017"
        ]
      },
      {
        "id": "UMC-2018",
        "year": 2018,
        "foundry": "UMC",
        "technology": "MRAM",
        "node": "28nm",
        "stage": "Joint development",
        "claim": "MRAM development with Avalanche starting from 28nm CMOS.",
        "limit": "An agreement does not establish availability of every embedded macro.",
        "sourceIds": [
          "RES-UMC-MRAM-2018"
        ]
      },
      {
        "id": "UMC-2022",
        "year": 2022,
        "foundry": "UMC",
        "technology": "STT-MRAM / Standalone P-SRAM",
        "node": "22nm",
        "stage": "Named product production",
        "claim": "Avalanche third-generation P-SRAM announced immediately available.",
        "limit": "Standalone-product evidence is not a specification for a general UMC embedded macro.",
        "sourceIds": [
          "RES-UMC-MRAM-2022"
        ]
      },
      {
        "id": "UMC-2023",
        "year": 2023,
        "foundry": "UMC",
        "technology": "RRAM / eMemory IP",
        "node": "22nm ULP",
        "stage": "Qualified",
        "claim": "8Mb plus 16Kb RRAM IP qualified on the 0.8V/2.5V platform.",
        "limit": "The 16Mb automotive and 0.8V/1.8V versions remained under development in this announcement.",
        "sourceIds": [
          "RES-UMC-RRAM-2023"
        ]
      },
      {
        "id": "UMC-2025",
        "year": 2025,
        "foundry": "UMC",
        "technology": "RRAM / FlashKit-22RRAM",
        "node": "22nm ULP",
        "stage": "SoC platform silicon validation",
        "claim": "Faraday announced completion and silicon validation of its RRAM SoC development platform.",
        "limit": "Controller and processor integration evidence does not establish named customer volume shipments.",
        "sourceIds": [
          "RES-FARADAY-RRAM-2025"
        ]
      },
      {
        "id": "SEC-2019",
        "year": 2019,
        "foundry": "Samsung Foundry",
        "technology": "eMRAM",
        "node": "28FDS (28nm FD-SOI)",
        "stage": "Volume production",
        "claim": "Samsung announced commercial shipment of 28nm FD-SOI embedded MRAM.",
        "limit": "FD-SOI platform with BEOL adders; do not equate with logic-roadmap 0-mask claims or bulk FinFET NVM.",
        "sourceIds": [
          "FND-SEC-2019-28FDS"
        ]
      },
      {
        "id": "INTC-2019",
        "year": 2019,
        "foundry": "Intel Foundry",
        "technology": "STT-MRAM",
        "node": "22FFL (22nm FinFET)",
        "stage": "Production-ready",
        "claim": "IEDM 2018/2019 publications describe 22FFL embedded STT-MRAM approaching production readiness.",
        "limit": "Evidence centers on 22FFL test vehicles; not an open PDK for every customer.",
        "sourceIds": [
          "FND-INTC-2018-22FFL"
        ]
      },
      {
        "id": "SEC-2024",
        "year": 2024,
        "foundry": "Samsung Foundry",
        "technology": "Next-gen eMRAM / MBCFET GAA",
        "node": "SF3 / SF2",
        "stage": "Roadmap / R&D",
        "claim": "Samsung Foundry Forum materials discuss advanced-node eMRAM direction alongside MBCFET logic roadmaps.",
        "limit": "SF3/SF2 logic announcements do not by themselves prove shipped eMRAM macros; separate NVM milestones required.",
        "sourceIds": [
          "FND-SEC-2024-MBCFET"
        ]
      },
      {
        "id": "INTC-2024",
        "year": 2024,
        "foundry": "Intel Foundry",
        "technology": "18A RibbonFET + embedded NVM ecosystem",
        "node": "18A",
        "stage": "Production preparation",
        "claim": "Intel Foundry Direct Connect 2024 describes 18A production preparation, PowerVia BSPDN, and embedded IP ecosystem goals.",
        "limit": "RibbonFET/PowerVia logic progress does not automatically prove native AntiFuse, eMRAM, or FeFET NVM at named nodes.",
        "sourceIds": [
          "FND-INTC-2024-18A"
        ]
      }
    ],
    "takeaways": [
      "16FFC has a documented Grade 1 completion in 2023. Separate automotive milestones for smaller bits and second-generation 16MRAM appear in 2024–2025. Preserve the version distinctions and the limitation that a complete macro mapping is unavailable.",
      "Record the 2024 technology qualification, the 2025 consumer-grade qualification for production, and the product page's volume-production confirmation as of the verification date separately. No unique first volume-production date has been established.",
      "The 2025 summit announced prototyping availability and preliminary design kits. The verifiable 2026 milestone remains a target and requires a subsequent completion announcement.",
      "The conductive-bridge material mechanism and oxide resistive switching cannot be merged under the shared RRAM name. Record each collaboration, platform, version, and schedule separately.",
      "12LP/12LP+ belong to the FinFET family; 22FDX is FD-SOI. Joint development, application marketing, and production-macro qualification require separate evidence.",
      "Production evidence exists for GF 22FDX MRAM and multiple TSMC MRAM/RRAM nodes. New nodes, automotive variants, and high-endurance variants still require their own qualification."
    ]
  },
  "research": {
    "schemaVersion": "1.0",
    "asOf": "2026-09-10",
    "title": "Major Industry and Research Routes",
    "intro": "Trace named implementations from purchasable memories and integrable IP/processes to materials and arrays still under validation. Align mechanisms, measurement levels and maturity before assessing application value.",
    "thesisTitle": "A Technology Name Does Not Define a Deliverable",
    "thesis": "RRAM filaments, STT tunneling-current writes and SOT separate paths impose different process, endurance and peripheral requirements. Products, foundry platforms and research papers answer different questions; preserve their conditions and attribution.",
    "comparisonTitle": "Turn Research Numbers into Engineering Questions",
    "comparison": [
      {
        "title": "Define the Timing Boundary",
        "body": "A switching pulse excludes some or all decoding, verification, ECC and serial-transfer overhead. Engineering interpretation: establish the measurement level before comparing access time or update energy.",
        "sourceIds": [
          "RES-IBM-14NM-2020",
          "RES-FUJITSU-RERAM-2019"
        ]
      },
      {
        "title": "Bind Cycling, Retention and Temperature",
        "body": "Thermal budget describes processing, retention temperature describes storage and operating range is a separate specification. Best values from different experiments do not form a product guarantee.",
        "sourceIds": [
          "RES-PANASONIC-SSDM-2018",
          "RES-SOT-BETAW-2025"
        ]
      },
      {
        "title": "Ground Commercial Value in Deliverables",
        "body": "Engineering interpretation: separate components, IP, PDKs and joint research. Power, endurance and density become adoption advantages only when testing, yield, controllers, licensing and supply meet the product requirements.",
        "sourceIds": [
          "RES-FARADAY-RRAM-2025",
          "RES-ITRI-SERVICE"
        ]
      },
      {
        "title": "NRAM: Keep the Material Route and Historical Status Separate",
        "body": "The 2016 Fujitsu archive identifies carbon nanotubes as the NRAM storage technology and a 55nm joint-development plan with Nantero. That evidence does not identify an oxide-filament ReRAM device, nor does it establish a currently available product. The detailed write, reverse-update and read waveforms require a specific device publication or datasheet; no voltage or endurance specification is inferred from the licensing announcement.",
        "sourceIds": [
          "NRAM-NANTERO-FUJITSU-2016"
        ]
      }
    ],
    "researchScope": "Reviewed through 2026-09-10 using official releases, product documents, author papers and public abstracts. Claims based on abstracts remain limited to those abstracts. Engineering interpretations are comparative analysis, not supplier guarantees.",
    "profiles": [
      {
        "id": "everspin",
        "name": "Everspin",
        "role": "Standalone MRAM Product Supplier",
        "title": "Three Product Lines: Toggle, DDR STT and xSPI",
        "summary": "Everspin is a core commercial MRAM reference. Its three product lines differ in write physics, interfaces, retention and qualification; compare exact ordering codes and document versions.",
        "stage": "Commercial Products; Qualification Is Version-Specific",
        "boundary": "DDR4-like does not mean a drop-in replacement for every DDR4 device; HR 64Mb qualification does not cover the whole family.",
        "integration": "Standalone Toggle MRAM, 1Gb persistent STT memory and EMxxLX xSPI.",
        "figureTitle": "Everspin Product Lines, Physics and Interfaces",
        "figureCaption": "Product-route diagram: Toggle and STT use different write mechanisms; DDR/xSPI describe interfaces and application configurations, not new storage physics.",
        "program": "Toggle uses fields from selected lines to switch magnetization; STT switches the free layer with spin-polarized current through the MTJ.",
        "reverse": "Both routes can update the opposite magnetic state without a Flash block erase. Commands, update granularity and timing remain interface-specific.",
        "read": "Sense data through MTJ resistance. System latency includes asynchronous-bus, DDR or xSPI transactions and cannot be reduced to a switching pulse.",
        "sourceIds": [
          "everspin-toggle",
          "everspin-ddr-technology",
          "EMG-P-TOGGLE"
        ],
        "sections": [
          {
            "title": "Toggle: Mature Interfaces and Exact Parts",
            "body": "The current PERSYST catalog marks MR3A16ACYS35 as mass production, with 8Mb, asynchronous x16, 35ns, 3.3V and −40°C to 85°C. These are named-part conditions, not universal MRAM density, speed or retention specifications.",
            "sourceIds": [
              "everspin-toggle"
            ]
          },
          {
            "title": "1Gb STT: Persistent Buffers for Enterprise Storage",
            "body": "The 2025 filing confirms continuing 1Gb STT-MRAM shipments; the technology page describes a DDR4-like persistent-DRAM interface. Retention and controller requirements need the relevant datasheet, rather than values copied from Toggle or xSPI.",
            "sourceIds": [
              "everspin-1gb-ddr",
              "everspin-ddr-technology"
            ]
          },
          {
            "title": "xSPI: Separate Density Availability from HR Qualification",
            "body": "The March 5, 2026 release confirms HR 64Mb AEC-Q100 Grade 1 production qualification and order availability. Its HR 128Mb/256Mb dates are announcement-time plans; later completion is not established by the primary text reviewed here. A September 2 Teledyne partnership starts with 256Mb and anticipates partner customer availability in Q4 2026.",
            "sourceIds": [
              "everspin-xspi",
              "RES-EVERSPIN-TELEDYNE-2026"
            ]
          }
        ],
        "metrics": [
          {
            "value": "8Mb / 35ns",
            "condition": "Capacity and asynchronous cycle specification for MR3A16ACYS35.",
            "limit": "Not a specification for 1Gb DDR or EMxxLX.",
            "sourceIds": [
              "everspin-toggle"
            ]
          },
          {
            "value": "HR 64Mb / Grade 1",
            "condition": "Qualified and available for orders on March 5, 2026.",
            "limit": "Other capacities and versions do not inherit this qualification.",
            "sourceIds": [
              "everspin-xspi"
            ]
          }
        ],
        "opportunity": "Engineering interpretation: Toggle, persistent DDR buffers and low-pin-count xSPI serve different controllers and data lifecycles. Compare power-loss protection, update frequency, latency, qualification and board-integration cost.",
        "qualification": "Specify the complete part number, datasheet revision, retention temperature, endurance conditions, controller support and exact qualification scope."
      },
      {
        "id": "umc",
        "name": "UMC",
        "role": "Foundry and Ecosystem Integration",
        "title": "Embedded RRAM and a Distinct MRAM Product Route",
        "summary": "UMC evidence spans process availability, qualified RRAM IP, a SoC development platform and standalone MRAM products. These are distinct delivery levels.",
        "stage": "Qualified RRAM IP; Named MRAM Products Available",
        "boundary": "A standalone MRAM product does not establish an available embedded macro.",
        "integration": "22nm ULP/ULL RRAM; separately, Avalanche 22nm pMTJ STT-MRAM.",
        "figureTitle": "Two UMC Memory Delivery Routes",
        "figureCaption": "Relationship diagram, not a cross-section. RRAM IP and standalone MRAM require separate qualification and specifications.",
        "program": "RRAM SET establishes a low-resistance state; the UMC/eMemory announcement does not disclose material, bias or pulse algorithms.",
        "reverse": "RESET returns to high resistance, unlike Flash block erase. Avalanche STT-MRAM directly overwrites a magnetic state.",
        "read": "Low-disturb sensing is combined with verification, ECC and repair; controller behavior is specific to the IP.",
        "sourceIds": [
          "RES-UMC-RRAM-2023",
          "RES-UMC-MRAM-2022"
        ],
        "sections": [
          {
            "title": "From 40nm Collaboration to 22nm IP",
            "body": "The 2017 Panasonic collaboration establishes a 40nm history; eMemory announced qualification of a 22nm version in 2023. Public evidence does not establish an identical stack or IP lineage. Low-temperature backend integration and logic-platform compatibility matter to SoC adoption.",
            "sourceIds": [
              "RES-PANASONIC-UMC-2017",
              "RES-UMC-RRAM-2023"
            ]
          },
          {
            "title": "MRAM: Separate Agreements from Products",
            "body": "The 2018 agreement began with 28nm CMOS. The 2022 immediate-availability evidence concerns Avalanche third-generation 22nm P-SRAM. This establishes a named MRAM product route, not a universally available embedded macro.",
            "sourceIds": [
              "RES-UMC-MRAM-2018",
              "RES-UMC-MRAM-2022"
            ]
          },
          {
            "title": "SoC Adoption Evidence and Open Roadmap Items",
            "body": "Faraday FlashKit-22RRAM adds silicon-validated controller, BIST and processor integration in 2025. The 16Mb automotive and 0.8V/1.8V variants targeted in 2023 still require completion evidence. The Infineon/UMC 40nm automotive agreement identifies proprietary eNVM without identifying RRAM.",
            "sourceIds": [
              "RES-FARADAY-RRAM-2025",
              "RES-UMC-RRAM-2023",
              "RES-UMC-INFINEON-2023"
            ]
          }
        ],
        "metrics": [
          {
            "value": "8Mb + 16Kb",
            "condition": "The 2023 qualified RRAM macro and information area; 10k cycles and 10-year retention up to 105°C.",
            "limit": "These values belong to the named version, not all 22nm eNVM.",
            "sourceIds": [
              "RES-UMC-RRAM-2023"
            ]
          },
          {
            "value": "22nm P-SRAM",
            "condition": "Avalanche standalone products announced immediately available in 2022.",
            "limit": "This does not establish qualification of an embedded MRAM macro.",
            "sourceIds": [
              "RES-UMC-MRAM-2022"
            ]
          }
        ],
        "opportunity": "Engineering interpretation: evaluate RRAM for low-standby-power MCUs, AIoT and embedded code storage. Value depends on the selected IP retention conditions, update budget, test cost and controller integration.",
        "qualification": "Confirm the version, PDK, macro capacity, ECC, update granularity, automotive qualification and tapeout availability."
      },
      {
        "id": "panasonic",
        "name": "Panasonic",
        "role": "ReRAM Technology and Product Lineage",
        "title": "Tantalum-Oxide Filaments and Product Evidence",
        "summary": "Panasonic is an important early commercial ReRAM developer. Trace 180nm production, 40nm test macros and Fujitsu products separately to connect the mechanism with reliability and products.",
        "stage": "Historical Production, Test Macros and Named Products",
        "boundary": "Sampling targets and test macros do not establish production of every 40nm product.",
        "integration": "Tantalum-oxide ReRAM; integration in foundry-standard 40nm CMOS.",
        "figureTitle": "Panasonic Tantalum-Oxide ReRAM Mechanism",
        "figureCaption": "Functional layers, not exact thickness, electrode materials or bias polarity. SET/RESET change conduction through oxygen-ion and defect redistribution.",
        "program": "Forming first creates a localized conductive path in the oxide; later SET enters the low-resistance state. Forming is distinct from each data write.",
        "reverse": "RESET returns to high resistance through redox and defect redistribution; it neither removes the layer nor irreversibly blows a fuse.",
        "read": "Sense high and low resistance with a low-disturb bias, accounting for state distributions and the post-cycling sensing window.",
        "sourceIds": [
          "RES-PANASONIC-SSDM-2018"
        ],
        "sections": [
          {
            "title": "Reliability Must Preserve the Test Sequence",
            "body": "The 2018 8Mbit test macro separately reports 100k-cycle endurance and over ten years at 85°C after 10k cycles. These do not establish ten-year retention after 100k cycles. Engineering evaluation also needs HRS/LRS distribution tails, not only average resistance.",
            "sourceIds": [
              "RES-PANASONIC-SSDM-2018"
            ]
          },
          {
            "title": "Partnerships Do Not Reveal Undisclosed Processes",
            "body": "The 2017 announcement confirms 180nm production since 2013 and describes future 40nm sampling. The 2019 Fujitsu/Panasonic MB85AS8MT release names an SPI product without identifying its node or foundry. It cannot by itself establish UMC 40nm product production.",
            "sourceIds": [
              "RES-PANASONIC-UMC-2017",
              "RES-FUJITSU-RERAM-2019"
            ]
          }
        ],
        "metrics": [
          {
            "value": "100k Cycles",
            "condition": "Endurance result for a 40nm 8Mbit test macro.",
            "limit": "The retention result uses a separate 10k-cycle condition.",
            "sourceIds": [
              "RES-PANASONIC-SSDM-2018"
            ]
          },
          {
            "value": "0.15mA @ 5MHz",
            "condition": "Average read current for the standalone MB85AS8MT SPI product.",
            "limit": "Not bitcell write energy and not directly comparable with macro speed.",
            "sourceIds": [
              "RES-FUJITSU-RERAM-2019"
            ]
          }
        ],
        "opportunity": "Engineering interpretation: this lineage informs low-power persistent storage. Product selection must separate standalone serial-interface system costs from embedded-macro process costs.",
        "qualification": "Confirm current supplier, ordering code, interface and combined cycling/retention conditions rather than relying on historical partnerships."
      },
      {
        "id": "ibm",
        "name": "IBM Research",
        "role": "Device and Integration Research",
        "title": "Read MRAM Scaling, Current and Retention Together",
        "summary": "IBM contributes traceable device physics and CMOS integration results. MTJ size, process node and write-error rate from different studies must not be combined into an imaginary best-specification product.",
        "stage": "Device and CMOS Integration Demonstrations",
        "boundary": "IBM papers are not a list of IBM production foundry services.",
        "integration": "Perpendicular STT-MRAM; distinguish 14nm CMOS integration from smaller-MTJ research.",
        "figureTitle": "STT-MRAM Write and Read Paths",
        "figureCaption": "Generic single-MTJ schematic; IBM studies need not share this stack or junction count. Arrows indicate opposite update directions only.",
        "program": "Current through the MTJ transfers spin angular momentum to set P or AP. The current required for a target WER depends on pulse width and materials.",
        "reverse": "Switch magnetization in the opposite direction to overwrite the other value, without a Flash-style block erase. The two switching thresholds can differ.",
        "read": "Sense P/AP through MTJ resistance; sensing margin, read disturb and MgO barrier lifetime constrain the bias design.",
        "sourceIds": [
          "RES-IBM-REVIEW-2024",
          "RES-IBM-11NM-2017"
        ],
        "sections": [
          {
            "title": "14nm Is a CMOS Node; 11nm Is an MTJ Size",
            "body": "The 2020 14nm study places MTJs between M1 and M2 with three added masks and one electrode module; 400°C describes process compatibility. The 2017 11nm result describes a junction size for low-current switching, not an 11nm CMOS platform.",
            "sourceIds": [
              "RES-IBM-14NM-2020",
              "RES-IBM-11NM-2017"
            ]
          },
          {
            "title": "Co-Designing Retention and Speed",
            "body": "The 2024 ordered-alloy study combines a low magnetic moment with strong perpendicular anisotropy, demonstrating a high energy barrier and 2ns operation. This advances material and switching design; retention guarantees still require temperature and statistical conditions.",
            "sourceIds": [
              "RES-IBM-ALLOY-2024"
            ]
          },
          {
            "title": "2025: Double Spin-Torque Arrays for Cache",
            "body": "IEDM 2025 reports a 4-kbit DS-MTJ array in which all devices switch with 2ns pulses, with an approximately 60kT energy barrier at about 40nm critical dimension. This extends the evidence to a research array while preserving the distinction between device geometry and CMOS node.",
            "sourceIds": [
              "RES-IBM-DSMTJ-2025"
            ]
          }
        ],
        "metrics": [
          {
            "value": "0.0273μm² / 4ns",
            "condition": "Cell area and minimum demonstrated write time in the 14nm CMOS integration study.",
            "limit": "Not system area per bit including periphery, nor full access latency.",
            "sourceIds": [
              "RES-IBM-14NM-2020"
            ]
          },
          {
            "value": "8μA / 10ns / 10⁻⁹",
            "condition": "Current, pulse duration and WER for an 11nm MTJ.",
            "limit": "Does not establish large-array yield or identical retention.",
            "sourceIds": [
              "RES-IBM-11NM-2017"
            ]
          }
        ],
        "opportunity": "Engineering interpretation: use these studies to evaluate the physics and integration of embedded MRAM or cache candidates. Procurement still requires a named supplier and a deliverable macro, controller and production contract.",
        "qualification": "Align definitions of node versus MTJ size, pulse versus access time, device versus array WER, retention temperature and thermal budget."
      },
      {
        "id": "itri",
        "name": "ITRI",
        "role": "Collaborative Research, Prototyping and Transfer",
        "title": "From SOT Write Channels to Arrays and Computing",
        "summary": "ITRI evidence spans distinct collaborations and versions: SOT with TSMC, cryogenic STT with NYCU, a joint β-W array, an 8-inch prototyping service and RRAM technology transfer.",
        "stage": "Research Arrays, Prototypes and Trial Production",
        "boundary": "Collaborative research must not be represented as an ITRI standalone production product.",
        "integration": "SOT-MRAM and BEOL integration; separately, 1S1R RRAM transfer.",
        "figureTitle": "Separate Read and Write Paths in SOT-MRAM",
        "figureCaption": "Generic bottom-channel SOT mechanism, not the exact 2023 top-SOT or high-RA dual-MTJ cross-section.",
        "program": "In-plane channel current generates spin-orbit torque to switch the free layer; field requirements, assist pulses and directionality depend on the implementation.",
        "reverse": "Update the opposite magnetic state by direct overwrite. Separate paths can reduce write stress across the tunnel barrier without implying unlimited endurance.",
        "read": "MTJ resistance still reads the state; compute-in-memory also depends on RA, read current, interconnect drop and peripheral circuitry.",
        "sourceIds": [
          "RES-ITRI-SOT-2022",
          "RES-ITRI-CIM-2024",
          "RES-ITRI-SERVICE"
        ],
        "sections": [
          {
            "title": "Different Research Targets in 2022 and 2023",
            "body": "The 2022 0.4ns and seven-trillion-cycle claim concerns SOT with TSMC; the same release attributes −269°C to 127°C operation to cryogenic STT with NYCU. The IEDM 2023 result released in 2024 addresses 10ns devices and computing. Its 1% power claim lacks a fully disclosed comparison workload.",
            "sourceIds": [
              "RES-ITRI-SOT-2022",
              "RES-ITRI-CIM-2024"
            ]
          },
          {
            "title": "2025: Thermally Stable Materials in a 64kb Array",
            "body": "A joint NYCU, TSMC, ITRI, NSRRC, Stanford and NCHU paper uses Co insertion to stabilize β-W. The film maintains phase stability at 400°C for ten hours, and the memory demonstrates 1ns switching. This is integration evidence, not a production-platform announcement.",
            "sourceIds": [
              "RES-SOT-BETAW-2025"
            ]
          },
          {
            "title": "Prototyping and RRAM Transfer Have Separate Contracts",
            "body": "The 8-inch BEOL platform supports Kb-to-Mb research, prototypes and initial trial production. A separate 1S1R RRAM transfer page lists selector, current and geometry specifications. Its undated status cannot establish current production or the maturity of the overall ReRAM market.",
            "sourceIds": [
              "RES-ITRI-SERVICE",
              "RES-ITRI-RRAM"
            ]
          }
        ],
        "metrics": [
          {
            "value": "64kb / 1ns",
            "condition": "The 2025 β-W SOT research memory; the abstract also reports >10-year retention and 146% TMR.",
            "limit": "The public abstract omits retention temperature, full WER and CMOS node.",
            "sourceIds": [
              "RES-SOT-BETAW-2025"
            ]
          },
          {
            "value": "1S1R / ≤4F²",
            "condition": "The RRAM transfer listing specifies selectivity ≥100 and current ≤100μA.",
            "limit": "Transfer specifications, not production density, yield or a node guarantee.",
            "sourceIds": [
              "RES-ITRI-RRAM"
            ]
          }
        ],
        "opportunity": "Engineering interpretation: consider joint research, process prototyping and compute-architecture validation. SOT speed and barrier-reliability potential must be weighed against channel area, selectors, routing and drive current.",
        "qualification": "Request version-specific capacity, WER, field or assist requirements, retention, process compatibility and deliverable service scope."
      }
    ],
    "sources": [
      {
        "id": "RES-UMC-RRAM-2023",
        "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20230328",
        "date": "2023-03-28",
        "label": "UMC / eMemory: 22nm RRAM Qualification",
        "claim": "22nm ULP RRAM IP qualified at 8Mb plus 16Kb; a 16Mb automotive version remained in development.",
        "limit": "Qualification applies to the announced version, not shipments by every customer.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-UMC-MRAM-2018",
        "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20180806",
        "date": "2018-08-06",
        "label": "UMC / Avalanche: MRAM Development Agreement",
        "claim": "Joint MRAM development initially based on 28nm CMOS.",
        "limit": "A development agreement does not establish embedded-macro production.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-UMC-MRAM-2022",
        "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20220913",
        "date": "2022-09-13",
        "label": "UMC / Avalanche: 22nm P-SRAM Availability",
        "claim": "Third-generation standalone pMTJ STT-MRAM products announced as immediately available.",
        "limit": "Standalone specifications are not specifications for a general embedded IP offering.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-FARADAY-RRAM-2025",
        "url": "https://www.faraday-tech.com/html/News/pressRelease/CHI_01_0441.jsp",
        "date": "2025-06-10",
        "label": "Faraday: FlashKit-22RRAM Silicon Validation",
        "claim": "A UMC 22ULP SoC development platform has been validated in silicon.",
        "limit": "Platform validation does not establish a named customer shipment volume.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-UMC-ENVMPAGE",
        "url": "https://www.umc.com/en/Product/technologies/Detail/envm",
        "date": null,
        "label": "UMC: eNVM Platform Table",
        "claim": "The product table lists 22uLP/uLL RRAM.",
        "limit": "Undated page; SRAM area entries are not RRAM bitcell areas.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-UMC-INFINEON-2023",
        "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20230307",
        "date": "2023-03-07",
        "label": "UMC / Infineon: 40nm Automotive MCU Agreement",
        "claim": "Infineon proprietary eNVM is used at Singapore Fab 12i.",
        "limit": "The announcement does not identify RRAM, MRAM, or the memory material.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-PANASONIC-UMC-2017",
        "url": "https://news.panasonic.com/global/press/en170201-3",
        "date": "2017-02-01",
        "label": "Panasonic / UMC: 40nm ReRAM Collaboration",
        "claim": "180nm ReRAM had been produced since 2013; 40nm samples were planned for 2018.",
        "limit": "A forward-looking sampling plan does not establish completion.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-PANASONIC-SSDM-2018",
        "url": "https://confit.atlas.jp/guide/event-img/ssdm2018/B-1-01/public/pdf_archive?type=in",
        "date": "2018",
        "label": "Panasonic: 40nm ReRAM Mechanism and Reliability",
        "claim": "An 8Mbit test macro and a tantalum-oxide filament mechanism.",
        "limit": "100k-cycle endurance and retention after 10k cycles are distinct conditions.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-FUJITSU-RERAM-2019",
        "url": "https://info.archives.global.fujitsu/tw/about/resources/news/press-releases/2019/fep-0812.html",
        "date": "2019-08-12",
        "label": "Fujitsu / Panasonic: 8Mbit ReRAM Product",
        "claim": "MB85AS8MT is a named SPI ReRAM product with joint development and planned availability announced.",
        "limit": "This announcement does not identify the process node or foundry.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-IBM-14NM-2020",
        "url": "https://research.ibm.com/publications/a-14-nm-embedded-stt-mram-cmos-technology",
        "date": "2020-12-12",
        "label": "IBM: 14nm CMOS Embedded STT-MRAM",
        "claim": "Demonstrates 14nm CMOS integration and writing down to 4ns.",
        "limit": "An integration demonstration, not a public PDK or foundry-production announcement.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-IBM-11NM-2017",
        "url": "https://research.ibm.com/publications/low-current-spin-transfer-torque-mram--1",
        "date": "2017-06-05",
        "label": "IBM: Low-Current 11nm MTJ Research",
        "claim": "An 11nm MTJ with 10ns pulses, 8μA and WER of 10⁻⁹.",
        "limit": "11nm describes the MTJ size, not a CMOS node.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-IBM-ALLOY-2024",
        "url": "https://research.ibm.com/publications/first-demonstration-of-high-retention-energy-barriers-and-2-ns-switching-using-magnetic-ordered-alloy-based-stt-mram-devices",
        "date": "2024-06-16",
        "label": "IBM: Ordered-Alloy Free-Layer Research",
        "claim": "A strongly perpendicular free layer demonstrates a high energy barrier and 2ns operation.",
        "limit": "No node, array capacity or production qualification is stated; an energy barrier is not an unconditional retention guarantee.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-IBM-REVIEW-2024",
        "url": "https://research.ibm.com/publications/spin-transfer-torque-magnetoresistive-random-access-memory-technology-status-and-future-directions",
        "date": "2024-11-06",
        "label": "IBM Authors: STT-MRAM Status and Directions",
        "claim": "Distinguishes standalone, embedded, working-memory and last-level-cache requirements.",
        "limit": "Commercial technology categories in a review do not establish IBM product availability.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-ITRI-SOT-2022",
        "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=01_content&MGID=111061510283488782&MmmID=1036276263153520257&SiteID=1",
        "date": "2022-06-15",
        "label": "ITRI: SOT and Cryogenic STT Collaborations",
        "claim": "SOT with TSMC and cryogenic STT with NYCU are separate collaborations.",
        "limit": "The release omits full error-rate, node and retention-temperature conditions.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-ITRI-CIM-2024",
        "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=01_content&MGID=113011710184808020&MmmID=1036276263153520257&SiteID=1",
        "date": "2024-01-17",
        "label": "ITRI / TSMC: IEDM 2023 SOT-CIM",
        "claim": "10ns SOT devices and compute-in-memory; the release claims 1% of a compared STT product power.",
        "limit": "The comparison workload is not fully disclosed; this is not a universal 100× SOT advantage.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-SOT-BETAW-2025",
        "url": "https://www.nature.com/articles/s41928-025-01434-x",
        "date": "2025-09-02",
        "label": "Joint Research: β-W 64kb SOT-MRAM",
        "claim": "Co insertion improves β-W thermal stability in a 64kb research memory.",
        "limit": "Public abstract and author information reviewed; annealing is not operating temperature and does not establish production.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-ITRI-SERVICE",
        "url": "https://www.itri.org.tw/english/ListStyle.aspx?DisplayStyle=01_content&MGID=1126511563713777471&MmmID=1071732317047353240&SiteID=1",
        "date": null,
        "label": "ITRI: 8-Inch MRAM Development Services",
        "claim": "Provides MRAM development, prototyping and preliminary trial production.",
        "limit": "8 inches is wafer size, not a node; these services do not imply high-volume production.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-ITRI-RRAM",
        "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=13_content&MmmID=1036233405427625204&SiteID=1&Trt_idx=4557",
        "date": null,
        "label": "ITRI: 1S1R 3D RRAM Technology Transfer",
        "claim": "A transfer listing for cross-point arrays, bidirectional selectors and device measurements.",
        "limit": "Undated and without current production evidence; this older listing does not describe the entire ReRAM market today.",
        "locator": "Main text / abstract",
        "kind": "Official primary source / author research",
        "evidence": "Main text or public abstract reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "everspin-toggle",
        "label": "Everspin Toggle MRAM · Toggle MRAM",
        "url": "https://www.everspin.com/persyst?page=2",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The current PERSYST catalog lists Toggle production parts. MR3A16ACYS35 is marked MP and specifies 8Mb, asynchronous x16, 35ns, 3.3V and −40 to 85°C.",
        "limit": "These values belong only to MR3A16ACYS35. Do not mix speed, temperature or automotive ratings across parts. The old MR4A16B datasheet is inaccessible, so its over-20-year retention is not cited."
      },
      {
        "id": "everspin-1gb-ddr",
        "label": "Everspin 1Gb STT-MRAM · STT-MRAM / DDR4-derived",
        "url": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/mram-20251231.htm",
        "date": "2026-03-04",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2025 Form 10-K confirms continuing 1Gb STT-MRAM shipments. The technology page identifies a DDR4-like persistent-DRAM product for enterprise storage.",
        "limit": "DDR4-like does not imply drop-in compatibility with every DDR4 controller. Do not transfer Toggle or xSPI retention, endurance or automotive ratings. The old family URL is now 404."
      },
      {
        "id": "everspin-xspi",
        "label": "Everspin EMxxLX xSPI · STT-MRAM / xSPI",
        "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
        "date": "2026-03-05",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The March 5, 2026 investor release confirms HR 64Mb xSPI STT-MRAM completed AEC-Q100 Grade 1 production qualification and is orderable with distributor inventory. HR 128Mb qualification was expected in May and 256Mb in July, with 256Mb volume availability expected in the second half of 2026.",
        "limit": "The 128Mb and 256Mb dates were forecasts as of March 5, 2026; subsequent completion was not verified. HR qualification does not transfer to other EMxxLX variants. This release does not specify bandwidth or retention."
      },
      {
        "id": "avalanche-umc22",
        "label": "Avalanche Technology / UMC · pMTJ STT-MRAM",
        "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20220913",
        "date": "2022-09-13",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The September 13, 2022 release announces immediate availability of Gen 3 P-SRAM on UMC 22nm. The cited parallel x32 product specifies over 10^14 writes and 1,000-year retention at 85°C.",
        "limit": "This is a discrete product, not proof of identical specifications for general UMC embedded macros. Retention is a supplier reliability specification."
      },
      {
        "id": "avalanche-scaling2026",
        "label": "Avalanche Technology · STT-MRAM",
        "url": "https://www.avalanche-technology.com/avalanche-technology-phase-one-magnetic-cell-scaling-space-grade-mram-us-government/",
        "date": "2026-03-02",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2026 web announcement reports completion of a first-phase MTJ scaling milestone for future higher-density space-grade MRAM.",
        "limit": "The page is dated March 2, 2026, but the body says March 2, 2025. A 16x density increase is a future goal, not a shipped product."
      },
      {
        "id": "samsung-emram",
        "label": "Samsung Foundry · STT-MRAM / eMRAM",
        "url": "https://semiconductor.samsung.com/foundry/process-technology/specialty-technology/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The current specialty-process page confirms 28nm FD-SOI eMRAM mass production since 2019 and expansion to 14LPU and 8LPU, with 5nm still planned.",
        "limit": "Platform expansion does not establish named high-volume customers at every node. Earlier roadmap dates are not completion evidence."
      },
      {
        "id": "intel-22ffl-research",
        "label": "Intel · STT-MRAM",
        "url": "https://ieee-iedm.org/wp-content/uploads/2026/05/2018-IEDM-Archive.pdf",
        "date": "2018-12-04",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official IEDM 2018 program lists Intel-authored work on MRAM embedded in 22FFL FinFET, establishing primary evidence of process-integration research.",
        "limit": "No newer verified Intel commercial MRAM offering was found in this bounded review. Do not infer availability from the paper or the Intel 16 name."
      },
      {
        "id": "tsmc-16mram2025",
        "label": "TSMC · eMRAM / STT route",
        "url": "https://investor.tsmc.com/sites/ir/annual-report/2025/2025%20Annual%20Report.E.pdf",
        "date": "2025",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2025 annual report confirms qualification and customer availability of second-generation 16nm automotive Grade 1 MRAM. 12nm automotive and 5nm high-speed MRAM remain in development.",
        "limit": "Qualification is not proof of volume shipment of a named MCU. SOT research must remain separate from qualified platforms."
      },
      {
        "id": "tsmc-sot2025",
        "label": "TSMC SOT-MRAM · SOT-MRAM",
        "url": "https://investor.tsmc.com/sites/ir/annual-report/2025/2025%20Annual%20Report.E.pdf",
        "date": "2025-12",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2025 annual report describes an IEDM 2025 Type-C SOT-MRAM demonstration using a circular MTJ with built-in magnetic anisotropy for field-free operation.",
        "limit": "A research demonstration is not a commercial process or a shipping SRAM replacement; 16nm automotive MRAM maturity does not transfer."
      },
      {
        "id": "gf-22fdx",
        "label": "GlobalFoundries · STT-MRAM / 22FDX",
        "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
        "date": "2020-02-27",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The February 27, 2020 announcement confirms production entry of 22FDX eMRAM and 4–48Mb silicon-validated macros, with 100k endurance and 10-year retention across the stated temperature range.",
        "limit": "Grade 1 was a future target in that release. The current FDX page still lists MRAM, but customer-specific qualification requires separate evidence."
      },
      {
        "id": "renesas-ra8-2025",
        "label": "Renesas RA8M2 / RA8D2 · Embedded MRAM",
        "url": "https://www.renesas.com/en/about/newsroom/renesas-adds-two-new-mcu-groups-blazing-fast-ra8-series-1ghz-performance-and-embedded-mram",
        "date": "2025-10-22",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The October 22, 2025 release announces available RA8M2 and RA8D2 MCUs with embedded MRAM, a 1GHz Cortex-M85 and a 250MHz Cortex-M33.",
        "limit": "CPU clock is not native MRAM read speed. Do not transfer 2024 research-macro measurements directly to the RA8 products."
      },
      {
        "id": "st-pcm-boundary",
        "label": "STMicroelectronics · PCM, not established MRAM offering",
        "url": "https://newsroom.st.com/media-center/press-item.html/p4733.html",
        "date": "2025-11-18",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The November 18, 2025 STM32V8 announcement explicitly identifies 18nm FD-SOI and embedded PCM, with Samsung Foundry manufacturing cooperation.",
        "limit": "Samsung cooperation or advanced eNVM does not make this MRAM. Any ST MRAM research requires its own direct source."
      },
      {
        "id": "nxp-s32k5",
        "label": "NXP S32K5 · Embedded MRAM",
        "url": "https://www.nxp.com",
        "date": "2025-10-30",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "NXP announced the 16nm FinFET S32K5 with embedded MRAM on March 11, 2025. Its October 30, 2025 product brief still labels the family preproduction.",
        "limit": "The claimed 15x write advantage is a supplier comparison against embedded flash, not an absolute latency. Announcement is not volume-production evidence."
      },
      {
        "id": "netsol-stt",
        "label": "NETSOL · STT-MRAM",
        "url": "https://netsol.co.kr/wp-content/uploads/2024/03/S3RxxxxR1M_rev1.1.pdf",
        "date": "2024-03",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The March 2024 S3RxxxxR1M datasheet specifies 1–16Mbit STT-MRAM, asynchronous x8/x16 interfaces and an industrial −40 to 85°C range; the website also lists serial products.",
        "limit": "Do not transfer larger densities or process nodes from other series or media reports into this datasheet. Shipment volume is not disclosed."
      },
      {
        "id": "tdk-headway",
        "label": "TDK / Headway · STT-MRAM",
        "url": "https://www.tdk.com/system/files/tdk_investor_day_20250901_en.pdf",
        "date": "2025-09-01",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "TDK lists STT-MRAM among its spintronics technologies in the 2025 investor-day presentation.",
        "limit": "HDD-head production and MTJ expertise do not establish commercial discrete MRAM. No orderable MRAM SKU, PDK or specific foundry commitment was verified."
      },
      {
        "id": "numem-aime",
        "label": "Numem · Foundry-based STT-MRAM",
        "url": "https://numem.com/news",
        "date": "2025-06-10",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Numem describes foundry-based STT-MRAM IP and chips/chiplets enhanced by AIME. Its June 10, 2025 announcement claims production readiness.",
        "limit": "Power and SRAM-class performance are supplier claims without uniform independent benchmarking. This is not evidence of a new magnetic material or named volume shipments."
      },
      {
        "id": "imec-sot",
        "label": "imec · SOT-MRAM",
        "url": "https://www.imec-int.com/en/press/imecs-extremely-scaled-sot-mram-devices-show-record-low-switching-energy-and-virtually",
        "date": "2023-12-13",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "On December 13, 2023 imec reported roughly 50nm critical-dimension SOT devices on 300mm wafers, below 100fJ/bit switching energy and endurance above 10^15 cycles.",
        "limit": "Device switching energy excludes full macro, bus and system overhead. The 50nm dimension is not a 50nm CMOS process-node claim."
      },
      {
        "id": "RRAM-WEEBIT-2026",
        "label": "Weebit Nano · ReRAM",
        "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
        "date": "2026-07-31",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Three customer designs had taped out by July 2026, with a prototype running software.",
        "limit": "First customer product mass production remained a future milestone."
      },
      {
        "id": "RRAM-ONSEMI-2026",
        "label": "onsemi · ReRAM",
        "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
        "date": "2026-07-31",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Weebit reported onsemi ReRAM technology transfer progressing to schedule.",
        "limit": "Licensing or transfer does not establish product mass production."
      },
      {
        "id": "RRAM-TI-2026",
        "label": "Texas Instruments · ReRAM",
        "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
        "date": "2026-07-31",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Weebit reported TI ReRAM technology transfer progressing to schedule.",
        "limit": "TI commercial FRAM and this ReRAM transfer are separate technology routes."
      },
      {
        "id": "RRAM-SKYWATER-S130",
        "label": "SkyWater／Weebit Nano · ReRAM",
        "url": "https://www.weebit-nano.com/products/embedded-reram-ip/weebit-reram-nvm-in-skywater-130nm-cmos/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official IP page lists qualified S130 130 nm CMOS ReRAM, available for integration, with two added masks in BEOL.",
        "limit": "IP qualification does not qualify every customer chip or prove its mass production."
      },
      {
        "id": "RRAM-DBHITEK-130",
        "label": "DB HiTek／Weebit Nano · ReRAM",
        "url": "https://www.weebit-nano.com/products/embedded-reram-ip/wbt-dbh-db130lva-reram-rram/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "130 nm BCD ReRAM IP is silicon-proven and qualified, adding two masks; listed specifications include 10K writes and over ten years retention at 125°C.",
        "limit": "100K cycles is an extension option; base BCD volume does not establish ReRAM product shipments."
      },
      {
        "id": "RRAM-TSMC-IOT",
        "label": "TSMC · ReRAM",
        "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/platform_IoT_tech_NVM",
        "date": "2024",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The IoT NVM page lists 40RRAM and 22RRAM in production; 12RRAM entered consumer-grade risk production in 2024, with cells between BEOL metal layers.",
        "limit": "12RRAM risk production is not full production or automotive qualification."
      },
      {
        "id": "RRAM-INFINEON-TC4X",
        "label": "Infineon／TSMC · ReRAM",
        "url": "https://www.infineon.com/technology-news/2022/infatv202211-031",
        "date": "2022-11-25",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2022 announcement describes preparing TSMC RRAM for next-generation AURIX TC4x, supporting bit-wise writes without prior erase.",
        "limit": "This announcement does not prove every TC4x variant uses RRAM or has reached production."
      },
      {
        "id": "CBRAM-GF-RENESAS",
        "label": "GlobalFoundries／Renesas／Dialog · CBRAM",
        "url": "https://gf.com/news-and-events/news/globalfoundries-acquires-renesas-non-volatile-resistive-ram-technology-to-proliferate-iot-and-5g-applications/",
        "date": "2023-02-09",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "GF acquired production-proven CBRAM technology from Renesas in 2023, following a 2020 Dialog license; 22FDX qualification was underway.",
        "limit": "Prior CBRAM production does not establish 22FDX production; the acquirer was GF, not Infineon."
      },
      {
        "id": "RRAM-NUVOTON-M2L31",
        "label": "Nuvoton · ReRAM",
        "url": "https://www.nuvoton.com/products/microcontrollers/arm-cortex-m23-mcus/m2l31-series/index.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The M2L31 family lists an Arm Cortex-M23, 64–512 KB ReRAM and 72 MHz operation; writes do not require a page erase.",
        "limit": "72 MHz is the MCU clock, not cell write latency; density and reliability are part-specific."
      },
      {
        "id": "RRAM-PANASONIC-UMC",
        "label": "Panasonic／UMC · ReRAM",
        "url": "https://news.panasonic.com/global/press/en170201-3",
        "date": "2017-02-01",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2017 agreement combined Panasonic ReRAM with UMC manufacturing to develop a 40 nm mass-production process.",
        "limit": "The development target is not evidence of 2026 availability or the process used by every current Nuvoton part."
      },
      {
        "id": "RRAM-RAMXEED-PRODUCT",
        "label": "RAMXEED · ReRAM",
        "url": "https://www.ramxeed.com/products/reram/reram-products.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The product list marks the MB85AS8MT 8 Mbit SPI ReRAM as mass-produced with one million cycles; the 12 Mbit part requires sales contact.",
        "limit": "Do not transfer the 8 Mbit production status or endurance to the 12 Mbit part."
      },
      {
        "id": "RRAM-CROSSBAR-DARIC",
        "label": "CrossBar · ReRAM",
        "url": "https://crossbar-inc.com/blogs/all/overview-of-crossbar-hardware-reram-and-chip",
        "date": "2026-05-06",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "A 2026 company article describes the 22 nm Daric secure processor integrating ReRAM, computing and cryptography on one die.",
        "limit": "The article does not establish production qualification or independent security certification; avoid blanket immunity claims."
      },
      {
        "id": "XPOINT-MICRON-EXIT",
        "label": "Micron · 3D XPoint",
        "url": "https://investors.micron.com/news/press-release/2021/Micron-Updates-Data-Center-Portfolio-Strategy-to-Address-Growing-Opportunity-for-Memory-and-Storage-Hierarchy-Innovation-03-16-2021/default.aspx",
        "date": "2021-03-16",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Micron announced an immediate end to 3D XPoint development in 2021 and redirected resources toward CXL memory products.",
        "limit": "Ending this route does not end all PCM research; CXL is an interconnect, not a memory-cell mechanism."
      },
      {
        "id": "XPOINT-INTEL-EXIT",
        "label": "Intel · 3D XPoint",
        "url": "https://www.intc.com/filings-reports/all-sec-filings/content/0000050863-23-000006/intc-20221231.htm",
        "date": "2022",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Intel's 2022 annual filing states that the Optane memory business wind-down began in 2022.",
        "limit": "Historical product pages or inventory sales do not establish continuing development or other vendors' PCM exits."
      },
      {
        "id": "PCM-ST-P3E",
        "label": "STMicroelectronics · PCM",
        "url": "https://www.st.com/content/st_com/en/campaigns/stellar-p3e-automotive-mcu-with-npu-accelerator-and-xmemory.html",
        "date": "2026",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2026 Stellar P3E page identifies xMemory PCM, with full automotive qualification and production readiness planned for H2 2026.",
        "limit": "Reaching the planned quarter does not prove completion; P3E timing does not apply to every Stellar part."
      },
      {
        "id": "PCM-IBM-AIMC",
        "label": "IBM Research · PCM",
        "url": "https://research.ibm.com/publications/deep-neural-network-inference-with-a-64-core-in-memory-compute-chip-based-on-phase-change-memory",
        "date": "2023-09-17",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "A 14 nm CMOS research chip with backend PCM integrates 64 256×256 analog cores and digital processing and communication for neural-network inference.",
        "limit": "Analog weight-compute results do not establish a purchasable general-purpose PCM memory or complete-system performance."
      },
      {
        "id": "FERAM-TI-MSP430",
        "label": "Texas Instruments · FeRAM",
        "url": "https://www.ti.com/tool/TIDM-FRAM-EEPROM",
        "date": "2016-12-20",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "An MSP430 reference design emulates EEPROM using embedded FRAM and lists supported MCUs and I2C/SPI host interfaces.",
        "limit": "FRAM is the storage technology; EEPROM emulation is interface behavior, not floating-gate or FeFET construction."
      },
      {
        "id": "FERAM-RAMXEED",
        "label": "RAMXEED · FeRAM",
        "url": "https://www.ramxeed.com/faq/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The FAQ states FeRAM has been mass-produced since 1999 for frequent-write applications; retention must be interpreted at the specified temperature.",
        "limit": "Cycle ratings, interfaces and temperatures are part-specific; FeRAM is not synonymous with all FeFET or FTJ devices."
      },
      {
        "id": "FERAM-INFINEON",
        "label": "Infineon · FeRAM",
        "url": "https://www.infineon.com/products/memories/f-ram-ferroelectric-ram",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Infineon lists serial, parallel and EXCELON F-RAM using PZT ferroelectric films, with family-dependent endurance up to 100 trillion cycles.",
        "limit": "Maximum ratings do not apply to every part; this does not establish HfO2 FeFET or FTJ construction."
      },
      {
        "id": "FERAM-GF-IPMS-2026",
        "label": "GlobalFoundries／Fraunhofer IPMS · FeRAM",
        "url": "https://www.ipms.fraunhofer.de/en/press-media/press/2026/Ferroelectric-memory-storage.html",
        "date": "2026-06-11",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2026 collaboration reports HfO2 ferroelectric FRAM integrated in 22FDX, operating below 1 V with nanosecond switching.",
        "limit": "The announcement lacks orderable parts, a complete qualification report or shipment volumes."
      },
      {
        "id": "FERRO-NAMLAB-2025",
        "label": "NaMLab · FeFET／FTJ",
        "url": "https://www.namlab.com/publications/",
        "date": "2025",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official 2025 publication list includes HZO bilayer FTJ thickness scaling and charge-trapping challenges in CMOS-embedded FeFETs.",
        "limit": "Publication listings establish research participation, not foundry service, PDK availability or mass production."
      },
      {
        "id": "FERRO-FMC",
        "label": "FMC · Ferroelectric Memory",
        "url": "https://www.ferroelectric-memory.com/technology/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The current site proposes DRAM+ persistent modules and CACHE+ persistent chiplets based on ferroelectric technology.",
        "limit": "The current page describes ferroelectric capacitors; it does not establish that DRAM+ or CACHE+ uses a FeFET or FTJ. Product qualification and shipment volumes are not verified."
      },
      {
        "id": "FERRO-IMEC-NDREAD",
        "label": "imec · FeRAM／FeCAP",
        "url": "https://www.imec-int.com/en/articles/non-destructive-readout-mechanism-ferroelectric-capacitors",
        "date": "2023",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Joint work with Georgia Tech demonstrated nondestructive FeCAP reading, reporting over 10^11 read cycles at IEDM 2023.",
        "limit": "Read endurance is not write endurance and does not establish conventional FeRAM behavior or mass production."
      },
      {
        "id": "RRAM-CEA-LETI",
        "label": "CEA-Leti／Weebit Nano · ReRAM",
        "url": "https://www.cea.fr/cea-tech/leti/english/Pages/What's-On/Press%20release/Weebit-Nano-and-CEA-Leti-to-demonstrate-brain-inspired-neuromorphic-demo-.aspx",
        "date": "2019-07-18",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The announcement combines CEA-Leti spiking neural networks with Weebit SiOx ReRAM in a neuromorphic object-recognition demonstration.",
        "limit": "The demonstration is not an orderable complete AI accelerator; transfer and qualification require separate evidence."
      },
      {
        "id": "industry-infineon-sonos",
        "label": "Infineon／Cypress · SONOS eFlash",
        "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official page identifies 2T SONOS, FN program/erase, production nodes and process/design licensing.",
        "limit": "Separate Cypress history from current macros; do not combine family-wide maximum specifications."
      },
      {
        "id": "industry-sst-superflash",
        "label": "SST／Microchip · SuperFlash NOR／eFlash",
        "url": "https://www.sst.com/services/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "SST lists SuperFlash process integration and licensing, complementing standalone NOR coverage.",
        "limit": "Licensing does not establish identical current qualification across nodes; verify each technology generation."
      },
      {
        "id": "industry-st-estm",
        "label": "STMicroelectronics · eSTM eFlash／Page EEPROM",
        "url": "https://www.st.com/content/st_com/en/about/innovation-and-technology/estm.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "ST links 40nm floating-gate eSTM with vertical select transistors to STM32H5 and Page EEPROM implementations.",
        "limit": "Keep eSTM separate from Stellar PCM; it is not the cell used by every ST MCU."
      },
      {
        "id": "industry-renesas-sgmonos",
        "label": "Renesas · SG-MONOS eFlash",
        "url": "https://www.renesas.com/en/about/press-room/renesas-electronics-announces-world-s-first-development-fin-shaped-monos-flash-memory-cells-high",
        "date": "2016-12-07",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2016 announcement identifies production 40nm SG-MONOS MCUs and research on 16/14nm fin-shaped cells.",
        "limit": "This announcement does not prove 16/14nm production; verify current part numbers separately."
      },
      {
        "id": "industry-xfab-xt011",
        "label": "X-FAB · XT011 eFlash／EEPROM",
        "url": "https://www.xfab.com/news/details/article/x-fab-releases-embedded-flash-solution-on-its-110nm-automotive-bcd-on-soi-technology",
        "date": "2024-12-03",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The 2024 announcement identifies embedded Flash and EEPROM on the XT011 110nm BCD-on-SOI platform.",
        "limit": "Keep this separate from the historical 2003 XC06 example; do not assume identical cells."
      },
      {
        "id": "industry-floadia-zt",
        "label": "Floadia · LEE Flash ZT MTP",
        "url": "https://floadia.com/product/lee-flash-zt/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The ZT page describes FN program/erase, zero added masks and named platform production records.",
        "limit": "General and platform-specific endurance figures differ; do not infer universal endurance or polysilicon count."
      },
      {
        "id": "industry-samsung-vnand9",
        "label": "Samsung · Ninth-Generation TLC V-NAND",
        "url": "https://news.samsung.com/global/samsung-electronics-begins-industrys-first-mass-production-of-9th-gen-v-nand",
        "date": "2024-04-23",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Samsung announced mass production of 1Tb TLC ninth-generation V-NAND in April 2024.",
        "limit": "Evidence concerns this TLC generation; later demonstrations and projected QLC timing are separate."
      },
      {
        "id": "industry-skhynix-321tlc",
        "label": "SK hynix · 321-Layer TLC 4D NAND",
        "url": "https://news.skhynix.com/en/sk-hynix-starts-mass-production-of-world-first-321-high-nand/",
        "date": "2024-11-21",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "SK hynix announced the start of 321-layer 1Tb TLC NAND mass production in November 2024.",
        "limit": "Separate production from customer delivery; do not assign this die to every Solidigm SSD."
      },
      {
        "id": "industry-solidigm-p5336",
        "label": "Solidigm · D5-P5336 QLC SSD",
        "url": "https://www.solidigm.com/products/data-center/d5/p5336.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official D5-P5336 page identifies a commercial enterprise QLC SSD family and capacity options.",
        "limit": "SSD capacity and system metrics are not die specifications; corporate relationships do not establish common NAND."
      },
      {
        "id": "industry-micron-g9",
        "label": "Micron · G9 TLC NAND",
        "url": "https://investors.micron.com/news/press-release/2024/Micron-Announces-Volume-Production-of-Ninth-Generation-NAND-Flash-Technology-07-30-2024/default.aspx",
        "date": "2024-07-30",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The July 2024 release reports G9 TLC NAND and volume shipment of the Micron 2650 SSD using it.",
        "limit": "Do not extend TLC evidence to every QLC or NOR product; interface speed is not cell programming speed."
      },
      {
        "id": "industry-kioxia-sandisk-gen10",
        "label": "Kioxia／Sandisk · Tenth-Generation BiCS 3D NAND",
        "url": "https://www.kioxia.com/en-jp/about/news/2026/20260703-2.html",
        "date": "2026-07-03",
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The July 2026 joint announcement states that tenth-generation 3D Flash production began at Kitakami K2.",
        "limit": "Production start does not establish universal customer availability or identical finished products."
      },
      {
        "id": "industry-ymtc-xtacking",
        "label": "YMTC · Xtacking 3D NAND",
        "url": "https://www.ymtc.com/en/technicalintroduction.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official page explains separate peripheral/array wafers joined by bonding and names Xtacking 4.0 X4 products in 2025.",
        "limit": "Awards and architecture descriptions alone do not prove each product's volume, layer count or shipment status."
      },
      {
        "id": "industry-macronix-nor",
        "label": "Macronix · Serial NOR／OctaBus",
        "url": "https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/default.aspx",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "Macronix's official Serial NOR page provides its product portfolio and OctaBus interface offerings.",
        "limit": "This source directly supports NOR; verify NAND parts separately and do not infer cell geometry from interfaces."
      },
      {
        "id": "industry-winbond-w25q",
        "label": "Winbond · W25Q16JW Serial NOR",
        "url": "https://www.winbond.com/hq/new-online-purchasing-guide/?__locale=en&pLine=/product/code-storage-flash/qspi-nor/&pNo=W25Q16JW",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official catalog identifies W25Q16JW Serial NOR and associated ordering entries.",
        "limit": "Catalog presence does not guarantee stock; verify NAND families and other capacities separately."
      },
      {
        "id": "industry-gigadevice-flash",
        "label": "GigaDevice · GD25／GD55 NOR；GD5F NAND",
        "url": "https://www.gigadevice.com/product/flash",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official primary source",
        "locator": "Product, technology or announcement text",
        "claim": "The official portfolio identifies GD25/GD55 SPI NOR and GD5F SPI/parallel NAND.",
        "limit": "Family coverage does not replace part-specific production status, temperature, endurance or retention specifications."
      },
      {
        "id": "everspin-ddr-technology",
        "label": "Current official explanation of 1Gb DDR4-like persistent DRAM and separate xSPI STT products.",
        "url": "https://www.everspin.com/stt-mram-technology",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "gf-current-fdx",
        "label": "Current FDX platform page continues to list MRAM.",
        "url": "https://gf.com/technologies/cmos/fdx-fd-soi/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "headway-author-research",
        "label": "Headway-authored embedded STT-MRAM research presentation; not commercial supply evidence.",
        "url": "https://www.cea.fr/cea-tech/leti/Documents/%C3%A9v%C3%A9nements/Prez%20workshop%20memory%202017/2.2.pdf",
        "date": "2017",
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "numem-current",
        "label": "Current site explicitly identifies foundry-based STT-MRAM and AIME.",
        "url": "https://www.numem.com/",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "nxp-launch",
        "label": "S32K5 launch and supplier comparison claims.",
        "url": "https://www.nxp.com",
        "date": "2025-03-11",
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "samsung-history",
        "label": "Historical node schedules must remain separate from current platform evidence.",
        "url": "https://semiconductor.samsung.com/news-events/tech-blog/developing-the-industrys-most-energy-efficient-next-generation-mram-selected-as-iedm-highlight-paper/",
        "date": "2023",
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "everspin-persyst-catalog",
        "label": "Current official catalog lists MR3A16ACYS35 as MP, 8Mb, x16, 35ns, 3.3V and −40 to 85°C.",
        "url": "https://www.everspin.com/persyst?page=2",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "everspin-2025-10k",
        "label": "The annual filing confirms continuing 1Gb STT-MRAM shipments; its March 4 filing date is explicitly stated in the March 5 official release.",
        "url": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/mram-20251231.htm",
        "date": "2026-03-04",
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "everspin-hr-xspi-20260305",
        "label": "Original official release: HR 64Mb qualified and orderable; HR 128/256Mb qualification and volume dates remain forecasts.",
        "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
        "date": "2026-03-05",
        "accessedAt": "2026-09-10",
        "kind": "Official supplementary source",
        "locator": "Main text / relevant specification",
        "limit": "Applies only to the named version and stated conditions."
      },
      {
        "id": "RES-IBM-DSMTJ-2025",
        "url": "https://research.ibm.com/publications/progress-and-gaps-in-double-spin-torque-mtjs-for-last-level-cache-applications",
        "date": "2025-12-06",
        "label": "IBM: Double Spin-Torque MTJs for Cache",
        "claim": "4-kbit research array with 2ns write pulses.",
        "limit": "Research-array demonstration; does not establish production yield or a shipped cache product.",
        "kind": "Official primary source",
        "locator": "Public abstract / main text",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-EVERSPIN-TELEDYNE-2026",
        "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-technologies-and-teledyne-hirel-semiconductors-partner",
        "date": "2026-09-02",
        "label": "Everspin / Teledyne HiRel Partnership",
        "claim": "A partnership begins with 256Mb PERSYST, with Teledyne availability anticipated in Q4 2026.",
        "limit": "A planned partner delivery does not prove completed qualification of every HR SKU.",
        "kind": "Official primary source",
        "locator": "Public abstract / main text",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-SONY-MICRON-2014",
        "url": "https://investors.micron.com/static-files/7ac25c4b-edd0-4482-97ad-267a7263bcf0",
        "date": "2014-06-05",
        "label": "Micron / Sony: Copper ReRAM Research",
        "claim": "Micron announced copper ReRAM work for a 16Gb storage-class-memory demonstration with Sony.",
        "limit": "Historical R&D evidence, not current availability, a Sony sensor design win or production volume.",
        "kind": "Official primary source",
        "locator": "Public abstract / main text",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "MRAM-KIOXIA-SKHYNIX-64GB-2025",
        "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-80.html",
        "date": "2025-04-15",
        "label": "Kioxia／SK hynix · 64 Gbit 1Selector–1MTJ Cross-Point MRAM",
        "claim": "The jointly developed 64 Gbit cross-point MRAM replaces select transistors with two-terminal selectors; MTJ diameter is 20 nm, half-pitch 20.5 nm, and cell area 0.001681 µm².",
        "limit": "This is a research array, not evidence of product availability. The 20 nm figure is MTJ diameter, not a CMOS process node; typical-bit tests do not establish full-array yield.",
        "locator": "Official body; NRAM uses the August 2016 archive entry",
        "kind": "Primary official source",
        "evidence": "Public body or archive entry reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RRAM-TETRAMEM-MLX200-2026",
        "url": "https://tetramem.com/tetramem-completes-mlx200-silicon-validation/",
        "date": "2026-05-19",
        "label": "TetraMem · MLX200 Multi-Level RRAM Analog IMC",
        "claim": "In May 2026, TetraMem reported MLX200 tape-out and initial silicon validation on TSMC 22nm, integrating multi-level RRAM with mixed-signal computing in a SoC.",
        "limit": "Evaluation kits were scheduled for H2 2026 at announcement. Initial validation does not establish mass production or delivery, and computing results are not general-purpose storage specifications.",
        "locator": "Official body; NRAM uses the August 2016 archive entry",
        "kind": "Primary official source",
        "evidence": "Public body or archive entry reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RRAM-INTRINSIC-SURECORE",
        "url": "https://www.intrinsicsemi.com/",
        "date": null,
        "label": "Intrinsic／sureCore · SiOx RRAM",
        "claim": "Intrinsic identifies silicon-oxide RRAM as its core technology and lists a sureCore collaboration combining CMOS-compatible cells, memory architectures and compiler-design expertise.",
        "limit": "The collaboration does not establish qualification or mass production of a named process macro; the site does not provide a complete orderable part and datasheet proving current supply.",
        "locator": "Official body; NRAM uses the August 2016 archive entry",
        "kind": "Primary official source",
        "evidence": "Public body or archive entry reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "NRAM-NANTERO-FUJITSU-2016",
        "url": "https://info.archives.global.fujitsu/global/about/resources/news/press-releases/2016/",
        "date": "2016-08-31",
        "label": "Nantero／Fujitsu Semiconductor／Mie Fujitsu Semiconductor · Carbon-Nanotube NRAM",
        "claim": "Fujitsu's official archive confirms that its two semiconductor businesses licensed Nantero carbon-nanotube NRAM in 2016 and began joint development toward a 55nm product.",
        "limit": "This historical development evidence establishes neither 2026 production and availability nor program termination; NRAM should be classified separately from oxide RRAM.",
        "locator": "Official body; NRAM uses the August 2016 archive entry",
        "kind": "Primary official source",
        "evidence": "Public body or archive entry reviewed",
        "accessedAt": "2026-09-10"
      },
      {
        "id": "RES-PUFSEC-HROT-2025",
        "label": "PUFsecurity: NeoPUF & PUFcc Hardware Root of Trust Technical Whitepaper",
        "url": "https://www.pufsecurity.com/pufcc",
        "kind": "Vendor Official Whitepaper",
        "date": "2025-06",
        "locator": "Architecture and Qualification Sections",
        "claim": "NeoPUF harnesses microscopic gate oxide quantum tunneling variations for zero-mask chip fingerprinting across TSMC and UMC nodes; PUFcc integrates NIST SP 800-90B TRNG, secure OTP, and cryptographic engines with PSA Certified Level 3 and SESIP Level 3 compliance.",
        "evidence": "Verified official whitepaper and architecture briefs",
        "limit": "Applies to named PUFcc/PUFiot architectures; specific macro areas and latencies track process PDK datasheets.",
        "accessedAt": "2026-09-17"
      },
      {
        "id": "RES-TOWER-YFLASH-2024",
        "label": "Tower Semiconductor: Y-Flash 0-Mask Embedded Flash Technology Brief",
        "url": "https://towersemi.com/technology/non-volatile-memory-nvm/",
        "kind": "Foundry Process Platform Document",
        "date": "2024-11",
        "locator": "Power Management & Embedded NVM Section",
        "claim": "Single-poly floating gate; per Tower's public NVM brief and arXiv:2202.10228, program uses channel hot-electron injection (CHE) and erase uses band-to-band-tunneling (BBT) holes — not FN/FN. Zero mask adders integrate with Tower HV BCD/power platforms; public briefs cite 1K–10K endurance and high-temperature retention; name Ta, Tj, and AEC-Q100 qualification per product.",
        "evidence": "Verified foundry technology briefs",
        "limit": "Single-poly cells suit low-to-mid density PMIC/BMS trim; cite CHE/BBT per Tower primary sources, not FN/FN.",
        "accessedAt": "2026-09-17"
      },
      {
        "id": "RES-WEEBIT-RERAM-2025",
        "label": "Weebit Nano: Embedded ReRAM IP and Neuromorphic Computing Whitepaper",
        "url": "https://www.weebit-nano.com/products/embedded-reram-ip/wbt-dbh-db130lva-reram-rram/",
        "locator": "Official technology page and SkyWater / DB HiTek commercial foundry qualification notices",
        "kind": "Supplier technical specification & foundry qualification",
        "date": "2025-06-01",
        "limit": "DB HiTek 130nm qualified IP; SkyWater 130nm and GF 22FDX are platform/evaluation stages — customer production needs named evidence."
      },
      {
        "id": "RES-EVERSPIN-PLP-2025",
        "label": "Everspin Technologies: Enterprise STT-MRAM Write Buffer & Power Loss Protection (PLP) Application Note",
        "url": "https://www.everspin.com/products",
        "locator": "Official enterprise storage accelerator and RAID/SSD power loss protection architecture brief",
        "kind": "Supplier application note",
        "date": "2025-04-15",
        "limit": "Confirms commercial shipment of STT-MRAM for NVMe write journaling and supercap-free PLP architectures; requires dedicated controller or interface bridge."
      },
      {
        "id": "RES-INFINEON-TC4X-2024",
        "label": "Infineon Technologies: AURIX™ TC4x Automotive MCU & TSMC 28nm eRRAM Architecture Manual",
        "url": "https://www.infineon.com/aurix-tc4x",
        "locator": "Official product manual and automotive ASIL-D embedded memory roadmap chapter",
        "kind": "Microcontroller architecture manual",
        "date": "2024-11-20",
        "limit": "Confirms TC4x adoption of TSMC 28nm eRRAM overcoming eFlash scaling limits with 100K cycles and zero-wait random access; specific to flagship automotive MCUs."
      },
      {
        "id": "RES-ST-STELLAR-PCM-2024",
        "label": "STMicroelectronics: Stellar 32-Bit Automotive MCU Embedded Phase-Change Memory (28nm FD-SOI ePCM) Whitepaper",
        "url": "https://www.st.com/content/st_com/en/about/innovation-and-technology/pcm.html",
        "locator": "Official automotive MCU and 28nm FD-SOI embedded PCM architecture release",
        "kind": "Automotive silicon technical whitepaper",
        "date": "2024-09-18",
        "limit": "Confirms 28nm FD-SOI integration of ePCM enabling zero-downtime OTA (dual-bank instant swap) and 165°C retention; phase-change material is Ge2Sb2Te5 (GST)."
      },
      {
        "id": "RES-INTRINSICID-QUIDDIKEY-2025",
        "label": "Intrinsic ID: Quiddikey Silicon Hardware Root of Trust (SRAM PUF + Fuzzy Extractor) Technical Whitepaper",
        "url": "https://www.intrinsic-id.com/products/quiddikey/",
        "locator": "Official SRAM PUF Key Reconstruction & Zero-Factory-Provisioning Architecture Whitepaper",
        "kind": "Security Technical Whitepaper",
        "date": "2025-05-12",
        "limit": "Extracts root keys dynamically from native 6T SRAM power-up mismatch; pairs with public Helper Data (Activation Code) and BCH ECC; zero key material at rest, zero factory provisioning."
      },
      {
        "id": "RES-SYNOPSYS-TROOT-2024",
        "label": "Synopsys: DesignWare tRoot™ Hardware Secure Module (HSM) & 1T AntiFuse Security Subsystem Manual",
        "url": "https://www.synopsys.com/designware-ip/security-ip.html",
        "locator": "Official Hardware Secure Module and Secure Boot Architecture Announcement",
        "kind": "Product Specification Manual",
        "date": "2024-11-20",
        "limit": "Integrates isolated secure RISC-V/ARC processor core, hardware crypto accelerator, TRNG, and 1T Split-Channel AntiFuse OTP; compliant with PSA Certified Level 3."
      },
      {
        "id": "RES-RAMBUS-CRYPTOMANAGER-2025",
        "label": "Rambus: CryptoManager™ Root of Trust & PCIe/CXL SPDM 1.3 Device Attestation Whitepaper",
        "url": "https://www.rambus.com/security/root-of-trust/",
        "locator": "Official PCIe/CXL IDE & Silicon Root of Trust Lifecycle Architecture",
        "kind": "Enterprise Security Whitepaper",
        "date": "2025-02-18",
        "limit": "Hardware acceleration of DMTF SPDM 1.2/1.3 device attestation and line-rate PCIe/CXL IDE (AES-GCM) encryption, bridging Foundry, OSAT, and cloud CSP certificate lifecycles."
      }
    ],
    "landscape": [
      {
        "id": "everspin-toggle",
        "name": "Everspin Toggle MRAM",
        "technology": "Toggle MRAM",
        "family": "MRAM",
        "role": "Discrete memory supplier",
        "maturity": "Commercial products",
        "claim": "The current PERSYST catalog lists Toggle production parts. MR3A16ACYS35 is marked MP and specifies 8Mb, asynchronous x16, 35ns, 3.3V and −40 to 85°C.",
        "limit": "These values belong only to MR3A16ACYS35. Do not mix speed, temperature or automotive ratings across parts. The old MR4A16B datasheet is inaccessible, so its over-20-year retention is not cited.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "everspin-toggle",
          "everspin-persyst-catalog"
        ],
        "target": "research-everspin",
        "search": "Everspin Toggle MRAM 現行PERSYST目錄保留Toggle量產料號，例如MR3A16ACYS35為8Mb、x16非同步介面、35ns、3.3V、−40～85°C，標示MP。 The current PERSYST catalog lists Toggle production parts. MR3A16ACYS35 is marked MP and specifies 8Mb, asynchronous x16, 35ns, 3.3V and −40 to 85°C."
      },
      {
        "id": "everspin-1gb-ddr",
        "name": "Everspin 1Gb STT-MRAM",
        "technology": "STT-MRAM / DDR4-derived",
        "family": "MRAM",
        "role": "Discrete persistent-memory supplier",
        "maturity": "Shipping",
        "claim": "The 2025 Form 10-K confirms continuing 1Gb STT-MRAM shipments. The technology page identifies a DDR4-like persistent-DRAM product for enterprise storage.",
        "limit": "DDR4-like does not imply drop-in compatibility with every DDR4 controller. Do not transfer Toggle or xSPI retention, endurance or automotive ratings. The old family URL is now 404.",
        "dateLabel": "Source date / event period: 2026-03-04 · Checked 2026-09-10",
        "sourceIds": [
          "everspin-1gb-ddr",
          "everspin-ddr-technology",
          "everspin-2025-10k"
        ],
        "target": "research-everspin",
        "search": "Everspin 1Gb STT-MRAM 2025年度10-K確認1Gb STT-MRAM持續出貨，採DDR衍生介面；官方技術頁將1Gb定位為類DDR4介面的持續性DRAM。 The 2025 Form 10-K confirms continuing 1Gb STT-MRAM shipments. The technology page identifies a DDR4-like persistent-DRAM product for enterprise storage."
      },
      {
        "id": "everspin-xspi",
        "name": "Everspin EMxxLX xSPI",
        "technology": "STT-MRAM / xSPI",
        "family": "MRAM",
        "role": "Discrete memory supplier",
        "maturity": "HR 64Mb qualified and orderable; HR 128/256Mb scheduled at release",
        "claim": "The March 5, 2026 investor release confirms HR 64Mb xSPI STT-MRAM completed AEC-Q100 Grade 1 production qualification and is orderable with distributor inventory. HR 128Mb qualification was expected in May and 256Mb in July, with 256Mb volume availability expected in the second half of 2026.",
        "limit": "The 128Mb and 256Mb dates were forecasts as of March 5, 2026; subsequent completion was not verified. HR qualification does not transfer to other EMxxLX variants. This release does not specify bandwidth or retention.",
        "dateLabel": "Source date / event period: 2026-03-05 · Checked 2026-09-10",
        "sourceIds": [
          "everspin-xspi",
          "everspin-hr-xspi-20260305",
          "everspin-ddr-technology"
        ],
        "target": "research-everspin",
        "search": "Everspin EMxxLX xSPI 2026-03-05官方投資人公告：HR 64Mb xSPI STT-MRAM完成AEC-Q100 Grade 1量產認證，可訂購且通路有庫存；HR 128Mb預定5月、256Mb預定7月完成認證，256Mb預期下半年供量。 The March 5, 2026 investor release confirms HR 64Mb xSPI STT-MRAM completed AEC-Q100 Grade 1 production qualification and is orderable with distributor inventory. HR 128Mb qualification was expected in May and 256Mb in July, with 256Mb volume availability expected in the second half of 2026."
      },
      {
        "id": "avalanche-umc22",
        "name": "Avalanche Technology / UMC",
        "technology": "pMTJ STT-MRAM",
        "family": "MRAM",
        "role": "Memory supplier / foundry",
        "maturity": "Named product in production",
        "claim": "The September 13, 2022 release announces immediate availability of Gen 3 P-SRAM on UMC 22nm. The cited parallel x32 product specifies over 10^14 writes and 1,000-year retention at 85°C.",
        "limit": "This is a discrete product, not proof of identical specifications for general UMC embedded macros. Retention is a supplier reliability specification.",
        "dateLabel": "Source date / event period: 2022-09-13 · Checked 2026-09-10",
        "sourceIds": [
          "avalanche-umc22"
        ],
        "target": "topic-stt",
        "search": "Avalanche Technology / UMC 2022-09-13宣布UMC 22nm第三代P-SRAM立即供應，Parallel x32系列所述規格為逾10^14次耐寫、85°C保存1,000年及−40～125°C操作。 The September 13, 2022 release announces immediate availability of Gen 3 P-SRAM on UMC 22nm. The cited parallel x32 product specifies over 10^14 writes and 1,000-year retention at 85°C."
      },
      {
        "id": "avalanche-scaling2026",
        "name": "Avalanche Technology",
        "technology": "STT-MRAM",
        "family": "MRAM",
        "role": "Memory and technology developer",
        "maturity": "Cell-scaling milestone",
        "claim": "The 2026 web announcement reports completion of a first-phase MTJ scaling milestone for future higher-density space-grade MRAM.",
        "limit": "The page is dated March 2, 2026, but the body says March 2, 2025. A 16x density increase is a future goal, not a shipped product.",
        "dateLabel": "Source date / event period: 2026-03-02 · Checked 2026-09-10",
        "sourceIds": [
          "avalanche-scaling2026"
        ],
        "target": "topic-stt",
        "search": "Avalanche Technology 2026年網頁公告完成政府合約第一階段MTJ縮放，以支援未來更高密度太空級MRAM。 The 2026 web announcement reports completion of a first-phase MTJ scaling milestone for future higher-density space-grade MRAM."
      },
      {
        "id": "samsung-emram",
        "name": "Samsung Foundry",
        "technology": "STT-MRAM / eMRAM",
        "family": "MRAM",
        "role": "Foundry platform",
        "maturity": "28FDS production; FinFET expansion",
        "claim": "The current specialty-process page confirms 28nm FD-SOI eMRAM mass production since 2019 and expansion to 14LPU and 8LPU, with 5nm still planned.",
        "limit": "Platform expansion does not establish named high-volume customers at every node. Earlier roadmap dates are not completion evidence.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "samsung-emram"
        ],
        "target": "topic-stt",
        "search": "Samsung Foundry 官方現行特殊製程頁確認2019年28nm FD-SOI eMRAM量產，並表示MTJ模組已擴展至14LPU及8LPU，5nm仍列計畫。 The current specialty-process page confirms 28nm FD-SOI eMRAM mass production since 2019 and expansion to 14LPU and 8LPU, with 5nm still planned."
      },
      {
        "id": "intel-22ffl-research",
        "name": "Intel",
        "technology": "STT-MRAM",
        "family": "MRAM",
        "role": "Process and device R&D",
        "maturity": "Published research; current product unverified",
        "claim": "The official IEDM 2018 program lists Intel-authored work on MRAM embedded in 22FFL FinFET, establishing primary evidence of process-integration research.",
        "limit": "No newer verified Intel commercial MRAM offering was found in this bounded review. Do not infer availability from the paper or the Intel 16 name.",
        "dateLabel": "Source date / event period: 2018-12-04 · Checked 2026-09-10",
        "sourceIds": [
          "intel-22ffl-research"
        ],
        "target": "topic-stt",
        "search": "Intel IEDM 2018官方議程列Intel作者22FFL FinFET嵌入式MRAM論文，提供整合技術的一手研究證據。 The official IEDM 2018 program lists Intel-authored work on MRAM embedded in 22FFL FinFET, establishing primary evidence of process-integration research."
      },
      {
        "id": "tsmc-16mram2025",
        "name": "TSMC",
        "technology": "eMRAM / STT route",
        "family": "MRAM",
        "role": "Foundry platform",
        "maturity": "Automotive Grade 1 qualified",
        "claim": "The 2025 annual report confirms qualification and customer availability of second-generation 16nm automotive Grade 1 MRAM. 12nm automotive and 5nm high-speed MRAM remain in development.",
        "limit": "Qualification is not proof of volume shipment of a named MCU. SOT research must remain separate from qualified platforms.",
        "dateLabel": "Source date / event period: 2025 · Checked 2026-09-10",
        "sourceIds": [
          "tsmc-16mram2025"
        ],
        "target": "topic-stt",
        "search": "TSMC 2025年報確認16nm第二代MRAM通過車用Grade 1並提供客戶；12nm車用及5nm高速MRAM仍在開發。 The 2025 annual report confirms qualification and customer availability of second-generation 16nm automotive Grade 1 MRAM. 12nm automotive and 5nm high-speed MRAM remain in development."
      },
      {
        "id": "tsmc-sot2025",
        "name": "TSMC SOT-MRAM",
        "technology": "SOT-MRAM",
        "family": "MRAM",
        "role": "Advanced memory R&D",
        "maturity": "Research demonstration",
        "claim": "The 2025 annual report describes an IEDM 2025 Type-C SOT-MRAM demonstration using a circular MTJ with built-in magnetic anisotropy for field-free operation.",
        "limit": "A research demonstration is not a commercial process or a shipping SRAM replacement; 16nm automotive MRAM maturity does not transfer.",
        "dateLabel": "Source date / event period: 2025-12 · Checked 2026-09-10",
        "sourceIds": [
          "tsmc-sot2025"
        ],
        "target": "topic-sot",
        "search": "TSMC SOT-MRAM 2025年報記載IEDM 2025展示Type-C SOT-MRAM，以圓形MTJ與內建磁異向性達成無外加磁場操作。 The 2025 annual report describes an IEDM 2025 Type-C SOT-MRAM demonstration using a circular MTJ with built-in magnetic anisotropy for field-free operation."
      },
      {
        "id": "gf-22fdx",
        "name": "GlobalFoundries",
        "technology": "STT-MRAM / 22FDX",
        "family": "MRAM",
        "role": "Foundry platform",
        "maturity": "Platform entered production",
        "claim": "The February 27, 2020 announcement confirms production entry of 22FDX eMRAM and 4–48Mb silicon-validated macros, with 100k endurance and 10-year retention across the stated temperature range.",
        "limit": "Grade 1 was a future target in that release. The current FDX page still lists MRAM, but customer-specific qualification requires separate evidence.",
        "dateLabel": "Source date / event period: 2020-02-27 · Checked 2026-09-10",
        "sourceIds": [
          "gf-22fdx",
          "gf-current-fdx"
        ],
        "target": "topic-stt",
        "search": "GlobalFoundries 2020-02-27官方確認22FDX eMRAM進入生產，供應4～48Mb矽驗證巨集；公告展示100k耐寫、10年保存與−40～125°C範圍。 The February 27, 2020 announcement confirms production entry of 22FDX eMRAM and 4–48Mb silicon-validated macros, with 100k endurance and 10-year retention across the stated temperature range."
      },
      {
        "id": "renesas-ra8-2025",
        "name": "Renesas RA8M2 / RA8D2",
        "technology": "Embedded MRAM",
        "family": "MRAM",
        "role": "MCU supplier",
        "maturity": "Available; Japanese release confirms production",
        "claim": "The October 22, 2025 release announces available RA8M2 and RA8D2 MCUs with embedded MRAM, a 1GHz Cortex-M85 and a 250MHz Cortex-M33.",
        "limit": "CPU clock is not native MRAM read speed. Do not transfer 2024 research-macro measurements directly to the RA8 products.",
        "dateLabel": "Source date / event period: 2025-10-22 · Checked 2026-09-10",
        "sourceIds": [
          "renesas-ra8-2025"
        ],
        "target": "topic-stt",
        "search": "Renesas RA8M2 / RA8D2 2025-10-22推出RA8M2與RA8D2，內建MRAM、1GHz Cortex-M85與250MHz Cortex-M33；官方可供貨，不應只停留在2024年試驗巨集紀錄。 The October 22, 2025 release announces available RA8M2 and RA8D2 MCUs with embedded MRAM, a 1GHz Cortex-M85 and a 250MHz Cortex-M33."
      },
      {
        "id": "nxp-s32k5",
        "name": "NXP S32K5",
        "technology": "Embedded MRAM",
        "family": "MRAM",
        "role": "Automotive MCU supplier",
        "maturity": "Announced; official brief says preproduction",
        "claim": "NXP announced the 16nm FinFET S32K5 with embedded MRAM on March 11, 2025. Its October 30, 2025 product brief still labels the family preproduction.",
        "limit": "The claimed 15x write advantage is a supplier comparison against embedded flash, not an absolute latency. Announcement is not volume-production evidence.",
        "dateLabel": "Source date / event period: 2025-10-30 · Checked 2026-09-10",
        "sourceIds": [
          "nxp-s32k5",
          "nxp-launch"
        ],
        "target": "topic-stt",
        "search": "NXP S32K5 2025-03-11宣布16nm FinFET S32K5內建MRAM；2025-10-30官方產品摘要仍標示量產前產品。 NXP announced the 16nm FinFET S32K5 with embedded MRAM on March 11, 2025. Its October 30, 2025 product brief still labels the family preproduction."
      },
      {
        "id": "netsol-stt",
        "name": "NETSOL",
        "technology": "STT-MRAM",
        "family": "MRAM",
        "role": "Discrete memory supplier",
        "maturity": "Named product datasheet",
        "claim": "The March 2024 S3RxxxxR1M datasheet specifies 1–16Mbit STT-MRAM, asynchronous x8/x16 interfaces and an industrial −40 to 85°C range; the website also lists serial products.",
        "limit": "Do not transfer larger densities or process nodes from other series or media reports into this datasheet. Shipment volume is not disclosed.",
        "dateLabel": "Source date / event period: 2024-03 · Checked 2026-09-10",
        "sourceIds": [
          "netsol-stt"
        ],
        "target": "topic-stt",
        "search": "NETSOL 2024年3月S3RxxxxR1M資料表列1～16Mbit STT-MRAM、x8／x16非同步平行介面及−40～85°C工業溫度；官網另列串列系列。 The March 2024 S3RxxxxR1M datasheet specifies 1–16Mbit STT-MRAM, asynchronous x8/x16 interfaces and an industrial −40 to 85°C range; the website also lists serial products."
      },
      {
        "id": "tdk-headway",
        "name": "TDK / Headway",
        "technology": "STT-MRAM",
        "family": "MRAM",
        "role": "Magnetics, MTJ and technology R&D",
        "maturity": "Technology and R&D; commercial memory SKU unverified",
        "claim": "TDK's September 1, 2025 investor-day presentation includes STT-MRAM among its spintronics technologies; Headway authors also have public embedded-STT-MRAM research presentations.",
        "limit": "HDD-head production and MTJ expertise do not establish commercial discrete MRAM. No orderable MRAM SKU, PDK or specific foundry commitment was verified.",
        "dateLabel": "Source date / event period: 2025-09-01 · Checked 2026-09-10",
        "sourceIds": [
          "tdk-headway",
          "headway-author-research"
        ],
        "target": "topic-stt",
        "search": "TDK / Headway TDK 2025-09-01投資人日資料將STT-MRAM列為累積自旋電子技術；Headway作者亦有公開STT-MRAM嵌入式研究簡報。 TDK's September 1, 2025 investor-day presentation includes STT-MRAM among its spintronics technologies; Headway authors also have public embedded-STT-MRAM research presentations."
      },
      {
        "id": "numem-aime",
        "name": "Numem",
        "technology": "Foundry-based STT-MRAM",
        "family": "MRAM",
        "role": "Memory IP and chip/chiplet architecture provider",
        "maturity": "Supplier claims production readiness; shipments unverified",
        "claim": "Numem describes foundry-based STT-MRAM IP and chips/chiplets enhanced by AIME. Its June 10, 2025 announcement claims production readiness.",
        "limit": "Power and SRAM-class performance are supplier claims without uniform independent benchmarking. This is not evidence of a new magnetic material or named volume shipments.",
        "dateLabel": "Source date / event period: 2025-06-10 · Checked 2026-09-10",
        "sourceIds": [
          "numem-aime",
          "numem-current"
        ],
        "target": "ip-numem-mram",
        "search": "Numem 官方網站將方案定位為以代工STT-MRAM單元為基礎的IP及晶粒／小晶片，搭配AIME；2025-06-10新聞稱AI記憶體引擎已可供量產。 Numem describes foundry-based STT-MRAM IP and chips/chiplets enhanced by AIME. Its June 10, 2025 announcement claims production readiness."
      },
      {
        "id": "imec-sot",
        "name": "imec",
        "technology": "SOT-MRAM",
        "family": "MRAM",
        "role": "Research institute / technology R&D",
        "maturity": "300mm research-device demonstration",
        "claim": "On December 13, 2023 imec reported roughly 50nm critical-dimension SOT devices on 300mm wafers, below 100fJ/bit switching energy and endurance above 10^15 cycles.",
        "limit": "Device switching energy excludes full macro, bus and system overhead. The 50nm dimension is not a 50nm CMOS process-node claim.",
        "dateLabel": "Source date / event period: 2023-12-13 · Checked 2026-09-10",
        "sourceIds": [
          "imec-sot"
        ],
        "target": "topic-sot",
        "search": "imec 2023-12-13公開300mm晶圓上約50nm關鍵尺寸SOT元件，切換能量低於100fJ/bit、耐受超過10^15次循環，供快取應用研發。 On December 13, 2023 imec reported roughly 50nm critical-dimension SOT devices on 300mm wafers, below 100fJ/bit switching energy and endurance above 10^15 cycles."
      },
      {
        "id": "ibm-research",
        "name": "IBM Research",
        "technology": "STT-MRAM",
        "family": "MRAM",
        "role": "Device and Integration Research",
        "maturity": "Device and CMOS Integration Demonstrations",
        "claim": "IBM contributes traceable device physics and CMOS integration results. MTJ size, process node and write-error rate from different studies must not be combined into an imaginary best-specification product.",
        "limit": "IBM papers are not a list of IBM production foundry services.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "RES-IBM-REVIEW-2024",
          "RES-IBM-11NM-2017"
        ],
        "target": "research-ibm",
        "search": "IBM Research STT-MRAM"
      },
      {
        "id": "itri-research",
        "name": "ITRI",
        "technology": "SOT-MRAM",
        "family": "MRAM",
        "role": "Collaborative Research, Prototyping and Transfer",
        "maturity": "Research Arrays, Prototypes and Trial Production",
        "claim": "ITRI evidence spans distinct collaborations and versions: SOT with TSMC, cryogenic STT with NYCU, a joint β-W array, an 8-inch prototyping service and RRAM technology transfer.",
        "limit": "Collaborative research must not be represented as an ITRI standalone production product.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "RES-ITRI-SOT-2022",
          "RES-ITRI-CIM-2024",
          "RES-ITRI-SERVICE"
        ],
        "target": "research-itri",
        "search": "ITRI SOT-MRAM"
      },
      {
        "id": "rram-weebit-2026",
        "name": "Weebit Nano",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "ReRAM IP licensor",
        "maturity": "Licensing and customer prototypes",
        "claim": "Three customer designs had taped out by July 2026, with a prototype running software.",
        "limit": "First customer product mass production remained a future milestone.",
        "dateLabel": "Source date / event period: 2026-07-31 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-WEEBIT-2026"
        ],
        "target": "ip-weebit-reram",
        "search": "Weebit Nano 2026 年 7 月公告三個客戶設計已投片，已有原型執行軟體。 Three customer designs had taped out by July 2026, with a prototype running software."
      },
      {
        "id": "rram-onsemi-2026",
        "name": "onsemi",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "IDM adopting ReRAM",
        "maturity": "Technology transfer",
        "claim": "Weebit reported onsemi ReRAM technology transfer progressing to schedule.",
        "limit": "Licensing or transfer does not establish product mass production.",
        "dateLabel": "Source date / event period: 2026-07-31 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-ONSEMI-2026"
        ],
        "target": "topic-vcm",
        "search": "onsemi Weebit 公告對 onsemi 的 ReRAM 技轉按計畫進行。 Weebit reported onsemi ReRAM technology transfer progressing to schedule."
      },
      {
        "id": "rram-ti-2026",
        "name": "Texas Instruments",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "IDM adopting ReRAM",
        "maturity": "Technology transfer",
        "claim": "Weebit reported TI ReRAM technology transfer progressing to schedule.",
        "limit": "TI commercial FRAM and this ReRAM transfer are separate technology routes.",
        "dateLabel": "Source date / event period: 2026-07-31 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-TI-2026"
        ],
        "target": "topic-vcm",
        "search": "Texas Instruments Weebit 公告對 TI 的 ReRAM 技轉按計畫進行。 Weebit reported TI ReRAM technology transfer progressing to schedule."
      },
      {
        "id": "rram-skywater-s130",
        "name": "SkyWater / Weebit Nano",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Foundry and IP partnership",
        "maturity": "Qualified IP available for SoC integration",
        "claim": "The official IP page lists qualified S130 130 nm CMOS ReRAM, available for integration, with two added masks in BEOL.",
        "limit": "IP qualification does not qualify every customer chip or prove its mass production.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "RRAM-SKYWATER-S130"
        ],
        "target": "topic-vcm",
        "search": "SkyWater／Weebit Nano 官方 IP 頁列 S130 130 nm CMOS 已依 JEDEC 與 AEC-Q100 驗證、可供整合；BEOL 增加 2 層光罩。 The official IP page lists qualified S130 130 nm CMOS ReRAM, available for integration, with two added masks in BEOL."
      },
      {
        "id": "rram-dbhitek-130",
        "name": "DB HiTek / Weebit Nano",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Foundry and IP partnership",
        "maturity": "Qualified and available for integration",
        "claim": "130 nm BCD ReRAM IP is silicon-proven and qualified, adding two masks; listed specifications include 10K writes and over ten years retention at 125°C.",
        "limit": "100K cycles is an extension option; base BCD volume does not establish ReRAM product shipments.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "RRAM-DBHITEK-130"
        ],
        "target": "topic-vcm",
        "search": "DB HiTek／Weebit Nano 130 nm BCD 的 ReRAM IP 已矽驗證與資格驗證，使用 2 層加罩；官方列 10K 次耐寫、125°C 保存超過 10 年。 130 nm BCD ReRAM IP is silicon-proven and qualified, adding two masks; listed specifications include 10K writes and over ten years retention at 125°C."
      },
      {
        "id": "rram-tsmc-iot",
        "name": "TSMC",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Embedded-memory foundry",
        "maturity": "40/22 in production; 12 risk production",
        "claim": "The IoT NVM page lists 40RRAM and 22RRAM in production; 12RRAM entered consumer-grade risk production in 2024, with cells between BEOL metal layers.",
        "limit": "12RRAM risk production is not full production or automotive qualification.",
        "dateLabel": "Source date / event period: 2024 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-TSMC-IOT"
        ],
        "target": "topic-vcm",
        "search": "TSMC 官方 IoT NVM 頁列 40RRAM、22RRAM 已量產；12RRAM 於 2024 年進入消費級風險試產，記憶單元位於後段金屬層間。 The IoT NVM page lists 40RRAM and 22RRAM in production; 12RRAM entered consumer-grade risk production in 2024, with cells between BEOL metal layers."
      },
      {
        "id": "rram-infineon-tc4x",
        "name": "Infineon / TSMC",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Automotive MCU and process partnership",
        "maturity": "Announced integration partnership",
        "claim": "The 2022 announcement describes preparing TSMC RRAM for next-generation AURIX TC4x, supporting bit-wise writes without prior erase.",
        "limit": "This announcement does not prove every TC4x variant uses RRAM or has reached production.",
        "dateLabel": "Source date / event period: 2022-11-25 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-INFINEON-TC4X"
        ],
        "target": "topic-vcm",
        "search": "Infineon／TSMC 2022 年公告準備將台積電 RRAM 導入下一代 AURIX TC4x，支援位元寫入而不需先抹除。 The 2022 announcement describes preparing TSMC RRAM for next-generation AURIX TC4x, supporting bit-wise writes without prior erase."
      },
      {
        "id": "cbram-gf-renesas",
        "name": "GlobalFoundries / Renesas / Dialog",
        "technology": "CBRAM",
        "family": "ReRAM / CBRAM",
        "role": "CBRAM acquisition and foundry integration",
        "maturity": "2023 acquisition; 22FDX then in qualification",
        "claim": "GF acquired production-proven CBRAM technology from Renesas in 2023, following a 2020 Dialog license; 22FDX qualification was underway.",
        "limit": "Prior CBRAM production does not establish 22FDX production; the acquirer was GF, not Infineon.",
        "dateLabel": "Source date / event period: 2023-02-09 · Checked 2026-09-10",
        "sourceIds": [
          "CBRAM-GF-RENESAS"
        ],
        "target": "topic-ecm",
        "search": "GlobalFoundries／Renesas／Dialog GF 於 2023 年向 Renesas 收購已具量產實績的 CBRAM 技術；GF 先於 2020 年向 Dialog 授權，2023 年公告 22FDX 正在驗證。 GF acquired production-proven CBRAM technology from Renesas in 2023, following a 2020 Dialog license; 22FDX qualification was underway."
      },
      {
        "id": "rram-nuvoton-m2l31",
        "name": "Nuvoton",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Embedded ReRAM MCU supplier",
        "maturity": "Commercial product family",
        "claim": "The M2L31 family lists an Arm Cortex-M23, 64–512 KB ReRAM and 72 MHz operation; writes do not require a page erase.",
        "limit": "72 MHz is the MCU clock, not cell write latency; density and reliability are part-specific.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "RRAM-NUVOTON-M2L31"
        ],
        "target": "topic-vcm",
        "search": "Nuvoton M2L31 產品頁列 Arm Cortex-M23、64–512 KB ReRAM 與 72 MHz；ReRAM 寫入前不需頁抹除。 The M2L31 family lists an Arm Cortex-M23, 64–512 KB ReRAM and 72 MHz operation; writes do not require a page erase."
      },
      {
        "id": "rram-panasonic-umc",
        "name": "Panasonic / UMC",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Historical ReRAM process collaboration",
        "maturity": "2017 joint-development announcement",
        "claim": "The 2017 agreement combined Panasonic ReRAM with UMC manufacturing to develop a 40 nm mass-production process.",
        "limit": "The development target is not evidence of 2026 availability or the process used by every current Nuvoton part.",
        "dateLabel": "Source date / event period: 2017-02-01 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-PANASONIC-UMC"
        ],
        "target": "research-panasonic",
        "search": "Panasonic／UMC 2017 年宣布共同開發 40 nm ReRAM 量產製程，將 Panasonic ReRAM 與 UMC 製造能力結合。 The 2017 agreement combined Panasonic ReRAM with UMC manufacturing to develop a 40 nm mass-production process."
      },
      {
        "id": "rram-ramxeed-product",
        "name": "RAMXEED",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Standalone ReRAM supplier",
        "maturity": "Specific part in mass production",
        "claim": "The product list marks the MB85AS8MT 8 Mbit SPI ReRAM as mass-produced with one million cycles; the 12 Mbit part requires sales contact.",
        "limit": "Do not transfer the 8 Mbit production status or endurance to the 12 Mbit part.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "RRAM-RAMXEED-PRODUCT"
        ],
        "target": "topic-vcm",
        "search": "RAMXEED 官方清單將 MB85AS8MT 8 Mbit SPI ReRAM 標示量產，列 100 萬次循環；12 Mbit 型號則要求洽詢業務。 The product list marks the MB85AS8MT 8 Mbit SPI ReRAM as mass-produced with one million cycles; the 12 Mbit part requires sales contact."
      },
      {
        "id": "rram-crossbar-daric",
        "name": "CrossBar",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "ReRAM IP and secure-processor developer",
        "maturity": "Vendor architecture and chip disclosure",
        "claim": "A 2026 company article describes the 22 nm Daric secure processor integrating ReRAM, computing and cryptography on one die.",
        "limit": "The article does not establish production qualification or independent security certification; avoid blanket immunity claims.",
        "dateLabel": "Source date / event period: 2026-05-06 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-CROSSBAR-DARIC"
        ],
        "target": "ip-crossbar-reram",
        "search": "CrossBar 2026 年官方文章介紹採 ReRAM 的 22 nm Daric 安全處理器，將 NVM、運算與密碼功能整合於單晶片。 A 2026 company article describes the 22 nm Daric secure processor integrating ReRAM, computing and cryptography on one die."
      },
      {
        "id": "rram-cea-leti",
        "name": "CEA-Leti / Weebit Nano",
        "technology": "ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "ReRAM and neuromorphic research partnership",
        "maturity": "Research demonstration",
        "claim": "The announcement combines CEA-Leti spiking neural networks with Weebit SiOx ReRAM in a neuromorphic object-recognition demonstration.",
        "limit": "The demonstration is not an orderable complete AI accelerator; transfer and qualification require separate evidence.",
        "dateLabel": "Source date / event period: 2019-07-18 · Checked 2026-09-10",
        "sourceIds": [
          "RRAM-CEA-LETI"
        ],
        "target": "topic-vcm",
        "search": "CEA-Leti／Weebit Nano 官方公告結合 CEA-Leti 脈衝神經網路與 Weebit SiOx ReRAM，展示物件辨識方向的神經形態運算。 The announcement combines CEA-Leti spiking neural networks with Weebit SiOx ReRAM in a neuromorphic object-recognition demonstration."
      },
      {
        "id": "umc-research",
        "name": "UMC",
        "technology": "22nm RRAM",
        "family": "ReRAM / CBRAM",
        "role": "Foundry and Ecosystem Integration",
        "maturity": "Qualified RRAM IP; Named MRAM Products Available",
        "claim": "UMC evidence spans process availability, qualified RRAM IP, a SoC development platform and standalone MRAM products. These are distinct delivery levels.",
        "limit": "A standalone MRAM product does not establish an available embedded macro.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "RES-UMC-RRAM-2023",
          "RES-UMC-MRAM-2022"
        ],
        "target": "research-umc",
        "search": "UMC 22nm RRAM"
      },
      {
        "id": "itri-1s1r",
        "name": "ITRI",
        "technology": "1S1R RRAM",
        "family": "ReRAM / CBRAM",
        "role": "Technology transfer",
        "maturity": "Undated research / transfer listing",
        "claim": "Cross-point RRAM and selector development with published electrical and geometry targets.",
        "limit": "Not evidence of current high-volume manufacturing.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "RES-ITRI-RRAM"
        ],
        "target": "research-itri",
        "search": "ITRI 1S1R RRAM"
      },
      {
        "id": "st-pcm-boundary",
        "name": "STMicroelectronics",
        "technology": "PCM, not established MRAM offering",
        "family": "PCM",
        "role": "MCU supplier; classification boundary",
        "maturity": "Announced; selected-customer early access",
        "claim": "The November 18, 2025 STM32V8 announcement explicitly identifies 18nm FD-SOI and embedded PCM, with Samsung Foundry manufacturing cooperation.",
        "limit": "The 2025 announcement offered early access to selected customers and targeted major OEM availability for Q1 2026, with broad availability later. Calendar passage does not prove completion.",
        "dateLabel": "Source date / event period: 2025-11-18 · Checked 2026-09-10",
        "sourceIds": [
          "st-pcm-boundary"
        ],
        "target": "topic-pcm",
        "search": "STMicroelectronics 2025-11-18 STM32V8官方公告明確採18nm FD-SOI與嵌入式PCM，並與Samsung Foundry合作製造。 The November 18, 2025 STM32V8 announcement explicitly identifies 18nm FD-SOI and embedded PCM, with Samsung Foundry manufacturing cooperation."
      },
      {
        "id": "xpoint-micron-exit",
        "name": "Micron",
        "technology": "3D XPoint",
        "family": "PCM",
        "role": "Historical 3D XPoint developer and supplier",
        "maturity": "Historical route; development ceased",
        "claim": "Micron announced an immediate end to 3D XPoint development in 2021 and redirected resources toward CXL memory products.",
        "limit": "Ending this route does not end all PCM research; CXL is an interconnect, not a memory-cell mechanism.",
        "dateLabel": "Source date / event period: 2021-03-16 · Checked 2026-09-10",
        "sourceIds": [
          "XPOINT-MICRON-EXIT"
        ],
        "target": "topic-pcm",
        "search": "Micron Micron 於 2021 年宣布立即停止 3D XPoint 開發，將資源轉向 CXL 記憶體產品。 Micron announced an immediate end to 3D XPoint development in 2021 and redirected resources toward CXL memory products."
      },
      {
        "id": "xpoint-intel-exit",
        "name": "Intel",
        "technology": "3D XPoint",
        "family": "PCM",
        "role": "Historical Optane supplier",
        "maturity": "Historical route; business wind-down",
        "claim": "Intel's 2022 annual filing states that the Optane memory business wind-down began in 2022.",
        "limit": "Historical product pages or inventory sales do not establish continuing development or other vendors' PCM exits.",
        "dateLabel": "Source date / event period: 2022 · Checked 2026-09-10",
        "sourceIds": [
          "XPOINT-INTEL-EXIT"
        ],
        "target": "topic-pcm",
        "search": "Intel Intel 2022 年年報確認該年啟動 Optane 記憶體業務收尾。 Intel's 2022 annual filing states that the Optane memory business wind-down began in 2022."
      },
      {
        "id": "pcm-st-p3e",
        "name": "STMicroelectronics",
        "technology": "PCM",
        "family": "PCM",
        "role": "Automotive embedded-PCM MCU supplier",
        "maturity": "Stellar family; P3E sampling and production plan",
        "claim": "The 2026 Stellar P3E page identifies xMemory PCM, with full automotive qualification and production readiness planned for H2 2026.",
        "limit": "Reaching the planned quarter does not prove completion; P3E timing does not apply to every Stellar part.",
        "dateLabel": "Source date / event period: 2026 · Checked 2026-09-10",
        "sourceIds": [
          "PCM-ST-P3E"
        ],
        "target": "topic-pcm",
        "search": "STMicroelectronics 2026 年 Stellar P3E 官方公告採 xMemory PCM；完整車規驗證與量產準備排定於 2026 下半年。 The 2026 Stellar P3E page identifies xMemory PCM, with full automotive qualification and production readiness planned for H2 2026."
      },
      {
        "id": "pcm-ibm-aimc",
        "name": "IBM Research",
        "technology": "PCM",
        "family": "PCM",
        "role": "Analog in-memory-computing research",
        "maturity": "Research chip",
        "claim": "A 14 nm CMOS research chip with backend PCM integrates 64 256×256 analog cores and digital processing and communication for neural-network inference.",
        "limit": "Analog weight-compute results do not establish a purchasable general-purpose PCM memory or complete-system performance.",
        "dateLabel": "Source date / event period: 2023-09-17 · Checked 2026-09-10",
        "sourceIds": [
          "PCM-IBM-AIMC"
        ],
        "target": "topic-pcm",
        "search": "IBM Research 14 nm CMOS 後段整合 PCM 的研究晶片包含 64 個 256×256 類比運算核心及數位處理／通訊，展示神經網路推論。 A 14 nm CMOS research chip with backend PCM integrates 64 256×256 analog cores and digital processing and communication for neural-network inference."
      },
      {
        "id": "feram-ti-msp430",
        "name": "Texas Instruments",
        "technology": "FeRAM",
        "family": "FeRAM",
        "role": "Embedded FRAM MCU supplier",
        "maturity": "Commercial MCUs and reference design",
        "claim": "An MSP430 reference design emulates EEPROM using embedded FRAM and lists supported MCUs and I2C/SPI host interfaces.",
        "limit": "FRAM is the storage technology; EEPROM emulation is interface behavior, not floating-gate or FeFET construction.",
        "dateLabel": "Source date / event period: 2016-12-20 · Checked 2026-09-10",
        "sourceIds": [
          "FERAM-TI-MSP430"
        ],
        "target": "topic-feram",
        "search": "Texas Instruments MSP430 FRAM 參考設計以嵌入式 FRAM 模擬 EEPROM，列出可採用的 MCU 與 I²C／SPI 主機介面。 An MSP430 reference design emulates EEPROM using embedded FRAM and lists supported MCUs and I2C/SPI host interfaces."
      },
      {
        "id": "feram-ramxeed",
        "name": "RAMXEED",
        "technology": "FeRAM",
        "family": "FeRAM",
        "role": "Standalone FeRAM and embedded-application supplier",
        "maturity": "Mass-produced products",
        "claim": "The FAQ states FeRAM has been mass-produced since 1999 for frequent-write applications; retention must be interpreted at the specified temperature.",
        "limit": "Cycle ratings, interfaces and temperatures are part-specific; FeRAM is not synonymous with all FeFET or FTJ devices.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "FERAM-RAMXEED"
        ],
        "target": "topic-feram",
        "search": "RAMXEED 官方 FAQ 說明 FeRAM 自 1999 年持續量產，應用於高頻寫入紀錄；保存年限必須依產品規定溫度解讀。 The FAQ states FeRAM has been mass-produced since 1999 for frequent-write applications; retention must be interpreted at the specified temperature."
      },
      {
        "id": "feram-infineon",
        "name": "Infineon",
        "technology": "FeRAM",
        "family": "FeRAM",
        "role": "Standalone F-RAM supplier",
        "maturity": "Commercial product family",
        "claim": "Infineon lists serial, parallel and EXCELON F-RAM using PZT ferroelectric films, with family-dependent endurance up to 100 trillion cycles.",
        "limit": "Maximum ratings do not apply to every part; this does not establish HfO2 FeFET or FTJ construction.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "FERAM-INFINEON"
        ],
        "target": "topic-feram",
        "search": "Infineon Infineon 列出串列／並列及 EXCELON F-RAM，採 PZT 鐵電薄膜，最高 100 兆次讀寫循環依系列而定。 Infineon lists serial, parallel and EXCELON F-RAM using PZT ferroelectric films, with family-dependent endurance up to 100 trillion cycles."
      },
      {
        "id": "feram-gf-ipms-2026",
        "name": "GlobalFoundries / Fraunhofer IPMS",
        "technology": "FeRAM",
        "family": "FeRAM",
        "role": "Ferroelectric process and research partnership",
        "maturity": "22FDX industrial-process integration demonstration",
        "claim": "The 2026 collaboration reports HfO2 ferroelectric FRAM integrated in 22FDX, operating below 1 V with nanosecond switching.",
        "limit": "The announcement lacks orderable parts, a complete qualification report or shipment volumes.",
        "dateLabel": "Source date / event period: 2026-06-11 · Checked 2026-09-10",
        "sourceIds": [
          "FERAM-GF-IPMS-2026"
        ],
        "target": "topic-feram",
        "search": "GlobalFoundries／Fraunhofer IPMS 2026 年共同成果將 HfO₂ 鐵電 FRAM 整合於 22FDX，公告低於 1 V 與奈秒級切換。 The 2026 collaboration reports HfO2 ferroelectric FRAM integrated in 22FDX, operating below 1 V with nanosecond switching."
      },
      {
        "id": "ferro-imec-ndread",
        "name": "imec",
        "technology": "FeRAM / FeCAP",
        "family": "FeRAM",
        "role": "Ferroelectric-device and compute-in-memory research",
        "maturity": "Research demonstration",
        "claim": "Joint work with Georgia Tech demonstrated nondestructive FeCAP reading, reporting over 10^11 read cycles at IEDM 2023.",
        "limit": "Read endurance is not write endurance and does not establish conventional FeRAM behavior or mass production.",
        "dateLabel": "Source date / event period: 2023 · Checked 2026-09-10",
        "sourceIds": [
          "FERRO-IMEC-NDREAD"
        ],
        "target": "topic-feram",
        "search": "imec 與 Georgia Tech 研究展示 FeCAP 非破壞讀取，在 IEDM 2023 發表超過 10¹¹ 次讀取耐受度。 Joint work with Georgia Tech demonstrated nondestructive FeCAP reading, reporting over 10^11 read cycles at IEDM 2023."
      },
      {
        "id": "ferro-namlab-2025",
        "name": "NaMLab",
        "technology": "FeFET / FTJ",
        "family": "FeFET / FTJ",
        "role": "Ferroelectric-device research institute",
        "maturity": "Research and publications",
        "claim": "The official 2025 publication list includes HZO bilayer FTJ thickness scaling and charge-trapping challenges in CMOS-embedded FeFETs.",
        "limit": "Publication listings establish research participation, not foundry service, PDK availability or mass production.",
        "dateLabel": "Source date / event period: 2025 · Checked 2026-09-10",
        "sourceIds": [
          "FERRO-NAMLAB-2025"
        ],
        "target": "topic-ftj",
        "search": "NaMLab 2025 年官方論文清單包括 HZO 雙層 FTJ 厚度微縮及 CMOS 嵌入式 FeFET 的電荷捕陷挑戰。 The official 2025 publication list includes HZO bilayer FTJ thickness scaling and charge-trapping challenges in CMOS-embedded FeFETs."
      },
      {
        "id": "ferro-fmc",
        "name": "FMC",
        "technology": "HfO2 Ferroelectric Memory",
        "family": "FeRAM",
        "role": "Ferroelectric-memory commercialization developer",
        "maturity": "Commercialization and vendor solution claims",
        "claim": "The current site proposes DRAM+ persistent modules and CACHE+ persistent chiplets based on ferroelectric technology.",
        "limit": "The current page describes ferroelectric capacitors; it does not establish that DRAM+ or CACHE+ uses a FeFET or FTJ. Product qualification and shipment volumes are not verified.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "FERRO-FMC"
        ],
        "target": "topic-feram",
        "search": "FMC 現行官網提出 DRAM+ 持久記憶體模組與 CACHE+ 持久快取晶粒，主張鐵電技術可整合既有製造流程。 The current site proposes DRAM+ persistent modules and CACHE+ persistent chiplets based on ferroelectric technology."
      },
      {
        "id": "industry-infineon-sonos",
        "name": "Infineon / Cypress",
        "technology": "SONOS eFlash",
        "family": "NOR / eFlash / SONOS",
        "role": "Technology and IP licensor",
        "maturity": "Named production platforms and licensing",
        "claim": "The official page identifies 2T SONOS, FN program/erase, production nodes and process/design licensing.",
        "limit": "Separate Cypress history from current macros; do not combine family-wide maximum specifications.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-infineon-sonos"
        ],
        "target": "topic-sonos",
        "search": "Infineon／Cypress 官方列出 2T SONOS、FN 寫抹與多個量產節點，提供製程及設計授權。 The official page identifies 2T SONOS, FN program/erase, production nodes and process/design licensing."
      },
      {
        "id": "industry-sst-superflash",
        "name": "SST / Microchip",
        "technology": "SuperFlash NOR / eFlash",
        "family": "NOR / eFlash / SONOS",
        "role": "Technology and IP licensor",
        "maturity": "Commercial technology licensing",
        "claim": "SST lists SuperFlash process integration and licensing, complementing standalone NOR coverage.",
        "limit": "Licensing does not establish identical current qualification across nodes; verify each technology generation.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-sst-superflash"
        ],
        "target": "topic-nor",
        "search": "SST／Microchip 官方列出 SuperFlash 製程整合與授權，適合補上獨立 NOR 以外的嵌入式技術入口。 SST lists SuperFlash process integration and licensing, complementing standalone NOR coverage."
      },
      {
        "id": "industry-st-estm",
        "name": "STMicroelectronics",
        "technology": "eSTM eFlash / Page EEPROM",
        "family": "NOR / eFlash / SONOS",
        "role": "Integrated device manufacturer",
        "maturity": "Named commercial implementation",
        "claim": "ST links 40nm floating-gate eSTM with vertical select transistors to STM32H5 and Page EEPROM implementations.",
        "limit": "Keep eSTM separate from Stellar PCM; it is not the cell used by every ST MCU.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-st-estm"
        ],
        "target": "topic-nor",
        "search": "STMicroelectronics 官方 eSTM 頁連結 40 nm 浮動閘極與垂直選擇電晶體，以及 STM32H5、Page EEPROM 的實施。 ST links 40nm floating-gate eSTM with vertical select transistors to STM32H5 and Page EEPROM implementations."
      },
      {
        "id": "industry-renesas-sgmonos",
        "name": "Renesas",
        "technology": "SG-MONOS eFlash",
        "family": "NOR / eFlash / SONOS",
        "role": "Integrated device manufacturer",
        "maturity": "Historical production and smaller-node research",
        "claim": "The 2016 announcement identifies production 40nm SG-MONOS MCUs and research on 16/14nm fin-shaped cells.",
        "limit": "This announcement does not prove 16/14nm production; verify current part numbers separately.",
        "dateLabel": "Source date / event period: 2016-12-07 · Checked 2026-09-10",
        "sourceIds": [
          "industry-renesas-sgmonos"
        ],
        "target": "topic-sonos",
        "search": "Renesas 2016 公告確認當時 40 nm MCU 採 SG-MONOS 量產，並展示 16／14 nm Fin 結構研究。 The 2016 announcement identifies production 40nm SG-MONOS MCUs and research on 16/14nm fin-shaped cells."
      },
      {
        "id": "industry-xfab-xt011",
        "name": "X-FAB",
        "technology": "XT011 eFlash / EEPROM",
        "family": "NOR / eFlash / SONOS",
        "role": "Foundry and platform provider",
        "maturity": "Named platform release",
        "claim": "The 2024 announcement identifies embedded Flash and EEPROM on the XT011 110nm BCD-on-SOI platform.",
        "limit": "Keep this separate from the historical 2003 XC06 example; do not assume identical cells.",
        "dateLabel": "Source date / event period: 2024-12-03 · Checked 2026-09-10",
        "sourceIds": [
          "industry-xfab-xt011"
        ],
        "target": "topic-nor",
        "search": "X-FAB 2024 年公告 XT011 110 nm BCD-on-SOI 平台的嵌入式 Flash 與 EEPROM。 The 2024 announcement identifies embedded Flash and EEPROM on the XT011 110nm BCD-on-SOI platform."
      },
      {
        "id": "industry-macronix-nor",
        "name": "Macronix",
        "technology": "Serial NOR / OctaBus",
        "family": "NOR / eFlash / SONOS",
        "role": "NOR/NAND product supplier",
        "maturity": "Official product portfolio",
        "claim": "Macronix's official Serial NOR page provides its product portfolio and OctaBus interface offerings.",
        "limit": "This source directly supports NOR; verify NAND parts separately and do not infer cell geometry from interfaces.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-macronix-nor"
        ],
        "target": "topic-nor",
        "search": "Macronix 官方 Serial NOR 目錄提供產品組合與 OctaBus 介面方案。 Macronix's official Serial NOR page provides its product portfolio and OctaBus interface offerings."
      },
      {
        "id": "industry-winbond-w25q",
        "name": "Winbond",
        "technology": "W25Q16JW Serial NOR",
        "family": "NOR / eFlash / SONOS",
        "role": "Code-storage memory supplier",
        "maturity": "Named product catalog",
        "claim": "The official catalog identifies W25Q16JW Serial NOR and associated ordering entries.",
        "limit": "Catalog presence does not guarantee stock; verify NAND families and other capacities separately.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-winbond-w25q"
        ],
        "target": "topic-nor",
        "search": "Winbond 原廠目錄提供 W25Q16JW 序列 NOR 及對應料號入口。 The official catalog identifies W25Q16JW Serial NOR and associated ordering entries."
      },
      {
        "id": "industry-samsung-vnand9",
        "name": "Samsung",
        "technology": "Ninth-Generation TLC V-NAND",
        "family": "NAND",
        "role": "NAND and storage supplier",
        "maturity": "Named generation in mass production",
        "claim": "Samsung announced mass production of 1Tb TLC ninth-generation V-NAND in April 2024.",
        "limit": "Evidence concerns this TLC generation; later demonstrations and projected QLC timing are separate.",
        "dateLabel": "Source date / event period: 2024-04-23 · Checked 2026-09-10",
        "sourceIds": [
          "industry-samsung-vnand9"
        ],
        "target": "topic-nand",
        "search": "Samsung 2024 年 4 月公告 1 Tb TLC 第九代 V-NAND 開始量產。 Samsung announced mass production of 1Tb TLC ninth-generation V-NAND in April 2024."
      },
      {
        "id": "industry-skhynix-321tlc",
        "name": "SK hynix",
        "technology": "321-Layer TLC 4D NAND",
        "family": "NAND",
        "role": "NAND and storage supplier",
        "maturity": "Named generation starts mass production",
        "claim": "SK hynix announced the start of 321-layer 1Tb TLC NAND mass production in November 2024.",
        "limit": "Separate production from customer delivery; do not assign this die to every Solidigm SSD.",
        "dateLabel": "Source date / event period: 2024-11-21 · Checked 2026-09-10",
        "sourceIds": [
          "industry-skhynix-321tlc"
        ],
        "target": "topic-nand",
        "search": "SK hynix 2024 年 11 月公告 321 層、1 Tb TLC NAND 開始量產。 SK hynix announced the start of 321-layer 1Tb TLC NAND mass production in November 2024."
      },
      {
        "id": "industry-solidigm-p5336",
        "name": "Solidigm",
        "technology": "D5-P5336 QLC SSD",
        "family": "NAND",
        "role": "Enterprise SSD supplier",
        "maturity": "Named commercial product",
        "claim": "The official D5-P5336 page identifies a commercial enterprise QLC SSD family and capacity options.",
        "limit": "SSD capacity and system metrics are not die specifications; corporate relationships do not establish common NAND.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-solidigm-p5336"
        ],
        "target": "topic-nand",
        "search": "Solidigm 官方 D5-P5336 產品頁提供 QLC 企業級 SSD 的產品與容量選項。 The official D5-P5336 page identifies a commercial enterprise QLC SSD family and capacity options."
      },
      {
        "id": "industry-micron-g9",
        "name": "Micron",
        "technology": "G9 TLC NAND",
        "family": "NAND",
        "role": "NAND and storage supplier",
        "maturity": "Volume production and named SSD shipments",
        "claim": "The July 2024 release reports G9 TLC NAND and volume shipment of the Micron 2650 SSD using it.",
        "limit": "Do not extend TLC evidence to every QLC or NOR product; interface speed is not cell programming speed.",
        "dateLabel": "Source date / event period: 2024-07-30 · Checked 2026-09-10",
        "sourceIds": [
          "industry-micron-g9"
        ],
        "target": "topic-nand",
        "search": "Micron 2024 年 7 月公告 G9 TLC NAND 及採用該世代的 Micron 2650 SSD 量產出貨。 The July 2024 release reports G9 TLC NAND and volume shipment of the Micron 2650 SSD using it."
      },
      {
        "id": "industry-kioxia-sandisk-gen10",
        "name": "Kioxia / Sandisk",
        "technology": "Tenth-Generation BiCS 3D NAND",
        "family": "NAND",
        "role": "Joint development and manufacturing partners",
        "maturity": "Production begins at a named fab",
        "claim": "The July 2026 joint announcement states that tenth-generation 3D Flash production began at Kitakami K2.",
        "limit": "Production start does not establish universal customer availability or identical finished products.",
        "dateLabel": "Source date / event period: 2026-07-03 · Checked 2026-09-10",
        "sourceIds": [
          "industry-kioxia-sandisk-gen10"
        ],
        "target": "topic-nand",
        "search": "Kioxia／Sandisk 2026 年 7 月共同公告北上 K2 開始第十代 3D Flash 生產。 The July 2026 joint announcement states that tenth-generation 3D Flash production began at Kitakami K2."
      },
      {
        "id": "industry-ymtc-xtacking",
        "name": "YMTC",
        "technology": "Xtacking 3D NAND",
        "family": "NAND",
        "role": "NAND technology and product supplier",
        "maturity": "Published architecture and named product family",
        "claim": "The official page explains separate peripheral/array wafers joined by bonding and names Xtacking 4.0 X4 products in 2025.",
        "limit": "Awards and architecture descriptions alone do not prove each product's volume, layer count or shipment status.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-ymtc-xtacking"
        ],
        "target": "topic-nand",
        "search": "YMTC 官方頁說明周邊與陣列分別製造再鍵合，並列 2025 年 Xtacking 4.0 的 X4 系列產品。 The official page explains separate peripheral/array wafers joined by bonding and names Xtacking 4.0 X4 products in 2025."
      },
      {
        "id": "industry-gigadevice-flash",
        "name": "GigaDevice",
        "technology": "GD25 / GD55 NOR",
        "family": "NOR / eFlash / SONOS",
        "role": "NOR/NAND product supplier",
        "maturity": "Official product portfolio",
        "claim": "The official portfolio lists GD25/GD55 NOR products.",
        "limit": "Family coverage does not replace part-specific production status, temperature, endurance or retention specifications.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-gigadevice-flash"
        ],
        "target": "topic-nor",
        "search": "GigaDevice 官方頁列出 GD25／GD55 SPI NOR 與 GD5F SPI／平行 NAND。 The official portfolio identifies GD25/GD55 SPI NOR and GD5F SPI/parallel NAND."
      },
      {
        "id": "industry-floadia-zt",
        "name": "Floadia",
        "technology": "LEE Flash ZT MTP",
        "family": "OTP / MTP",
        "role": "Technology and IP licensor",
        "maturity": "Named commercial IP",
        "claim": "The ZT page describes FN program/erase, zero added masks and named platform production records.",
        "limit": "General and platform-specific endurance figures differ; do not infer universal endurance or polysilicon count.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-floadia-zt"
        ],
        "target": "topic-mtp",
        "search": "Floadia ZT 官方頁說明 FN 寫抹、零新增光罩與具名平台量產紀錄。 The ZT page describes FN program/erase, zero added masks and named platform production records."
      },
      {
        "id": "ip-neobit",
        "name": "eMemory · NeoBit · Floating-Gate OTP",
        "technology": "OTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "Follow the series select transistor and p-type floating-gate storage transistor as electron injection changes read current. Then distinguish normal OTP operation from the physical possibility of ultraviolet erasure.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-neobit",
          "ip-neobit-pat"
        ],
        "target": "ip-neobit",
        "search": "eMemory · NeoBit · Floating-Gate OTP OTP"
      },
      {
        "id": "ip-neofuse",
        "name": "eMemory · NeoFuse · Antifuse OTP",
        "technology": "OTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "Start at the n-type cell's gate dielectric and follow high-field defect creation, changes in effective tunneling distance and the gate current used for sensing.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-neofuse",
          "ip-neofuse-dt"
        ],
        "target": "ip-neofuse",
        "search": "eMemory · NeoFuse · Antifuse OTP OTP"
      },
      {
        "id": "ip-kilopass-xpm",
        "name": "Kilopass; acquired by Synopsys in 2018 · Kilopass XPM",
        "technology": "OTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "The original patent explicitly names XPM and distinguishes the storage MOS from the select MOS.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-kilopass-xpm-2007",
          "ip-kilopass-2t-2012"
        ],
        "target": "ip-kilopass-xpm",
        "search": "Kilopass; acquired by Synopsys in 2018 · Kilopass XPM OTP"
      },
      {
        "id": "ip-sidense-1t-fuse",
        "name": "Sidense; acquired by Synopsys in 2017 · Sidense 1T-Fuse",
        "technology": "OTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "One gate spans thick and thin oxide; persistent conduction through the thin region creates the OTP state.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-sidense-cell-2007",
          "ip-sidense-irreversible-2017"
        ],
        "target": "ip-sidense-1t-fuse",
        "search": "Sidense; acquired by Synopsys in 2017 · Sidense 1T-Fuse OTP"
      },
      {
        "id": "ip-neoee",
        "name": "eMemory · NeoEE · FN/FN MTP",
        "technology": "MTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "Follow the control-coupling region, floating node and tunneling region as FN transport stores and removes electrons. A read transistor then senses the stored state.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-neoee",
          "ip-neoee-history"
        ],
        "target": "ip-neoee",
        "search": "eMemory · NeoEE · FN/FN MTP MTP"
      },
      {
        "id": "ip-neomtp",
        "name": "eMemory · NeoMTP · CHI/FN MTP",
        "technology": "MTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "Compare hot-carrier programming of the p-type floating-gate cell with FN electron transfer toward a dedicated erase gate. Both operations act on the same storage node.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ip-neomtp",
          "ip-neomtp-pat"
        ],
        "target": "ip-neomtp",
        "search": "eMemory · NeoMTP · CHI/FN MTP MTP"
      },
      {
        "id": "ip-ymc-mtp",
        "name": "Yield Microelectronics (YMC) · YMC · MTP and Mechanism Boundaries",
        "technology": "MTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "YMC publicly identifies a logic-process MTP family. The CHI/BBHH sequence below is an independent mechanism illustration, not evidence that a current ymtp product uses BBHH. Separate product capability from an illustrative 1T1C model.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "ymc-product",
          "ymc-1t1c"
        ],
        "target": "ip-ymc-mtp",
        "search": "Yield Microelectronics (YMC) · YMC · MTP and Mechanism Boundaries MTP"
      },
      {
        "id": "ip-impinj-aeon",
        "name": "Impinj → Virage Logic → Synopsys · AEON · FN/FN MTP",
        "technology": "MTP",
        "family": "OTP / MTP",
        "role": "Memory IP / technology lineage",
        "maturity": "Named IP study; qualification is process-specific",
        "claim": "Follow the named 2009 AEON company account: electrons enter and leave FG by FN, then a read MOS senses the state. Business and brand succession have a separate timeline.",
        "limit": "Historical cells and patents do not establish the structure of every current implementation.",
        "dateLabel": "Checked 2026-09-10",
        "sourceIds": [
          "aeon-impinj-2007",
          "aeon-virage-fn-2009"
        ],
        "target": "ip-impinj-aeon",
        "search": "Impinj → Virage Logic → Synopsys · AEON · FN/FN MTP MTP"
      },
      {
        "id": "sony-micron-reram",
        "name": "Sony / Micron",
        "technology": "Copper ReRAM",
        "family": "ReRAM / CBRAM",
        "role": "Joint device and memory R&D",
        "maturity": "Historical research demonstration",
        "claim": "Micron’s 2014 VLSI announcement identifies Sony collaboration on copper ReRAM for a 16Gb storage-class-memory demonstration.",
        "limit": "This does not establish current products or adoption in a Sony image sensor.",
        "dateLabel": "Source: 2014-06-05; checked 2026-09-10",
        "sourceIds": [
          "RES-SONY-MICRON-2014"
        ],
        "target": "topic-ecm",
        "search": "Sony Micron 索尼 銅 Copper ReRAM CBRAM"
      },
      {
        "id": "industry-gigadevice-nand",
        "name": "GigaDevice",
        "technology": "GD5F NAND",
        "family": "NAND",
        "role": "NOR/NAND product supplier",
        "maturity": "Official product portfolio",
        "claim": "The official portfolio separately lists GD5F NAND products.",
        "limit": "Family coverage does not replace part-specific production status, temperature, endurance or retention specifications.",
        "dateLabel": "Undated source; checked 2026-09-10",
        "sourceIds": [
          "industry-gigadevice-flash"
        ],
        "target": "topic-nand",
        "search": "GigaDevice 官方頁列出 GD25／GD55 SPI NOR 與 GD5F SPI／平行 NAND。 The official portfolio identifies GD25/GD55 SPI NOR and GD5F SPI/parallel NAND."
      },
      {
        "id": "kioxia-skhynix-crosspoint",
        "name": "Kioxia／SK hynix",
        "technology": "64 Gbit 1Selector–1MTJ Cross-Point MRAM",
        "family": "MRAM",
        "role": "Joint high-density MRAM research",
        "maturity": "IEDM 2024 research prototype; described publicly in 2025",
        "claim": "The jointly developed 64 Gbit cross-point MRAM replaces select transistors with two-terminal selectors; MTJ diameter is 20 nm, half-pitch 20.5 nm, and cell area 0.001681 µm².",
        "limit": "This is a research array, not evidence of product availability. The 20 nm figure is MTJ diameter, not a CMOS process node; typical-bit tests do not establish full-array yield.",
        "dateLabel": "Source date 2025-04-15",
        "sourceIds": [
          "MRAM-KIOXIA-SKHYNIX-64GB-2025"
        ],
        "target": "topic-stt",
        "search": "Kioxia／SK hynix 64 Gbit 1Selector–1MTJ Cross-Point MRAM Joint high-density MRAM research 高密度 MRAM 共同研究"
      },
      {
        "id": "tetramem-mlx200",
        "name": "TetraMem",
        "technology": "MLX200 Multi-Level RRAM Analog IMC",
        "family": "ReRAM / CBRAM",
        "role": "Multi-level RRAM analog in-memory computing developer",
        "maturity": "Tape-out and initial silicon validation completed",
        "claim": "In May 2026, TetraMem reported MLX200 tape-out and initial silicon validation on TSMC 22nm, integrating multi-level RRAM with mixed-signal computing in a SoC.",
        "limit": "Evaluation kits were scheduled for H2 2026 at announcement. Initial validation does not establish mass production or delivery, and computing results are not general-purpose storage specifications.",
        "dateLabel": "Source date 2026-05-19",
        "sourceIds": [
          "RRAM-TETRAMEM-MLX200-2026"
        ],
        "target": "topic-vcm",
        "search": "TetraMem MLX200 Multi-Level RRAM Analog IMC Multi-level RRAM analog in-memory computing developer 多階 RRAM 類比記憶體內運算開發商"
      },
      {
        "id": "intrinsic-surecore",
        "name": "Intrinsic／sureCore",
        "technology": "SiOx RRAM",
        "family": "ReRAM / CBRAM",
        "role": "Silicon-oxide RRAM and embedded-memory architecture collaboration",
        "maturity": "Technology development and commercialization collaboration",
        "claim": "Intrinsic identifies silicon-oxide RRAM as its core technology and lists a sureCore collaboration combining CMOS-compatible cells, memory architectures and compiler-design expertise.",
        "limit": "The collaboration does not establish qualification or mass production of a named process macro; the site does not provide a complete orderable part and datasheet proving current supply.",
        "dateLabel": "Undated source; reviewed 2026-09-10",
        "sourceIds": [
          "RRAM-INTRINSIC-SURECORE"
        ],
        "target": "topic-vcm",
        "search": "Intrinsic／sureCore SiOx RRAM Silicon-oxide RRAM and embedded-memory architecture collaboration 氧化矽 RRAM 與嵌入式記憶體架構合作"
      },
      {
        "id": "nantero-fujitsu-nram",
        "name": "Nantero／Fujitsu Semiconductor／Mie Fujitsu Semiconductor",
        "technology": "Carbon-Nanotube NRAM",
        "family": "NRAM",
        "role": "Historical carbon-nanotube NRAM licensing and joint development",
        "maturity": "2016 licensing and 55nm joint-development announcement",
        "claim": "Fujitsu's official archive confirms that its two semiconductor businesses licensed Nantero carbon-nanotube NRAM in 2016 and began joint development toward a 55nm product.",
        "limit": "This historical development evidence establishes neither 2026 production and availability nor program termination; NRAM should be classified separately from oxide RRAM.",
        "dateLabel": "Source date 2016-08-31",
        "sourceIds": [
          "NRAM-NANTERO-FUJITSU-2016"
        ],
        "target": "research",
        "search": "Nantero／Fujitsu Semiconductor／Mie Fujitsu Semiconductor Carbon-Nanotube NRAM Historical carbon-nanotube NRAM licensing and joint development 碳奈米管 NRAM 歷史授權與共同開發"
      },
      {
        "id": "pufsecurity-hrot",
        "name": "PUFsecurity",
        "technology": "NeoPUF + AntiFuse HRoT (PUFcc / PUFiot / PUFker)",
        "family": "OTP / MTP",
        "role": "Hardware Root of Trust & Security IP Provider",
        "maturity": "Commercial Production; Qualified on TSMC / UMC nodes (5nm–55nm)",
        "claim": "Leverages zero-mask NeoPUF and AntiFuse OTP to convert microscopic gate-oxide quantum tunneling variations into chip-unique fingerprints; integrates NIST SP 800-90B TRNG, secure key storage, and crypto accelerators (AES/ECC/RSA) for end-to-end hardware root-of-trust and secure boot.",
        "limit": "Relies on standard logic CMOS tunneling physics; zero physical charge storage prevents static TEM/SEM key extraction, but peripheral digital controllers still require layered DPA counter-measures and active metal mesh.",
        "dateLabel": "2025–2026 Official Whitepaper & Production Qualification",
        "search": "PUFsecurity NeoPUF PUFcc PUFiot PUFker AntiFuse HRoT Root of Trust TSMC UMC",
        "sourceIds": [
          "RES-PUFSEC-HROT-2025",
          "ip-neofuse"
        ],
        "target": "ip-neofuse"
      },
      {
        "id": "tower-yflash",
        "name": "Tower Semiconductor",
        "technology": "Y-Flash 0-Mask eFlash / MTP",
        "family": "NOR / eFlash / SONOS",
        "role": "Specialty Analog & High-Voltage BCD Foundry",
        "maturity": "0.18µm and 65nm BCD platforms are public; vendor briefs mention Grade 0 retention narratives, but ambient Ta and junction Tj test conditions must be cited separately — do not equate 175°C with blanket certification.",
        "claim": "Single-poly floating gate; per Tower's public NVM brief and arXiv:2202.10228, program uses channel hot-electron injection (CHE) and erase uses band-to-band-tunneling (BBT) holes — not FN/FN. Zero mask adders integrate with Tower HV BCD/power platforms; public briefs cite 1K–10K endurance and high-temperature retention; name Ta, Tj, and AEC-Q100 qualification per product.",
        "limit": "Single-poly footprint yields larger cell size, targeting 1Kb–512Kb high-voltage PMIC trim, battery management (BMS), and gate drivers rather than high-density code storage.",
        "dateLabel": "2024–2026 Volume Production Specification",
        "search": "Tower Semiconductor Y-Flash eFlash MTP BCD 0-Mask 175C Grade 0 PMIC",
        "sourceIds": [
          "RES-TOWER-YFLASH-2024"
        ],
        "target": "foundry"
      },
      {
        "id": "weebit-reram-cim",
        "name": "Weebit Nano",
        "technology": "Embedded ReRAM (OxRAM) & analog CIM research",
        "family": "ReRAM / OxRAM",
        "role": "Independent embedded ReRAM IP and neuromorphic AI inference provider",
        "maturity": "DB HiTek 130nm qualified IP; SkyWater 130nm and GF 22FDX are platform/evaluation stages — customer production needs named evidence.",
        "claim": "Public OxRAM route centers on SiOx active layers (e.g., IMW 2019 samples with TiN bottom / Ti top electrodes). DB HiTek 130nm offers a qualified IP macro (2 masks, 10K cycles, 125°C retention under named conditions). SkyWater 130nm and GF 22FDX are distinct platform stages; analog CIM studies and customer production must not be merged into one spec sheet.",
        "limit": "Commercial production focused on 130nm mature and specialty BCD nodes; advanced FD-SOI nodes (22nm) undergoing silicon tapeout; analog CIM subject to thermal drift requiring digital calibration.",
        "dateLabel": "2024–2026 foundry qualification & whitepaper",
        "search": "Weebit Nano Embedded ReRAM OxRAM CIM Neuromorphic SkyWater DB HiTek GF 22FDX Analog Computing-in-Memory",
        "sourceIds": [
          "RES-WEEBIT-RERAM-2025"
        ],
        "target": "topic-vcm"
      },
      {
        "id": "everspin-plp-sttmram",
        "name": "Everspin Technologies (Enterprise PLP)",
        "technology": "Enterprise STT-MRAM & Data Center Power Loss Protection (PLP)",
        "family": "MRAM",
        "role": "Discrete & embedded MRAM silicon and IP supplier",
        "maturity": "Volume production; foundry manufacturing at GlobalFoundries (22FDX / 12LP) and TSMC",
        "claim": "Utilizes perpendicular MTJ (pMTJ) with DDR4, DDR3, and xSPI interfaces for nanosecond persistent write and 10^10~10^12 endurance; replaces fragile supercapacitors in enterprise NVMe SSDs and AI accelerators for zero-latency journaling and capacitor-free PLP.",
        "limit": "Higher per-bit cost than DRAM and NAND; optimized as persistent cache and write-buffer rather than primary mass storage.",
        "dateLabel": "2024–2026 production specification",
        "search": "Everspin Technologies STT-MRAM Enterprise NVMe SSD PLP Power Loss Protection CXL Data Center Write Buffer",
        "sourceIds": [
          "RES-EVERSPIN-PLP-2025",
          "everspin-1gb-ddr"
        ],
        "target": "research-everspin"
      },
      {
        "id": "intrinsicid-quiddikey-srampuf",
        "name": "Intrinsic ID (Quiddikey)",
        "technology": "SRAM PUF Root of Trust & Key Provisioning-Free Enclave",
        "family": "PUF",
        "role": "Physical Unclonable Function (PUF) & Security IP Provider",
        "maturity": "Over 500 million devices deployed globally; supports TSMC, UMC, GF, Intel, and Samsung advanced & mature nodes",
        "claim": "Leverages native 6T SRAM power-up mismatch as a hardware fingerprint; reconstructs 256-bit root keys dynamically via Fuzzy Extractor and public Activation Code; eliminates factory key provisioning costs and leak risks.",
        "limit": "Requires volatile SRAM reconstruction at boot; working keys require runtime DPA masking and single-cycle zeroization.",
        "dateLabel": "2024–2026 Commercial Manual",
        "search": "Intrinsic ID Quiddikey SRAM PUF Activation Code Helper Data Fuzzy Extractor Zero Provisioning Hardware Root of Trust",
        "sourceIds": [
          "RES-INTRINSICID-QUIDDIKEY-2025"
        ],
        "target": "research"
      },
      {
        "id": "synopsys-troot-hsm",
        "name": "Synopsys (DesignWare tRoot™ HSM)",
        "technology": "Hardware Secure Module & AntiFuse Integrated Enclave",
        "family": "AntiFuse",
        "role": "Silicon Security Subsystem & Physical IP Provider",
        "maturity": "Widely deployed narrative; Synopsys public pages list the Automotive HSM as ASIL-B and OTP NVM separately as ASIL-D — do not merge into one “tRoot ASIL-D” or CC/PSA bundle certification.",
        "claim": "HSM subsystem integrating a security processor with AntiFuse OTP; public features include secure boot, key wrapping, and rollback interfaces — named crypto modes, timing, and PSA/CC bundles require product documentation; do not port portfolio peak tiers.",
        "limit": "Subsystem-level IP requiring dedicated silicon area, memory protection units, and secure debug infrastructure.",
        "dateLabel": "2024–2026 Product Manual",
        "search": "Synopsys tRoot HSM Hardware Secure Module 1T AntiFuse Secure Boot PSA Certified Level 3 Security Subsystem",
        "sourceIds": [
          "RES-SYNOPSYS-TROOT-2024"
        ],
        "target": "ip-sidense-1t-fuse"
      },
      {
        "id": "rambus-cryptomanager-spdm",
        "name": "Rambus (CryptoManager™ Root of Trust)",
        "technology": "PCIe/CXL SPDM Attestation & Silicon Lifecycle Root of Trust",
        "family": "OTP",
        "role": "High-Speed Interconnect Security & Silicon Lifecycle Key Provisioning Leader",
        "maturity": "Standard adoption in data center AI accelerators (GPU/NPU), CXL expanders, and server SoCs",
        "claim": "Implements DMTF SPDM 1.2/1.3 device attestation and line-rate PCIe/CXL IDE encryption; anchors silicon identity in foundry AntiFuse OTP across Foundry, OSAT, and CSP data centers.",
        "limit": "Engineered for enterprise servers and data centers; rarely adopted in ultra-constrained consumer edge devices.",
        "dateLabel": "2024–2026 Product Manual",
        "search": "Rambus CryptoManager SPDM PCIe CXL IDE Root of Trust Hardware Attestation Silicon Lifecycle",
        "sourceIds": [
          "RES-RAMBUS-CRYPTOMANAGER-2025"
        ],
        "target": "research"
      }
    ]
  },
  "sources": [
    {
      "id": "INTRO-COURSE",
      "label": "Shimeng Yu: Lecture Six, Emerging NVM, Part One",
      "url": "https://www.youtube.com/watch?v=_Ov2KUZTIv8",
      "kind": "University Course",
      "locator": "2021 course; comparison table at approximately 36:05–43:49, SCM at approximately 50:08, and arrays at approximately 1:00:04",
      "date": "2021; accessed 2026-09-10",
      "limit": "This page independently organizes the material and redraws the operating principles; it does not reproduce the complete lecture deck. Automatic captions cannot replace the original technical material."
    },
    {
      "id": "INTRO-2016",
      "label": "Yu and Chen: Emerging Memory Technologies—Recent Trends and Prospects",
      "url": "https://asu.elsevierpure.com/en/publications/emerging-memory-technologies-recent-trends-and-prospects",
      "kind": "Peer-Reviewed Review",
      "locator": "IEEE Solid-State Circuits Magazine 8(2), 43–56; DOI 10.1109/MSSC.2016.2546199",
      "date": "2016",
      "limit": "A historical comparison baseline. Additions to the 2021 course and commercial status in 2026 are identified separately."
    },
    {
      "id": "INTRO-IRDS",
      "label": "IEEE 2024 IRDS: Beyond CMOS and Emerging Research Materials",
      "url": "https://irds.ieee.org/images/files/pdf/2024/2024IRDS_BC.pdf",
      "kind": "Technology Roadmap Assessment",
      "locator": "Sections 2 and 2.5",
      "date": "2024",
      "limit": "Technology assessments and targets do not establish volume production of named products or a ranking under common measurement conditions."
    },
    {
      "id": "ch-pat-efuse-poly",
      "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
      "url": "https://patents.google.com/patent/US7417300B2/en",
      "kind": "Patent",
      "date": "Granted 2008-08-26; reviewed 2026-09-10",
      "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
      "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
    },
    {
      "id": "ch-pat-efuse-via",
      "label": "TSMC: Metal Via Fuse Patent US8847350B2",
      "url": "https://patents.google.com/patent/US8847350B2/en",
      "kind": "Patent",
      "date": "Granted 2014-09-30; reviewed 2026-09-10",
      "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
      "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
    },
    {
      "id": "ch-pat-antifuse",
      "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
      "url": "https://patents.google.com/patent/US6667902B2/en",
      "kind": "Patent",
      "date": "Granted 2003-12-23; reviewed 2026-09-10",
      "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
      "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
    },
    {
      "id": "ch-pat-kilopass-vpp-tox",
      "label": "Kilopass: Gate-Oxide Thickness Sets Program Voltage US6940751",
      "url": "https://patents.google.com/patent/US6940751B2/en",
      "kind": "Patent",
      "date": "Granted 2005-09-06; reviewed 2026-09-13",
      "locator": "Specification: VPP approximately 8–9 V for a 32 Å gate oxide, 5–6 V for 20 Å; voltages vary by process and application.",
      "limit": "The thickness–voltage pairing is a teaching example in this patent, not a current XPM macro datasheet and not a fixed specification for one lithography node."
    },
    {
      "id": "ch-ememory-neofuse-9v-2016",
      "label": "eMemory named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
      "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
      "kind": "Vendor news",
      "date": "2016-01-14; reviewed 2026-09-11",
      "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming; 1.0 V read",
      "limit": "Supports 9 V program stress in that named 0.18 µm 1.8 V/13.5 V source-driver example. It is not a node-independent breakdown voltage and not floating-gate HCI."
    },
    {
      "id": "ch-pat-pmos-otp-6678190",
      "label": "eMemory: Series-PMOS Single-Poly Embedded EPROM Patent US6678190B2",
      "url": "https://patents.google.com/patent/US6678190B2/en",
      "kind": "Patent",
      "date": "Granted 2004-01-13; reviewed 2026-09-11",
      "locator": "Figures 5, 9 and 10 and the write-“1” bias text: VSL/VNW 3–8 V; gate-current peak near drain −5 to −6 V and gate about −1 V",
      "limit": "Embodiment biases belong to this PMOS, no-control-gate cell. They must not be rewritten as a 3.3 V/5 V to 6.5 V/7.5 V rule, nor moved onto gate-oxide-breakdown AntiFuse."
    },
    {
      "id": "ch-pat-io-nvm-6920067",
      "label": "eMemory: I/O-Device Single-Poly NVM Patent US6920067B2",
      "url": "https://patents.google.com/patent/US6920067B2/en",
      "kind": "Patent",
      "date": "Granted 2005-07-19; reviewed 2026-09-11",
      "locator": "Specification: I/O devices such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V, with another mode preferably 6 V",
      "limit": "Supports p-type cells (and an NMOS claim variant) built to I/O device rules. It does not state that a 5 V I/O cell must program at 7.5 V."
    },
    {
      "id": "ch-eetimes-neobit-2003",
      "label": "EE Times: Hsu on 0.35 µm NeoBit program at 6–6.5 V",
      "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
      "kind": "Contemporary industry report",
      "date": "2003-11-05; reviewed 2026-09-11",
      "locator": "Charles Hsu quoted: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
      "limit": "Supports a 0.35 µm-generation public voltage comparison. It is not 180 nm core-GOX breakdown."
    },
    {
      "id": "ch-author-pmos-io-pgm",
      "label": "Public literature / architecture-class: I/O PMOS floating-gate OTP program voltages",
      "url": "https://patents.google.com/patent/US6920067B2/en",
      "kind": "Architecture-class reference",
      "date": "reviewed 2026-09-11",
      "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V PGM for a 5 V I/O PMOS cell; an NMOS floating-gate cell at the same node needs a higher Vpgm",
      "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move these figures onto gate-oxide-breakdown AntiFuse, and do not treat them as the measurement table of every current NeoBit macro."
    },
    {
      "id": "ch-pat-pmos-vs-nmos-5761121",
      "label": "Ohsaki et al.: PMOS Single-Poly NVM Patent US5761121A",
      "url": "https://patents.google.com/patent/US5761121A/en",
      "kind": "Patent",
      "date": "Granted 1998-06-02; reviewed 2026-09-11",
      "locator": "Background: conventional n-channel single-poly program/erase may be as high as about 20 V; this p-channel example about 8.5 V, with about 7.5 V coupled onto the floating gate",
      "limit": "This cell has control-gate coupling and is not NeoBit. The 8.5 V / 7.5 V / 20 V figures must not be rewritten as a NeoBit 3.3 V / 5 V I/O table."
    },
    {
      "id": "ch-pat-eeprom-window",
      "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
      "url": "https://patents.google.com/patent/US4115914A/en",
      "kind": "Patent",
      "date": "Granted 1978-09-26; reviewed 2026-09-10",
      "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
      "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
    },
    {
      "id": "ch-pat-eeprom-singlepoly",
      "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
      "url": "https://patents.google.com/patent/US5844271A/en",
      "kind": "Patent",
      "date": "Granted 1998-12-01; reviewed 2026-09-10",
      "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
      "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
    },
    {
      "id": "ch-pat-nor-splitgate",
      "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
      "url": "https://patents.google.com/patent/US6232180B1/en",
      "kind": "Patent",
      "date": "Granted 2001-05-15; reviewed 2026-09-10",
      "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
      "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
    },
    {
      "id": "ch-pat-sonos",
      "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
      "url": "https://patents.google.com/patent/WO1981000790A1/en",
      "kind": "Patent",
      "date": "Published 1981-03-19; reviewed 2026-09-10",
      "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
      "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
    },
    {
      "id": "ch-pat-nrom",
      "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
      "url": "https://patents.google.com/patent/US5768192A/en",
      "kind": "Patent",
      "date": "Granted 1998-06-16; reviewed 2026-09-10",
      "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
      "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
    },
    {
      "id": "ch-pat-nand-vertical",
      "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
      "url": "https://patents.google.com/patent/US7696559B2/en",
      "kind": "Patent",
      "date": "Granted 2010-04-13; reviewed 2026-09-10",
      "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
      "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
    },
    {
      "id": "ch-product-mtp",
      "label": "Synopsys: MTP EEPROM NVM IP for Analog and Mixed-Signal Processes",
      "url": "https://www.synopsys.com/resources/mtp-eeprom-nvm-ip-for-analog-and-mixed-signal-process-nodes-datasheet.html",
      "kind": "Manufacturer Product Introduction",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Public introduction and learning points: floating gate, logic process, electrical erase, and hard macro",
      "limit": "Only the public introduction was reviewed; the detailed datasheet behind the registration form was not obtained. The product positioning and broad physical mechanism are confirmed. Undisclosed capacities, paired endurance/retention conditions, film stacks, and carrier paths are not inferred."
    },
    {
      "id": "ch-product-sonos",
      "label": "Infineon: SONOS Embedded Flash IP Solutions",
      "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
      "kind": "Manufacturer Technology and Volume-Production Statement",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
      "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
    },
    {
      "id": "ch-tech-superflash",
      "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
      "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
      "kind": "Manufacturer Technical Brochure",
      "date": "2018-03; reviewed 2026-09-10",
      "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
      "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
    },
    {
      "id": "ch-tech-nand",
      "label": "Kioxia: NAND Flash Memory Fundamentals",
      "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
      "kind": "Manufacturer Fundamentals Explanation",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
      "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
    },
    {
      "id": "ch-tech-multilevel",
      "label": "Kioxia: Increasing Flash Capacity with Multilevel Cells",
      "url": "https://www.kioxia.com/en-jp/rd/technology/multi-level-cell.html",
      "kind": "Manufacturer Fundamentals Explanation",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Figure 5 and adjacent text; bits per cell, threshold-voltage states, and speed/lifetime tradeoffs",
      "limit": "Supports the requirement for 2 to the Nth power distinguishable states to store N bits and the qualitative tradeoffs. It does not provide universal endurance or speed ratios between TLC/QLC generations."
    },
    {
      "id": "ch-tech-retention",
      "label": "Kioxia: Data Retention in the Managed Flash Endurance and Reliability Series",
      "url": "https://americas.kioxia.com/content/dam/kioxia/en-us/business/memory/mlc-nand/asset/KIOXIA_NAND_Flash_Data_Retention_Technical_Brief.pdf",
      "kind": "Manufacturer Technical Brief",
      "date": "2024-03; reviewed 2026-09-10",
      "locator": "Pages 1–2; P/E cycling, temperature, and data retention",
      "limit": "Supports evaluating NAND reliability under combined conditions. NAND values must not be transferred directly to EEPROM, SONOS, or OTP specifications."
    },
    {
      "id": "ch-tech-ecc",
      "label": "Kioxia: NAND Error-Correction Code Technical Brief",
      "url": "https://www.kioxia.com/content/dam/kioxia/shared/business/memory/mlc-nand/asset/productbrief/KIOXIA_Understanding_ECC_Tech_Brief.pdf",
      "kind": "Manufacturer Technical Brief",
      "date": "2022-05; reviewed 2026-09-10",
      "locator": "Page 1; raw NAND, managed NAND, and the role of ECC",
      "limit": "Supports including error management in system comparisons. It does not supply a universal ECC strength, decoding latency, or spare-capacity ratio that can be applied directly throughout this material."
    },
    {
      "id": "ch-tech-deepetch",
      "label": "Kioxia: Improving Memory-Hole Process Productivity with a New Etch Gas",
      "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-62.html",
      "kind": "Manufacturer Process Research",
      "date": "2024-02-22; reviewed 2026-09-10",
      "locator": "Sections on memory-hole profile, etch rate, and high-aspect-ratio processing",
      "limit": "Describes a specific deep-hole etching study and process bottlenecks. Its improvement figures are not extrapolated to all equipment, stack heights, or production costs."
    },
    {
      "id": "ch-paper-3dvariation",
      "label": "Y. Luo et al.: Early Retention Loss and Process Variation in 3D NAND",
      "url": "https://arxiv.org/abs/1807.05140",
      "kind": "Abstract of Original Chip-Measurement Research",
      "date": "2018; reviewed 2026-09-10",
      "locator": "Abstract: layer-to-layer process variation, early retention loss, and retention interference",
      "limit": "Only the abstract was reviewed to identify research questions. Unreviewed methods, sample counts, and quantitative improvements are not reused, and the distributions are not assumed to apply to all modern 3D NAND."
    },
    {
      "id": "ch-paper-readdisturb",
      "label": "Y. Cai et al.: Read-Disturb Errors in MLC NAND Flash",
      "url": "https://arxiv.org/abs/1805.03283",
      "kind": "Abstract of Original Chip-Measurement Research",
      "date": "Research account published 2018-05-08; corresponding DSN 2015 work; reviewed 2026-09-10",
      "locator": "Abstract: relationships among pass bias, accumulated cycling, and read disturb",
      "limit": "Only qualitative relationships are supported by the reviewed abstract. Unreviewed quantitative results are not reused, and 2Y nm MLC samples are not treated as equivalent to modern 3D QLC."
    },
    {
      "id": "ch-maturity-ibm-efuse",
      "label": "IBM: eFUSE from Memory Redundancy to Autonomic Chips",
      "url": "https://research.ibm.com/publications/electrically-programmable-fuse-efuse-from-memory-redundancy-to-autonomic-chips",
      "kind": "Manufacturer Research Abstract",
      "date": "2007-09-16; reviewed 2026-09-10",
      "locator": "CICC 2007 abstract; IBM implementations and applications from 180 nm to 45 nm",
      "limit": "Establishes historical implementations at an identified company across an identified process range. The abstract does not enumerate product models, shipment volumes, or current platform qualifications; 32 nm and beyond were prospective at the time."
    },
    {
      "id": "ch-maturity-kilopass",
      "label": "Synopsys: 2018 Kilopass Acquisition and OTP Shipment Statement",
      "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
      "kind": "Manufacturer Historical Product and Shipment Statement",
      "date": "2018-01-10; reviewed 2026-09-10",
      "locator": "Highlights and product sections; antifuse 1T/2T, XPM, Gusto, SecretCode, and cumulative shipments",
      "limit": "More than 170 customers, 400 SoC designs, and 10 billion units were manufacturer statements in 2018, not an independent shipment audit conducted for this material. Portfolio-wide figures are not assigned to an individual model or node."
    },
    {
      "id": "ch-maturity-otp-current",
      "label": "Synopsys: Current Antifuse OTP NVM IP Product Page",
      "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
      "kind": "Manufacturer Product and Validation Statement",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Overview; process availability; TSMC advanced-node silicon validation and N5A/N7A automotive qualification",
      "limit": "Availability, silicon validation, automotive qualification, and volume-production shipments are different evidence levels. N5A/N7A AEC-Q100 Grade 1 qualifications are not extended to every node, nor are the claims restated as an unbreakable security guarantee."
    },
    {
      "id": "ch-maturity-nor-product",
      "label": "Microchip: SST39SF020A Parallel Flash Product Page",
      "url": "https://www.microchip.com/en-us/product/SST39SF020A",
      "kind": "Manufacturer Status for an Identified Product",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Model, product status, and 2 Mb / 4.5–5.5 V parallel flash summary",
      "limit": "Listed as in production when reviewed. The 4.5–5.5 V range is this product's supply range, not an interface voltage for all NOR and certainly not the cell's tunneling bias."
    },
    {
      "id": "ch-maturity-bics",
      "label": "Kioxia: BiCS FLASH Principles and Commercial Generations",
      "url": "https://www.kioxia.com/en-jp/rd/technology/bics-flash.html",
      "kind": "Manufacturer Fundamentals and Commercial History",
      "date": "Page includes technical descriptions through 2023; reviewed 2026-09-10",
      "locator": "Commercial-generation section; stacked electrodes, memory holes, and charge-storage film in Figures 4–5",
      "limit": "48 layers / 2015, 96 layers / 2018, 112 layers / 2020, and 162 layers / 2022 are the manufacturer's listed commercial history. This page is not treated as the latest 2026 layer-count ranking or a complete specification for each generation."
    },
    {
      "id": "ch-mtp-standalone-microchip",
      "label": "Microchip: 24AA256/24LC256/24FC256 Standalone Serial EEPROM Datasheet",
      "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/24AA256-24LC256-24FC256-256K-I2C-Serial-EEPROM-DS20001203.pdf",
      "kind": "Manufacturer Datasheet",
      "date": "2022 revision; reviewed 2026-09-10",
      "locator": "DS20001203Y pages 1–2: product, packages, and block diagram; Section 6: byte/page writes; Section 8: reads",
      "limit": "Establishes a standalone device, I2C interface, 64-byte page buffer, and internal erase/write control. The datasheet does not disclose the bitcell cross-section or polysilicon layer count; a teaching patent is not evidence of this product's implementation."
    },
    {
      "id": "ch-mtp-synopsys",
      "label": "Synopsys: Single-Poly Floating-Gate MTP EEPROM IP",
      "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-eeprom.html",
      "kind": "Manufacturer Product Page",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Product overview paragraphs 1–2; first Highlights item; integrated high-voltage circuitry description",
      "limit": "Confirms single-poly floating-gate storage and zero added masks for this product family. Control-terminal cross-sections and carrier paths are not disclosed. Family maxima and qualifications for selected nodes cannot be combined into a guarantee for every macro."
    },
    {
      "id": "ch-mtp-xfab-xc06",
      "label": "X-FAB: Historical XC06 Double-Poly Embedded EEPROM Process Brief",
      "url": "https://www.fbe-asic.com/documents/is-xc06.pdf",
      "kind": "Manufacturer-Authored Process Document",
      "date": "Rev 09/2003; reviewed 2026-09-10",
      "locator": "Page 1 Main Process Features: Flash/EEPROM tunnel oxide and double-poly stack; page 2 EEPROM macros; revision footer",
      "limit": "A 2003 X-FAB-authored document publicly hosted by FBE ASIC. Used only as a historical foundry example. Current availability, the complete EEPROM cross-section, and carrier paths are not established. Base-CMOS single-poly specifications cannot substitute for the NVM-option stack."
    },
    {
      "id": "ch-mtp-ymc-product",
      "label": "Yield Microelectronics: Logic-Process Embedded MTP IP",
      "url": "https://www.ymc.com.tw/index_en.php",
      "kind": "Manufacturer Company and Product Introduction",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "About YMC paragraph: ymtp core technology, logic-process-based MTP eNVM, and licensing customers",
      "limit": "Confirms YMC's MTP IP business and customer types. This paragraph does not disclose the polysilicon count, bitcell, or program/erase mechanism of every product."
    },
    {
      "id": "ch-mtp-ymc-singlepoly",
      "label": "Yield Microelectronics: Single-Floating-Gate NVM Patent US7423903B2",
      "url": "https://patents.google.com/patent/US7423903B2/en",
      "kind": "Patent",
      "date": "Granted 2008-09-09; reviewed 2026-09-10",
      "locator": "Figures 1, 2A, and 2B; fabrication paragraphs describing one polysilicon deposition and patterning; original-assignee field",
      "limit": "Establishes a disclosed YMC single-poly implementation connecting transistor and capacitor gates into one floating node. It does not identify the cell of every current ymtp product; bias conditions and transfer directions must be read separately for each embodiment."
    },
    {
      "id": "ch-mtp-ememory-neoee",
      "label": "eMemory: NeoEE Single-Poly Embedded EEPROM",
      "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
      "kind": "Manufacturer Technical Product Page",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Opening single-poly description; Technical Principles: capacitive-coupling MOS devices, selectors, and FN charge transfer in both directions",
      "limit": "Confirms the identified single-poly floating-gate technology and FN program/erase principles. Complete terminal biases, cross-section dimensions, and paired reliability ratings for a target macro were not obtained."
    },
    {
      "id": "ch-mtp-ememory-neomtp",
      "label": "eMemory: NeoMTP Single-Poly p-Type Floating-Gate Principles",
      "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
      "kind": "Manufacturer Technical Product Page",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Opening single-poly and additional-erase-gate descriptions; Technical Principles: p-type FG-MOSFET, CHEI, and FN erase destination",
      "limit": "The manufacturer describes channel-hot-hole-induced hot-electron injection and FN electron transfer from floating gate to erase gate. Do not substitute an n-channel/source-erase cross-section or extend this mechanism to NeoEE or other vendors' MTP."
    },
    {
      "id": "ch-mtp-floadia-zt",
      "label": "Floadia: LEE Flash ZT Zero-Added-Mask MTP",
      "url": "https://floadia.com/product/lee-flash-zt/",
      "kind": "Manufacturer Product Page",
      "date": "No publication date stated; reviewed 2026-09-10",
      "locator": "Product Info; Major Features items 4–5; FN program/erase paragraph",
      "limit": "Confirms MTP, standard CMOS, zero added masks, and FN programming/erase. This page does not explicitly state the polysilicon count. Cycle figures differ across page sections and are not adopted as a common guarantee."
    },
    {
      "id": "ch-mtp-floadia-zt-fg",
      "label": "Floadia and Maxchip: Public Floating-Gate LEE Flash ZT MTP Integration",
      "url": "https://floadia.com/news/422/",
      "kind": "Manufacturer Announcement",
      "date": "2016-05-20; reviewed 2026-09-10",
      "locator": "2016-05-20 title and announcement; paragraph identifying floating-gate storage and FN program/erase",
      "limit": "An identified historical integration on Maxchip 0.18 um BCD supports floating-gate storage and FN program/erase. The polysilicon count is not stated and cannot be inferred from zero added masks. These generation-specific ratings do not apply to all current ZT products."
    },
    {
      "id": "EMG-SEC",
      "label": "Everspin 2025 Product and Manufacturing Filing",
      "url": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/mram-20251231.htm",
      "kind": "Company Regulatory Filing",
      "locator": "2025 product overview and manufacturing sections; the SEC index confirms a filing date of 2026-03-04 and an acceptance time of 17:20:43",
      "date": "2026-03-04",
      "limit": "Production and shipment claims apply to named products; specifications for one product must not be applied to the entire MRAM family.",
      "accessedAt": "2026-09-10",
      "verificationUrl": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/0001628280-26-014733-index.html"
    },
    {
      "id": "EMG-XSPI",
      "label": "Everspin 64Mb High-Reliability xSPI Production Qualification",
      "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
      "kind": "Manufacturer Announcement",
      "locator": "64Mb qualification, ordering availability, and distributor inventory; schedules for other densities",
      "date": "2026-03-05",
      "limit": "The announcement describes 128Mb/256Mb qualification as planned. A passed target date does not establish completion.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-RA8",
      "label": "Renesas RA8M2/RA8D2 MCUs with Embedded MRAM",
      "url": "https://www.renesas.com/en/about/newsroom/renesas-adds-two-new-mcu-groups-blazing-fast-ra8-series-1ghz-performance-and-embedded-mram",
      "kind": "Manufacturer Product Announcement",
      "locator": "Sections on 1MB MRAM, 22nm ULL, and availability",
      "date": "2025-10-22",
      "limit": "1GHz is the CPU clock frequency, not the MTJ write frequency. External Flash options are excluded from MRAM capacity.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-DBH",
      "label": "Weebit/DB HiTek Technology Qualification and Product Adoption",
      "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-signs-largest-customer-to-date-technology-qualified-at-db-hitek/",
      "kind": "Manufacturer Quarterly Update",
      "locator": "DB HiTek 130nm BCD qualification and customer tape-out progress",
      "date": "2026-01-30",
      "limit": "Technology qualification, licensing revenue, and volume shipments of customer products are distinct milestones.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-S130",
      "label": "Weebit SkyWater S130 Reliability Validation",
      "url": "https://www.weebit-nano.com/wp-content/uploads/2025/11/251124.-2025-Annual-General-Meeting-%E2%80%93-Chair-Address-and-CEO-Presentation.pdf",
      "kind": "Manufacturer Technical Presentation",
      "locator": "Page 18; S130/1T1R test vehicle and reliability conditions",
      "date": "2025-11-24",
      "limit": "The 150°C and cycling data apply to this test vehicle and must not be transferred to other foundries, nodes, or capacities.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-STPCM",
      "label": "ST Stellar SR6P6C8 MCU with Phase-Change Memory",
      "url": "https://www.st.com/en/automotive-microcontrollers/sr6p6c8.html",
      "kind": "Manufacturer Product Page",
      "locator": "Production status label, PCM description, and ordering-code quality table",
      "date": "2026-09-10",
      "limit": "The date is the verification date. Other devices in the same family may still be in design or engineering-sample stages.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-FRAM",
      "label": "Infineon 16Mb EXCELON F-RAM Datasheet",
      "url": "https://www.infineon.com/assets/row/public/documents/10/49/infineon-cy15b116qi-cy15v116qi-16mb-excelon-tm-lp-ferroelectric-ram-f-ram-datasheet-en.pdf",
      "kind": "Manufacturer Datasheet",
      "locator": "Rev. C; pages 1, 7, 27, and 30–31",
      "date": "2022-05-25",
      "limit": "Commercial operating temperature, retention temperature, and SPI clock frequency must be distinguished. Commercial F-RAM endurance must not be attributed to FeFET/FTJ.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-ADESTO",
      "label": "Adesto 2019 CBRAM Commercial Shipment Filing",
      "url": "https://www.sec.gov/Archives/edgar/data/1395848/000155837020002795/iots-20191231x10k.htm",
      "kind": "Company Regulatory Filing",
      "locator": "CBRAM product and commercial shipment sections",
      "date": "2020",
      "limit": "Evidence of historical shipments; continued availability of the original part numbers in 2026 has not been verified.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-SOT23",
      "label": "imec Extremely Scaled SOT-MRAM Device Demonstration",
      "url": "https://www.imec-int.com/en/press/imecs-extremely-scaled-sot-mram-devices-show-record-low-switching-energy-and-virtually",
      "kind": "Research Institution Announcement",
      "locator": "Experiments on 300mm wafers and approximately 50nm devices",
      "date": "2023-12-13",
      "limit": "The summary does not provide the complete pulse, temperature, sample, and error-rate matrix. Device energy is not memory-macro energy.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-SOT24",
      "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
      "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
      "kind": "Research institute technical article",
      "date": "2024-12-16",
      "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
      "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
    },
    {
      "id": "EMG-KIOXIA",
      "label": "KIOXIA: FeFET Trapping and Polarization Stability",
      "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
      "kind": "Manufacturer original research description",
      "date": "2024-04-09",
      "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
      "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
    },
    {
      "id": "EMG-FTJ24",
      "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
      "url": "https://www.nature.com/articles/s41467-024-44927-7",
      "kind": "Original research paper",
      "date": "2024",
      "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
      "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
    },
    {
      "id": "EMG-VCM08",
      "label": "Resistive Switching Mechanisms in Metal/Oxide/Metal Devices",
      "url": "https://www.nature.com/articles/nnano.2008.160",
      "kind": "Original Research Paper",
      "locator": "Abstract and accessible figure captions",
      "date": "2008-06-15",
      "limit": "The main text is subscription-restricted. This review does not claim access to all experimental details.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-PCMDRIFT",
      "label": "IBM: Temporal Resistance Evolution in Projected PCM",
      "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
      "kind": "Author-institution original paper record",
      "date": "2020-05-19",
      "locator": "Abstract: state-dependent resistance and temporal drift",
      "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
    },
    {
      "id": "EMG-PCMEND",
      "label": "IBM Research on PCM Cycling Endurance and Atomic Migration",
      "url": "https://research.ibm.com/publications/phase-change-memory-cycling-endurance",
      "kind": "Author Institution Paper Record and Abstract",
      "locator": "MRS Bulletin; cycling failure mechanisms",
      "date": "2019-09-05",
      "limit": "Mechanisms depend on the material. General discussion cannot support a lifetime commitment for an arbitrary product.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-PCMPROJ",
      "label": "IBM Low-Drift Projected PCM Devices",
      "url": "https://research.ibm.com/publications/design-of-projected-phase-change-memory-mushroom-cells-for-low-resistance-drift",
      "kind": "Author Institution Paper Record and Abstract",
      "locator": "Projection branch and mushroom-shaped phase-change devices",
      "date": "2022-09-18",
      "limit": "The research structure is not an established cross section of ST ePCM or another commercial product.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-FEPUF",
      "label": "Original Research on FeFET Cycle Variation and Charge-Domain PUFs",
      "url": "https://www.nature.com/articles/s41467-024-55380-x",
      "kind": "Original Research Paper",
      "locator": "Reconfigurable PUF structure, cycle variation, and validation",
      "date": "2024",
      "limit": "PUF reconfigurability does not establish reproducibility in arbitrary environments, nor does it independently demonstrate resistance to attacks.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-FMC",
      "label": "FMC Industry News and Ferroelectric Memory Classification",
      "url": "https://www.ferroelectric-memory.com/industry-news/",
      "kind": "Manufacturer News Collection",
      "locator": "Links to 2025 ferroelectric capacitor-based nonvolatile DRAM news and a 2026 interview",
      "date": "2026-09-10",
      "limit": "The date is the verification date. News headlines alone cannot establish the respective production status of FeFET and capacitor-based memory.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-P-STT",
      "label": "IBM: Spin-Torque Structure Patent US5695864A",
      "url": "https://patents.google.com/patent/US5695864A/en",
      "kind": "Published patent",
      "date": "1997-12-09",
      "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
      "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
    },
    {
      "id": "EMG-P-TOGGLE",
      "label": "Motorola: Toggle Writing Patent US6545906B1",
      "url": "https://patents.google.com/patent/US6545906B1/en",
      "kind": "Published patent",
      "date": "2003-04-08",
      "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
      "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
    },
    {
      "id": "EMG-P-SOT",
      "label": "Spin Memory Scalable SOT Device Process Patent",
      "url": "https://patents.google.com/patent/US10930843B2/en",
      "kind": "Published Patent",
      "locator": "Figures 3–6 and 7A–7F; claims 1–13",
      "date": "2021-02-23",
      "limit": "The original assignee and subsequent assignment history are distinguished. Area effects are not treated as production measurements.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-P-VCM",
      "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
      "url": "https://patents.google.com/patent/US8331131B2/en",
      "kind": "Published patent",
      "date": "2012-12-11",
      "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
      "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
    },
    {
      "id": "EMG-P-ECM",
      "label": "Axon: Programmable Metallization Cell Patent US5761115A",
      "url": "https://patents.google.com/patent/US5761115A/en",
      "kind": "Published patent",
      "date": "1998-06-02",
      "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
      "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
    },
    {
      "id": "EMG-P-PCM",
      "label": "Multilevel Phase-Change Memory Programming Patent",
      "url": "https://patents.google.com/patent/US5912839A/en",
      "kind": "Published Patent",
      "locator": "Figure 1; claims 1, 18, and 23",
      "date": "1999-06-15",
      "limit": "Its specific cumulative read method does not mean that ordinary PCM resistance reads are all destructive.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-P-FERAM",
      "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
      "url": "https://patents.google.com/patent/US4873664A/en",
      "kind": "Published patent",
      "date": "1989-10-10",
      "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
      "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
    },
    {
      "id": "EMG-P-HFO",
      "label": "Layered Doping of HfO₂ Ferroelectric Films Patent",
      "url": "https://patents.google.com/patent/US10153155B2/en",
      "kind": "Published Patent",
      "locator": "Figures 1/2 and 4; claim 1",
      "date": "2018-12-11",
      "limit": "A material-formation method; this patent does not provide a complete FeFET array and system design.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-P-FEFET",
      "label": "FeFET Gate Stack and Device Integration Patent",
      "url": "https://patents.google.com/patent/US11502083B2/en",
      "kind": "Published Patent",
      "locator": "Figures 2 and 3A–3F; claim 1",
      "date": "2022-11-15",
      "limit": "Improvements in a specific stack do not establish production qualification or universally applicable endurance values.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-P-FTJ",
      "label": "TSMC FTJ Structure and Low-Temperature Formation Application",
      "url": "https://patents.google.com/patent/US20240057343A1/en",
      "kind": "Published Patent Application",
      "locator": "Figure 17; claims 1 and 17",
      "date": "2024-02-15",
      "limit": "The reviewed document is the A1 publication. The granted scope of a B2 family member requires a separate comparison.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "EMG-TSMC-SOT",
      "label": "TSMC 2025 Annual Report: Type-C SOT-MRAM Research",
      "url": "https://investor.tsmc.com/static/annualReports/2025/english/pdf/2025_tsmc_ar_e_ch5.pdf",
      "kind": "Supplier Annual Report: R&D Results",
      "locator": "Printed pages 104–105; page 4 of the chapter PDF; IEDM 2025 Type-C section",
      "date": "2026",
      "limit": "A research demonstration. Qualification of other TSMC MRAM platforms does not establish SOT volume production; area and current improvements must retain their comparison baseline.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "CMP-YU2016",
      "label": "Yu and Chen: Emerging Memory Technologies—Recent Trends and Prospects",
      "url": "https://knowen-production.s3.amazonaws.com/uploads/attachment/file/5249/yu2016.pdf",
      "kind": "Original Technical Review",
      "locator": "IEEE Solid-State Circuits Magazine 8(2), 43–56; p44, Table 1; DOI 10.1109/MSSC.2016.2546199",
      "date": "2016",
      "limit": "The original table includes only STT-MRAM, PCRAM, and RRAM in its emerging-technology columns. Representative values and cell-level energy estimates are not guarantees for modern products."
    },
    {
      "id": "CMP-LECTURE2021",
      "label": "Shimeng Yu: Comparison Table from Lecture 6, 2021",
      "url": "https://www.youtube.com/watch?v=_Ov2KUZTIv8&t=2165s",
      "kind": "Lecture and Supplied Screenshot",
      "locator": "Slide p14, dated 2021/11/1; comparison segment at 36:05–43:49; every table cell was checked against the screenshot at its original size",
      "date": "2021-11-01",
      "limit": "The course cites and extends the 2016 paper, adding SOT-MRAM, FeRAM, and FeFET. This website retains the historical values without presenting them as universal specifications for 2026."
    },
    {
      "id": "CMP-FRAM-PRODUCT",
      "label": "Infineon CY15B104QSN-108SXI Product Status",
      "url": "https://www.infineon.com/part/CY15B104QSN-108SXI",
      "kind": "Supplier Product Page",
      "locator": "Product status, 4 Mb capacity, and interface specifications",
      "date": "Verified 2026-09-10",
      "limit": "Active supply status applies to the specified part number; it cannot be generalized to every ferroelectric-memory implementation."
    },
    {
      "id": "CMP-FRAM-DS",
      "label": "Infineon CY15B104QSN/CY15V104QSN Datasheet",
      "url": "https://www.infineon.com/dgdl/Infineon-CY15B104QSN_CY15V104QSN_4Mb_EXCELON_Ultra_Ferroelectric_RAM_F-RAM_Serial_quad_SPI_512K_8_108_MHz_industrial-DataSheet-v15_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee59c446d71",
      "kind": "Product Datasheet",
      "locator": "002-18293 Rev. *N; p1 and p105, Table 63",
      "date": "2024-07-25",
      "limit": "The 151-year retention rating applies at 65°C; retention at 85°C is 10 years. Interface frequency is not cell read or write latency."
    },
    {
      "id": "CMP-MRAM-PRODUCT",
      "label": "Everspin MR25H40 Products and Part Numbers",
      "url": "https://www.everspin.com/products/series/mr25h40",
      "kind": "Supplier Product Page",
      "locator": "Toggle MRAM technology field, production status, and part numbers by temperature grade",
      "date": "Verified 2026-09-10",
      "limit": "Supply status and temperature grades vary by part number. Toggle MRAM specifications do not describe STT or SOT implementations."
    },
    {
      "id": "CMP-MRAM-DS",
      "label": "Everspin MR20H40/MR25H40 Datasheet",
      "url": "https://www.everspin.com/sites/default/files/EST00459_MR2xH40_Datasheet_Rev12.6_08092020.pdf",
      "kind": "Product Datasheet",
      "locator": "Revision 12.6; p1 product features and interface description",
      "date": "2020-08",
      "limit": "Unlimited read/write cycling is the supplier's specification for this product, not a physical law that all MRAM can never fail."
    },
    {
      "id": "CMP-EVERSPIN2024",
      "label": "Everspin 2024 Annual Filing",
      "url": "https://www.sec.gov/Archives/edgar/data/1438423/000155837025001827/mram-20241231x10k.htm",
      "kind": "Statutory Company Filing",
      "locator": "STT-MRAM product and shipment disclosures",
      "date": "Filed in 2025; fiscal year 2024",
      "limit": "Supports commercial shipments of 256 Mb and 1 Gb STT-MRAM. It does not establish volume production for unlisted densities or technologies."
    },
    {
      "id": "CMP-EVERSPIN2026",
      "label": "Everspin High-Reliability xSPI MRAM Production Qualification Progress",
      "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
      "kind": "Supplier Announcement",
      "locator": "Completed qualification and orderability of 64 Mb; expected schedules for 128 Mb/256 Mb",
      "date": "2026-03-05",
      "limit": "Only completed milestones establish completion. Passing a forecast date does not automatically demonstrate that the plan was fulfilled."
    },
    {
      "id": "CMP-RERAM-PRODUCT",
      "label": "RAMXEED ReRAM Product Family",
      "url": "https://www.ramxeed.com/zh-tw/products/reram-products/",
      "kind": "Supplier Product Page",
      "locator": "Production-status fields for MB85AS8MT and MB85AS12MT",
      "date": "Verified 2026-09-10",
      "limit": "The 8 Mb device is listed as in mass production; the 12 Mb device requires an inquiry. A datasheet or sampling announcement is not evidence of volume production."
    },
    {
      "id": "CMP-RERAM-DS",
      "label": "RAMXEED MB85AS8MT Datasheet",
      "url": "https://www.ramxeed.com/assets/images/products/datasheet/ReRAM/MB85AS8MT-DS2v2-E.pdf",
      "kind": "Product Datasheet",
      "locator": "DS501-00060-2v2-E; p8, p12–13, p17, and p20",
      "date": "2024",
      "limit": "Product tWC includes the internal nonvolatile-write sequence and differs from a switching pulse measured on a research cell. Endurance is specified per 4 bytes."
    },
    {
      "id": "CMP-PCM-PRODUCT",
      "label": "ST SR6P6C8 Microcontroller with Embedded PCM",
      "url": "https://www.st.com/en/automotive-microcontrollers/sr6p6c8.html",
      "kind": "Supplier Product Page",
      "locator": "Production status at the top of the page, memory features, and the quality-and-reliability part-number table",
      "date": "Verified 2026-09-10",
      "limit": "Supports volume production of SR6P6C8 and its listed part numbers. It does not establish the status of every Stellar device or PCM implementation."
    },
    {
      "id": "CMP-TSMC-STT2019",
      "label": "TSMC 22 nm STT-MRAM: Reflow, Automotive Reliability, and Performance Options",
      "url": "https://research.tsmc.com/page/mram/1.html",
      "kind": "Authors' Research Abstract",
      "locator": "Gallagher et al., 2019; 20 Mb design and alternative MTJ options",
      "date": "2019",
      "limit": "The 6 ns sensing result and write time slightly above 30 ns belong to a performance option that gives up reflow retention. They cannot be combined with the separate high-retention option."
    },
    {
      "id": "CMP-KIOXIA2026",
      "label": "Kioxia/Sandisk Research on 10th-Generation 2 Tb QLC NAND",
      "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-92.html",
      "kind": "Author-Institution Research Article",
      "locator": "ISSCC 2026; DOI 10.1109/ISSCC49663.2026.11409136; 332 layers and die-level density",
      "date": "2026-07-15",
      "limit": "Die-level Gb/mm² and write throughput cannot be substituted directly for cell F² or host-visible SSD performance. Publication of research does not by itself establish volume production across the product range."
    },
    {
      "id": "CMP-OPTANE-PERF",
      "label": "Intel Optane P5800X Performance and Test Conditions",
      "url": "https://edc.intel.com/content/www/us/en/products/performance/benchmarks/intel-optane-ssd-p5800x-series/",
      "kind": "Supplier System Measurement",
      "locator": "Items 11 and 12; Xeon 8380, Ubuntu 20.04.2, and FIO 3.16",
      "date": "Tested 2021-03-18",
      "limit": "Average latency for 512 B and 4 KB random reads. These values are not tail latency, cell switching time, or evidence of new-product availability in 2026."
    },
    {
      "id": "CMP-MICRON2021",
      "label": "Micron 3D XPoint and Data-Center Portfolio Strategy Update",
      "url": "https://investors.micron.com/news/press-release/2021/Micron-Updates-Data-Center-Portfolio-Strategy-to-Address-Growing-Opportunity-for-Memory-and-Storage-Hierarchy-Innovation-03-16-2021/default.aspx",
      "kind": "Supplier Announcement",
      "locator": "Immediate discontinuation of 3D XPoint development and a shift toward CXL-related investment",
      "date": "2021-03-16",
      "limit": "Establishes the end of development; it does not mean that manufacturing or shipments of all existing products stopped on the same date."
    },
    {
      "id": "CMP-MICRON-CALL2021",
      "label": "Micron 3D XPoint Strategy-Update Prepared Remarks",
      "url": "https://investors.micron.com/static-files/c858cbb2-bfd2-4f84-ba10-f69b385cf4bf",
      "kind": "Company Investor-Call Document",
      "locator": "p4: manufacturing to end after industry commitments are fulfilled",
      "date": "2021-03-16",
      "limit": "Manufacturing withdrawal follows existing commitments. The document does not determine the last shipment date for every part number."
    },
    {
      "id": "CMP-MICRON-LEHI2021",
      "label": "Micron Completes the Sale of the Lehi Fab",
      "url": "https://www.micron.com/about/blog/company/partners/sale-of-lehi-fab",
      "kind": "Supplier Announcement",
      "locator": "Transaction closing date and background on 3D XPoint production",
      "date": "Transaction closed 2021-10-22",
      "limit": "The fab sale is a separate event; it does not mean that all systems or support services ended at the same time."
    },
    {
      "id": "CMP-INTEL2023",
      "label": "Intel Optane Customer Letter",
      "url": "https://cdrdv2-public.intel.com/774331/IOG-DCL-March%202023.pdf",
      "kind": "Supplier Lifecycle Announcement",
      "locator": "Discontinuation of further development in July 2022; inventory and support statements",
      "date": "2023-03-21",
      "limit": "Availability through 2025 was a demand-dependent inventory forecast made at the time. Support resources through 2030 are not a commitment to continued manufacturing."
    },
    {
      "id": "CMP-SNIA-PM",
      "label": "SNIA Definition of Persistent Memory",
      "url": "https://www.snia.org/education/what-is-persistent-memory",
      "kind": "Industry-Organization Technical Explanation",
      "locator": "Nonvolatility, byte addressability, low latency, and CXL attachment",
      "date": "Verified 2026-09-10",
      "limit": "The definition and use of persistent memory depend on context; the term SCM has not been used identically across different periods."
    },
    {
      "id": "CMP-CXL2022",
      "label": "CXL 3.0 Specification",
      "url": "https://computeexpresslink.org/wp-content/uploads/2024/02/CXL-3.0-Specification.pdf",
      "kind": "Original Specification",
      "locator": "Version 3.0, p636: flags for volatile and persistent memory ranges",
      "date": "2022-08-01",
      "limit": "Protocol support for persistence does not mean that every CXL device contains persistent media or shares the same failure-protection domain."
    },
    {
      "id": "CMP-CXL-FAQ2021",
      "label": "CXL Consortium Persistent-Memory Webinar Questions and Answers",
      "url": "https://computeexpresslink.org/blog/questions-from-the-compute-express-link-cxl-supporting-persistent-memory-webinar-2407/",
      "kind": "Standards-Organization Technical Q&A",
      "locator": "CXL.mem, multiple media types, controllers, and device forms",
      "date": "2021-07-27",
      "limit": "Supports treating media and attachment as separate concepts. The concepts discussed do not guarantee that a particular product implements every optional capability."
    },
    {
      "id": "CMP-SAMSUNG-CMM",
      "label": "Samsung CXL Memory and CMM-D",
      "url": "https://semiconductor.samsung.com/cxl-memory/",
      "kind": "Supplier Product-Technology Explanation",
      "locator": "CMM-D name, DRAM media, and CXL interface",
      "date": "Verified 2026-09-10",
      "limit": "DRAM memory expansion and sharing do not imply data retention through power loss."
    },
    {
      "id": "CMP-CXL2026",
      "label": "DRAM, NAND, and Backup Energy in CXL Persistent Memory",
      "url": "https://computeexpresslink.org/blog/from-nvdimm-n-to-cxl-persistent-memory-bringing-persistence-to-the-memory-fabric-4635/",
      "kind": "Member Technical Article Published by the CXL Consortium",
      "locator": "Netlist: NVDIMM-N and CXL save/restore architectures",
      "date": "2026-05-25",
      "limit": "An architectural explanation, not direct evidence that a specific CXL persistent-memory product is in volume production. The DRAM cells themselves remain volatile."
    },
    {
      "id": "CMP-IBM-SELECTOR2017",
      "label": "IBM: Memory Selector Devices and Crossbar Array Design",
      "url": "https://research.ibm.com/publications/memory-selector-devices-and-crossbar-array-design-a-modeling-based-assessment",
      "kind": "Author-Institution Research Abstract",
      "locator": "An Chen; nonlinearity, rectification, and array trade-offs for two-terminal selectors",
      "date": "2017-09-02",
      "limit": "Selector capabilities must be assessed together with the storage device and array conditions. A single nonlinearity ratio cannot establish complete-system feasibility."
    },
    {
      "id": "CMP-IBM-ARRAY2014",
      "label": "IBM: Design Space for Resistive-Memory Arrays with MIEC Selectors",
      "url": "https://research.ibm.com/publications/exploring-the-design-space-for-resistive-nonvolatile-memory-crossbar-arrays-with-mixed-ionic-electronic-conduction-miec-based-access-devices",
      "kind": "Authors' Research Abstract",
      "locator": "DRC 2014; selector leakage, write power, wire resistance, and array size",
      "date": "2014-06-22",
      "limit": "This study uses a specific MIEC selector and circuit simulations. It illustrates trade-offs; it does not establish that the same factor limits every crossbar array."
    },
    {
      "id": "CMP-NIST-VERIFY2017",
      "label": "NIST: Impact of RRAM Read Fluctuations on Program Verify",
      "url": "https://www.nist.gov/publications/impact-rram-read-fluctuations-program-verify-approach",
      "kind": "Original-Research Page at the Authors' Institution",
      "locator": "Nminibapiel et al.; IEEE Electron Device Letters; false reads and distribution tails",
      "date": "2017-05-22",
      "limit": "Experiments on a specific oxide RRAM show that read fluctuations can mislead verification. They do not imply that every program-verify method is ineffective."
    },
    {
      "id": "CMP-IBM-PCM2020",
      "label": "IBM: Precision Limits of Closed-Loop PCM Programming",
      "url": "https://research.ibm.com/publications/precision-of-synaptic-weights-programmed-in-phase-change-memory-devices-for-deep-learning-inference",
      "kind": "Authors' Research Abstract",
      "locator": "IEDM 2020; array experiments with more than 1,000 PCM devices",
      "date": "2020-12-12",
      "limit": "Read-noise and drift results for analog-weight programming cannot be treated directly as product specifications for every digital PCM implementation."
    },
    {
      "id": "CMP-TSMC-ECC2023",
      "label": "TSMC and Collaborators: Read Compensation and ECC in an RRAM Macro",
      "url": "https://research.tsmc.com/page/artificial-intelligence/3.html",
      "kind": "Authors' Research Abstract",
      "locator": "2023, 40 nm RRAM compute macro; offset, leakage, IR drop, and error rate after calibration",
      "date": "2023",
      "limit": "The compute-macro demonstration illustrates the importance of peripheral circuits and calibration. Its compute efficiency and error rate do not represent all storage-oriented RRAM."
    },
    {
      "id": "CMP-PMDK",
      "label": "PMDK libpmem Persistence Operations",
      "url": "https://pmem.io/pmdk/libpmem/",
      "kind": "Original Software-Project Documentation",
      "locator": "Cache flushing and hardware-buffer draining for persistence; platform differences",
      "date": "Verified 2026-09-10",
      "limit": "An educational example of persistence semantics. Implementations still require the correct API for the platform and software version; this is not a universal processor-instruction sequence."
    },
    {
      "id": "CMP-SNIA-ATOMICS2017",
      "label": "SNIA: Persistent Memory Atomics and Transactions",
      "url": "https://www.snia.org/sites/default/files/technical-work/whitepapers/SNIA-Persistent-Memory-Atomics-Transactions-WP.pdf",
      "kind": "Industry-Organization Technical White Paper",
      "locator": "p14 and related sections: flush ordering, linked data structures, and failure atomicity",
      "date": "2017-01-10",
      "limit": "Atomic-write granularity in the examples belongs to the assumed machine architecture. Persistence and transaction atomicity must not be conflated."
    },
    {
      "id": "CMP-SNIA-NPM",
      "label": "SNIA NVM Programming Model",
      "url": "https://www.snia.org/sites/default/files/technical-work/npm/release/SNIA-NVM-Programming-Model-v1.pdf",
      "kind": "Original Technical Specification",
      "locator": "Version 1; Section 10.2.4 and p59: synchronization, persistence domains, and atomicity boundaries",
      "date": "Version 1; historical specification",
      "limit": "Used for fundamental semantics and the development of the concepts. This does not claim that the cited version is the latest implementation specification in 2026."
    },
    {
      "id": "FND-GF-2020-MRAM",
      "label": "GF: 22FDX eMRAM Production Announcement",
      "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
      "kind": "Supplier Press Release",
      "date": "2020-02-27",
      "locator": "Sections on production, reliability, and macros",
      "claim": "22FDX eMRAM has entered production: one hundred thousand cycles, ten-year retention over the stated temperature range, and five solder-reflow cycles. Grade 2 design support is available; Grade 1 development was targeted for the following year.",
      "evidence": "Full text reviewed",
      "limit": "Applies to the platform and macro conditions disclosed at the time; cannot be generalized to all MRAM.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2020-CBRAM",
      "label": "GF and Dialog: 22FDX CBRAM Licensing Agreement",
      "url": "https://investors.gf.com/node/6441/pdf",
      "kind": "Joint Supplier Press Release",
      "date": "2020-10-19",
      "locator": "Sections on licensing and the planned availability year",
      "claim": "Dialog licensed conductive-bridge memory, with an embedded 22FDX option then planned for 2022.",
      "evidence": "Text from the official search index",
      "limit": "Establishes a planned schedule only. CBRAM and the later OxRAM offering must not be treated as the same material system or version.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2022-MAP",
      "label": "GF 2022 Investor Presentation: Platform Feature Roadmap",
      "url": "https://investors.gf.com/static-files/65f5f1b9-2aea-47a3-8455-10413c6560f4",
      "kind": "Supplier Investor Presentation",
      "date": "2022",
      "locator": "Investing for a Bold Future chart",
      "claim": "The chart lists platform features including 22FDX, 22FDX+, MRAM, and MRAM-G2.",
      "evidence": "Text from the official index; the PDF could not be opened",
      "limit": "The color legend and graphical associations have not been verified. Flattened text is not used to declare that a platform is in volume production, and MRAM-G2 is not independently mapped to later naming.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2023-MAP",
      "label": "GF 2023 Investor Presentation: Platforms and Features",
      "url": "https://investors.gf.com/static-files/9aecbb31-1a7a-43a5-b1ed-d5e0d4380cee",
      "kind": "Supplier Investor Presentation",
      "date": "2023",
      "locator": "Platform feature roadmap on page 32",
      "claim": "The chart continues to list MRAM, MRAM-G2, and development directions for multiple platforms.",
      "evidence": "Text from the official index",
      "limit": "Text extraction loses the association between individual features and the production/development legend. It does not establish that 12LP MRAM is in volume production.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2024-AUTO",
      "label": "GF: Automotive Platform Innovation and 12LP+ AutoPro150",
      "url": "https://gf.com/news-and-events/blog/driving-automotive-innovation-on-the-semiconductor-superhighway/",
      "kind": "Supplier Technical Blog",
      "date": "2024-06-11",
      "locator": "Sections on eMRAM and 12LP+ features",
      "claim": "Describes the 12LP+ automotive offering and lists MRAM among features being deployed, while describing some features as forthcoming.",
      "evidence": "Main text reviewed",
      "limit": "Does not provide a completed qualification date, production date, or full electrical conditions for the MRAM macro. Power improvements in the logic platform are not MRAM metrics.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2025-MCU",
      "label": "GF: Automotive MCUs and Software-Defined Vehicles",
      "url": "https://gf.com/news-and-events/blog/inside-a-cars-digital-brain-mcus-the-engine-powering-sdv-innovation/",
      "kind": "Supplier Technical Blog",
      "date": "2025-05-22",
      "locator": "Sections on 12LP+ MRAM and 22FDX MRAM",
      "claim": "GF lists 12LP+ MRAM and 22FDX MRAM as technologies for automotive controllers.",
      "evidence": "Main text reviewed",
      "limit": "These are platform and application claims; they do not provide macro-specific evidence of volume production or completed qualification for 12LP+ MRAM.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2025-RRAM",
      "label": "GF 2025 Technology Summit: 22FDX+ RRAM Available for Prototyping",
      "url": "https://gf.com/news-and-events/news/globalfoundries-announces-availability-of-22fdx-rram-technology-for-wireless-connectivity-and-ai-applications/",
      "kind": "Supplier Technology Summit Press Release",
      "date": "2025-08-28",
      "locator": "Subtitle, OxRAM section, and final design-kit section",
      "claim": "Uses OxRAM; preliminary macro design kits are available, with volume production targeted for 2026.",
      "evidence": "Full text reviewed",
      "limit": "The maturity wording in the opening paragraph of the regional Chinese page differs from the English original. This timeline follows the English original's distinction between prototyping and future volume production and does not repeat the mistranslated production claim.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-2026-AUTO",
      "label": "GF: FDX+ AutoPro150 eMRAM Available for Prototyping",
      "url": "https://gf.com/news-and-events/news/globalfoundries-announces-availability-of-autopro-150-emram-technology-on-enhanced-fdx-platform-for-advanced-automotive-applications/",
      "kind": "Supplier Press Release",
      "date": "2026-03-09",
      "locator": "Subtitle, performance section, design kits, and volume-production target",
      "claim": "Auto Grade 1 ready; five hundred thousand cycles, read access below 10 ns, and operation up to 150°C. The PDK is available, with volume production in Dresden targeted for the second half of 2026.",
      "evidence": "Full text reviewed",
      "limit": "The announcement does not disclose a joint test matrix for all metrics, ECC, or the failure distribution. No subsequent announcement confirming completed volume-production ramp was obtained as of the verification date.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-GF-CURRENT-FDX",
      "label": "GF Current FDX Platform and Embedded Memory Page",
      "url": "https://gf.com/technologies/cmos/fdx-fd-soi/",
      "kind": "Dynamic Supplier Product Page",
      "date": null,
      "locator": "MRAM, RRAM, and AutoPro150 sections",
      "claim": "The MRAM page states more than five hundred thousand cycles and twenty-year retention at 150°C; RRAM uses in-house OxRAM integration.",
      "evidence": "Main text reviewed; verified on 2026-09-10",
      "limit": "The page has no version or update date. Its performance claims are not treated as confirmation that a new version has entered volume production, and twenty-year retention and the maximum cycle count are not assumed to have been achieved together on the same sample under the same workload.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-EVERSPIN-12LP",
      "label": "Everspin/GF 12LP MRAM Joint Development Agreement Amendment",
      "url": "https://www.sec.gov/Archives/edgar/data/1438423/000155837021002369/mram-20201231xex10d11d4.htm",
      "kind": "Public Contract Exhibit",
      "date": "2019-12-31",
      "locator": "Preamble to Amendment No. 4 and Section 3.2.1",
      "claim": "Establishes that the parties have a scope of work for joint development of 12LP MRAM.",
      "evidence": "Official filing text reviewed",
      "limit": "The agreement establishes collaboration, not commercial volume production, finished-product specifications, or macro compatibility between 12LP+ and 12LP.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2022-AR",
      "label": "TSMC 2022 Annual Report: 16FFC MRAM and 22/28ULL RRAM",
      "url": "https://investor.tsmc.com/static/annualReports/2022/english/ebook/files/basic-html/page97.html",
      "kind": "Supplier Annual Report",
      "date": "2023",
      "locator": "Printed page 95; e-book page 97",
      "claim": "16FFC MRAM completed reliability qualification and was production-ready in 2022; automotive Grade 1 was targeted for 2023. Customer products using 22/28ULL RRAM began volume production in 2022.",
      "evidence": "Official e-book text reviewed",
      "limit": "Production readiness and volume production are distinct. Grade 1 was still a forward-looking target at that point.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2023-AR",
      "label": "TSMC 2023 Annual Report, Chapter Five: Process Services and Emerging Memory",
      "url": "https://investor.tsmc.com/static/annualReports/2023/english/pdf/2023_tsmc_ar_e_ch5.pdf",
      "kind": "Supplier Annual Report",
      "date": "2024",
      "locator": "Printed pages 97 and 101; PDF pages 2 and 4",
      "claim": "The process-services chapter records Grade 1 qualification for 16FFC MRAM in 2023 and the second year of volume production for 22/28ULL RRAM. The R&D chapter separately records completed consumer-grade qualification for 16nm and exploration of a next-generation 16nm technology with smaller bits.",
      "evidence": "Official PDF text reviewed",
      "limit": "The MRAM scopes and versions described in different chapters of the same report are not fully mapped to one another. All 16nm qualification events must not be collapsed into a single first-completion date.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2024-AR",
      "label": "TSMC 2024 Annual Report: Emerging Memory with Smaller Bits",
      "url": "https://investor.tsmc.com/static/annualReports/2024/english/ebook/files/basic-html/page104.html",
      "kind": "Supplier Annual Report",
      "date": "2025",
      "locator": "Printed page 102; e-book page 104",
      "claim": "12nm RRAM completed consumer-grade technology qualification; 6nm RRAM is in development. A smaller, more energy-efficient 16nm MRAM was targeted for automotive qualification in 2025; 12/5nm MRAM is in development.",
      "evidence": "Official e-book text reviewed",
      "limit": "No mapping of macro versions and names across generations is provided. Technology qualification for 12nm RRAM is not directly equivalent to volume production.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2024-BUS",
      "label": "TSMC 2024 Annual Report: Automotive Technology Services",
      "url": "https://investor.tsmc.com/static/annualReports/2024/english/ebook/files/basic-html/page21.html",
      "kind": "Supplier Annual Report",
      "date": "2025",
      "locator": "Printed page 19; e-book page 21",
      "claim": "Reiterates that 16nm MRAM met automotive Grade 1 requirements in 2023.",
      "evidence": "Official e-book text reviewed",
      "limit": "Coexists with the R&D chapter's 2025 target. Differences in version scope must be retained.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2025-AR",
      "label": "TSMC 2025 Annual Report: Second-Generation MRAM and Third-Generation RRAM",
      "url": "https://investor.tsmc.com/static/annualReports/2025/english/pdf/2025_tsmc_ar_e_ch5.pdf",
      "kind": "Supplier Annual Report",
      "date": "2026",
      "locator": "Printed page 101; Chapter Five PDF page 2; Section 5.1, Specialty Technologies",
      "claim": "Second-generation 16MRAM passed automotive qualification in 2025, with a chip failure rate below 1 ppm after one million cycles. N12e RRAM completed consumer-grade qualification for production in 2025; 22RRAM completed qualification for one hundred thousand cycles.",
      "evidence": "Official chapter PDF reviewed in full; the accessible official chapter version was used after the original full-report link failed",
      "limit": "The annual report does not provide full capacity, ECC, temperature, or sample-distribution information. The chip failure rate cannot be extrapolated to arbitrary macros.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-2025-20F",
      "label": "TSMC Form 20-F for Fiscal Year 2025",
      "url": "https://www.sec.gov/Archives/edgar/data/1046179/000162828026025362/tsm-20251231.htm",
      "kind": "Official Company Regulatory Filing",
      "date": "2026-04-17",
      "locator": "Automotive platform technology section",
      "claim": "Second-generation 16nm MRAM and 22ULL RRAM met Automotive Grade 1 requirements in 2025.",
      "evidence": "Full-text excerpts from the official index; the filing could not be opened directly",
      "limit": "Establishes completion within the reporting year, but provides no volume-production start date, customer part number, or full test conditions.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-CURRENT-LOGIC",
      "label": "TSMC Current 16/12nm Technology Page",
      "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_16_12nm",
      "kind": "Dynamic Supplier Product Page",
      "date": null,
      "locator": "Sections on N12 RRAM and N16 MRAM qualification",
      "claim": "Records completed consumer-grade qualification for N12 RRAM and automotive Grade 1 qualification for N16 MRAM in 2025.",
      "evidence": "Text from the official index; verified on 2026-09-10",
      "limit": "The 2017 volume-production year of the underlying 12FFC+ logic platform must not be substituted for the RRAM macro's production year.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-CURRENT-NVM",
      "label": "TSMC Current Embedded Nonvolatile Memory Page",
      "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/specialty/eflash",
      "kind": "Dynamic Supplier Product Page",
      "date": null,
      "locator": "Main text on eMRAM and eRRAM",
      "claim": "22/16nm eMRAM is automotive-qualified and in production; 40/28/22/12nm eRRAM is in volume production. 12nm automotive MRAM, 5nm high-speed MRAM, and 6nm RRAM are in development.",
      "evidence": "Text from the official index; direct access returned only the specialty-technology navigation; verified on 2026-09-10",
      "limit": "The website is dynamic and has no revision date. This is a snapshot of current status, not evidence of the first year of volume production.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-2022",
      "label": "TSMC 2022 North America Technology Symposium Press Release",
      "url": "https://pr.tsmc.com/english/news/2939",
      "kind": "Official Annual Technology Symposium Press Release",
      "date": "2022-06-16",
      "locator": "N6e ultra-low-power platform section",
      "claim": "The public release mentions an embedded NVM technology portfolio.",
      "evidence": "Main text reviewed",
      "limit": "The public release does not contain a complete roadmap sufficient to determine volume-production status for each MRAM/RRAM generation.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-2023",
      "label": "TSMC 2023 North America Technology Symposium Press Release",
      "url": "https://pr.tsmc.com/system/files/newspdf/attachment/af320740c347534184a5705ac01982e22e743978/2023%20Tech%20Symposium%20%28E%29_final_wmn.pdf",
      "kind": "Official Annual Technology Symposium Press Release",
      "date": "2023-04-26",
      "locator": "Three-page public press release",
      "claim": "The public technology highlights primarily cover logic and integration platforms.",
      "evidence": "PDF reviewed and searched for MRAM",
      "limit": "No occurrence of MRAM was found. A symposium date cited by media is not substituted for official evidence of completion.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-2024",
      "label": "TSMC 2024 North America Technology Symposium Press Release",
      "url": "https://pr.tsmc.com/english/news/3136",
      "kind": "Official Annual Technology Symposium Press Release",
      "date": "2024-04-24",
      "locator": "Sections on new technologies and advanced automotive packaging",
      "claim": "The main public symposium release covers A16, system-on-wafer technology, and automotive packaging.",
      "evidence": "Main text reviewed and searched for MRAM",
      "limit": "The main release contains no complete MRAM/RRAM node timeline. Annual reports provide supplemental evidence; access to conference slides is not claimed.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-2025",
      "label": "TSMC 2025 North America Technology Symposium Press Release",
      "url": "https://pr.tsmc.com/system/files/newspdf/attachment/167c59998c7117f14c13647c8e46a6b20a43316c/2025%20Tech%20Symposium%20%28E%29_Final_wmn.pdf",
      "kind": "Official Annual Technology Symposium Press Release",
      "date": "2025-04-23",
      "locator": "Three-page public press release",
      "claim": "The public technology highlights cover advanced logic, packaging, and platforms.",
      "evidence": "PDF reviewed and searched for MRAM",
      "limit": "The main release contains no complete MRAM/RRAM timeline suitable for verification. Unobtained internal symposium pages are not used to invent completion dates.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-2026",
      "label": "TSMC 2026 North America Technology Symposium Press Release and Public Video Portal",
      "url": "https://pr.tsmc.com/english/news/3302",
      "kind": "Official Annual Technology Symposium Press Release",
      "date": "2026-04-23",
      "locator": "The US event took place on 2026-04-22; press release and technology highlights",
      "claim": "The public release records the annual technology symposium and progress in specialty technologies.",
      "evidence": "Main text reviewed and searched for MRAM",
      "limit": "The public release does not provide a complete MRAM/RRAM roadmap. A presentation uploaded by a third party is not treated as an official version.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-TSMC-SYMP-ACCESS",
      "label": "TSMC 2026 Technology Symposium Public Video Portal",
      "url": "https://www.tsmc.com/english/symposium_highlights/2026",
      "kind": "Official Conference Portal",
      "date": "2026",
      "locator": "Access instructions for the full on-demand videos",
      "claim": "Public highlights and full conference videos are separate; full on-demand access requires an invitation.",
      "evidence": "Official text reviewed",
      "limit": "This review did not obtain invitation-only conference content and cannot claim to have checked the complete internal roadmap.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-SEC-2019-28FDS",
      "label": "Samsung Foundry: 28FDS eMRAM commercial production announcement",
      "url": "https://news.samsung.com/global/",
      "kind": "Vendor official press release",
      "date": "2019-03-06",
      "locator": "28FDS eMRAM commercial shipment and reliability section",
      "claim": "Samsung announced commercial shipment of 28nm FD-SOI embedded MRAM with faster writes and lower power versus eFlash alternatives.",
      "evidence": "Full official press release reviewed",
      "limit": "28FDS-specific platform; extensions to 14FDS and 8nm automotive/radio require separate macro qualification.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-SEC-2024-MBCFET",
      "label": "Samsung Foundry: SF3 / SF2 MBCFET advanced nodes and next-gen eMRAM roadmap",
      "url": "https://semiconductor.samsung.com/foundry/process-technology/",
      "kind": "Vendor technology forum and product brief",
      "date": "2024-06-12",
      "locator": "SFF 2024 MBCFET GAA and advanced embedded NVM planning",
      "claim": "Samsung publicly discusses SF3/SF2 GAA platforms with advanced embedded eMRAM development goals for automotive HPC and edge AI.",
      "evidence": "Official technology forum summary reviewed",
      "limit": "SF3/SF2 eMRAM remains in R&D/validation targets — not declared volume production.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-INTC-2018-22FFL",
      "label": "Intel Foundry: 22FFL embedded STT-MRAM (IEDM 2018)",
      "url": "https://www.intel.com/content/www/us/en/newsroom/news/intel-showcases-technologies-iedm-2018.html",
      "kind": "Conference paper and official release",
      "date": "2018-12-03",
      "locator": "IEDM 2018 paper 13.3, 22FFL STT-MRAM cell and reliability",
      "claim": "Intel published 22FFL FinFET embedded STT-MRAM with 0.0446 µm² cell, 10^6 endurance, 200°C retention, and 1E-9 BER under named ECC conditions.",
      "evidence": "IEDM paper and official release reviewed",
      "limit": "22FFL low-power FinFET specialty process; metrics depend on ECC and temperature.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "FND-INTC-2024-18A",
      "label": "Intel Foundry: 18A RibbonFET and PowerVia BSPDN roadmap",
      "url": "https://www.intel.com/content/www/us/en/newsroom/news/intel-foundry-direct-connect-2024.html",
      "kind": "Vendor official event release",
      "date": "2024-02-21",
      "locator": "IFDC 2024 18A production plan, PowerVia back-side power, embedded IP ecosystem",
      "claim": "Intel 18A integrates RibbonFET GAA with PowerVia BSPDN for next-gen dense embedded memory and logic AntiFuse OTP key cells.",
      "evidence": "Official release and technical brief reviewed",
      "limit": "18A enters production preparation in 2024–2025; forward eNVM/MRAM still in R&D validation.",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "ip-neobit",
      "label": "NeoBit Technical Principles",
      "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
      "kind": "Primary Technical Source",
      "date": "Undated; checked 2026-09-10",
      "locator": "Technical Principles",
      "limit": "Current product principle; full biases and layout are not disclosed."
    },
    {
      "id": "ip-neobit-pat",
      "label": "Historical NeoBit Charge-Retention Patent",
      "url": "https://patents.google.com/patent/US6914825B2/en",
      "kind": "Public Patent",
      "date": "2005-07-05",
      "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
      "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
    },
    {
      "id": "ip-neobit-link",
      "label": "Official NeoBit-to-Patent Link",
      "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
      "kind": "Primary Technical Source",
      "date": "2005-10-04",
      "locator": "Second body paragraph: patent title and inventors",
      "limit": "Direct historical association between NeoBit and the named patent."
    },
    {
      "id": "ip-neobit-uv",
      "label": "Published NeoBit UV-Erase Boundary",
      "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
      "kind": "Primary Technical Source",
      "date": "2021; filename version 2021-03-30",
      "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
      "limit": "UV erase was published; this does not make every current package UV erasable."
    },
    {
      "id": "ip-neobit-pgm-pat",
      "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
      "url": "https://patents.google.com/patent/US6678190B2/en",
      "kind": "Public Patent",
      "date": "2004-01-13",
      "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
      "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
    },
    {
      "id": "ip-neobit-io-pat",
      "label": "I/O-Device Single-Poly NVM Patent",
      "url": "https://patents.google.com/patent/US6920067B2/en",
      "kind": "Public Patent",
      "date": "2005-07-19",
      "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
      "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
    },
    {
      "id": "ip-neobit-eetimes-2003",
      "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
      "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
      "kind": "Primary Technical Source",
      "date": "2003-11-05",
      "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
      "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
    },
    {
      "id": "ip-neobit-io-pgm-author",
      "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
      "url": "https://patents.google.com/patent/US6920067B2/en",
      "kind": "Architecture-class Reference",
      "date": "reviewed 2026-09-11",
      "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
      "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
    },
    {
      "id": "ip-neofuse",
      "label": "NeoFuse Technical Principles",
      "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
      "kind": "Primary Technical Source",
      "date": "Undated; checked 2026-09-10",
      "locator": "Technical Principles",
      "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
    },
    {
      "id": "ip-neofuse-dt",
      "label": "Quantum Tunneling Mechanism in NeoFuse",
      "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
      "kind": "Primary Technical Source",
      "date": "2021-01-19",
      "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
      "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
    },
    {
      "id": "ip-neofuse-3t",
      "label": "Named NeoFuse Three-Transistor Architecture",
      "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
      "kind": "Officially Reposted Executive Interview",
      "date": "2024-12-09",
      "locator": "NeoFuse: patented 3T design and regulating transistor",
      "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
    },
    {
      "id": "ip-neofuse-pat",
      "label": "Related Three-Transistor Antifuse Patent",
      "url": "https://patents.google.com/patent/US20250024668A1/en",
      "kind": "Public Patent",
      "date": "2025-01-16",
      "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
      "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
    },
    {
      "id": "ip-neofuse-9v-2016",
      "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
      "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
      "kind": "Primary Technical Source",
      "date": "2016-01-14",
      "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
      "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
    },
    {
      "id": "ip-kilopass-xpm-2007",
      "url": "https://patents.google.com/patent/WO2007090089A2/en",
      "date": "2007-08-09",
      "accessedAt": "2026-09-10",
      "kind": "Public Patent",
      "label": "Historical Kilopass XPM 2T Patent Diagram",
      "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
      "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
    },
    {
      "id": "ip-kilopass-2t-2012",
      "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
      "date": "2012-05-15",
      "accessedAt": "2026-09-10",
      "kind": "Republished Vendor Announcement",
      "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
      "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
      "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
    },
    {
      "id": "ip-lineage-kilopass-2018",
      "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
      "date": "2018-01-10",
      "accessedAt": "2026-09-10",
      "kind": "Official Acquisition Announcement",
      "label": "Synopsys Acquisition of Kilopass",
      "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
      "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
    },
    {
      "id": "ip-synopsys-otp-current",
      "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official Technical Article",
      "label": "Synopsys OTP NVM 1T/2T Portfolio",
      "locator": "Synopsys OTP NVM IP Solutions",
      "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
    },
    {
      "id": "ip-synopsys-advanced-otp",
      "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official Technical Article",
      "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
      "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
      "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
    },
    {
      "id": "ip-sidense-cell-2007",
      "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
      "date": "2007-12-18",
      "accessedAt": "2026-09-10",
      "kind": "Original-Author Technical Article",
      "label": "Sidense 1T-Fuse Original-Author Cell Section",
      "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
      "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
    },
    {
      "id": "ip-sidense-irreversible-2017",
      "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
      "date": "2017-09-05",
      "accessedAt": "2026-09-10",
      "kind": "Original-Author Technical Article",
      "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
      "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
      "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
    },
    {
      "id": "ip-sidense-patent-2006",
      "url": "https://patents.google.com/patent/US20060244099A1/en",
      "date": "2006-11-02",
      "accessedAt": "2026-09-10",
      "kind": "Public Patent",
      "label": "Historical Sidense Split-Channel Antifuse Patent",
      "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
      "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
    },
    {
      "id": "ip-lineage-sidense-2017",
      "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
      "date": "2017-10-17",
      "accessedAt": "2026-09-10",
      "kind": "Official Acquisition Announcement",
      "label": "Synopsys Acquisition of Sidense",
      "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
      "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
    },
    {
      "id": "ip-cfx-otpip",
      "label": "Chuangfeixin OTP IP",
      "url": "https://www.chuangfeixin.com/otpip",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "CMOS-compatible OTP IP product line.",
      "limit": "The page does not lock a single physics mechanism."
    },
    {
      "id": "ip-cfx-news-routes",
      "label": "CFX: Three OTP Routes",
      "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
      "kind": "vendor",
      "date": "2026-04-09",
      "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
      "limit": "Do not collapse the three routes into one bit cell."
    },
    {
      "id": "ip-cfx-semiiphub",
      "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
      "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
      "kind": "catalog",
      "date": "2026-09-16",
      "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
      "limit": "The catalog description does not cover every CFX OTP SKU."
    },
    {
      "id": "ip-attop-home",
      "label": "Attopsemi Home",
      "url": "https://www.attopsemi.com/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
      "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
    },
    {
      "id": "ip-attop-ifuse",
      "label": "Attopsemi I-fuse Technology",
      "url": "https://www.attopsemi.com/ifuse-technology/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
      "limit": "No public fuse cross-section dimensions or program current table."
    },
    {
      "id": "ip-floadia-za",
      "label": "Floadia LEE Fuse ZA",
      "url": "https://floadia.com/product/lee-fuse-za/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
      "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
    },
    {
      "id": "ip-neoee",
      "label": "NeoEE Technical Principles",
      "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
      "kind": "Primary Technical Source",
      "date": "Undated; checked 2026-09-10",
      "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
      "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
    },
    {
      "id": "ip-neoee-history",
      "label": "Historical NeoEE Conceptual Cell",
      "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
      "kind": "Primary Technical Source",
      "date": "2010-10-19",
      "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
      "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
    },
    {
      "id": "ip-neomtp",
      "label": "NeoMTP Technical Principles",
      "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
      "kind": "Primary Technical Source",
      "date": "Undated; checked 2026-09-10",
      "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
      "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
    },
    {
      "id": "ip-neomtp-pat",
      "label": "Related pMOS and Edge-Erase-Gate Patent",
      "url": "https://patents.google.com/patent/US20030235082A1/en",
      "kind": "Public Patent",
      "date": "2003-12-25",
      "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
      "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
    },
    {
      "id": "ymc-product",
      "label": "YMC: Logic-Process ymtp MTP IP",
      "url": "https://www.ymc.com.tw/index_en.php",
      "kind": "Manufacturer Information",
      "date": "Undated; accessed 2026-09-10",
      "locator": "About YMC paragraph",
      "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
    },
    {
      "id": "ymc-1t1c",
      "label": "YMC: 1T1C Core Technology",
      "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
      "kind": "Manufacturer Information",
      "date": "2024; accessed 2026-09-10",
      "locator": "Pre-listing business presentation, page 25",
      "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
    },
    {
      "id": "ymc-pat-7423903",
      "label": "YMC: Historical Single-Floating-Gate Example",
      "url": "https://patents.google.com/patent/US7423903B2/en",
      "kind": "Public Patent",
      "date": "2008-09-09; accessed 2026-09-10",
      "locator": "Figures 1, 2A and 2B; first embodiment; FN erase in Summary",
      "limit": "Four-terminal nMOS/N-type capacitor example; its stated FN erase is not evidence for BBHH."
    },
    {
      "id": "ymc-pat-dahhi",
      "label": "YMC: DAHCI Program and DAHHI Erase Variant",
      "url": "https://patents.google.com/patent/US20070158733A1/en",
      "kind": "Public Patent",
      "date": "2007-07-12; accessed 2026-09-10",
      "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
      "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
    },
    {
      "id": "physics-bbhh-fg",
      "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
      "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
      "kind": "Original Research",
      "date": "2007; accessed 2026-09-10",
      "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
      "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
    },
    {
      "id": "physics-btbt-carriers",
      "label": "Chu and Wu: BTBT Hot-Carrier Paths",
      "url": "https://ir.lib.nycu.edu.tw/bitstream/11536/30685/1/000085620800010.pdf",
      "kind": "Original Research",
      "date": "2000-03; accessed 2026-09-10",
      "locator": "IEEE EDL 21(3), page 123 Introduction; page 125 Figure 4; DOI 10.1109/55.823576",
      "limit": "Supports silicon BBT carrier generation and field-assisted injection; Figure 3 is pMOS and is not copied into the nMOS model."
    },
    {
      "id": "physics-fg-hole-erase",
      "label": "IEEE: Hot-Hole Injection into a Floating Gate",
      "url": "https://ieeexplore.ieee.org/document/748914/",
      "kind": "Original Research",
      "date": "1999-03; accessed 2026-09-10",
      "locator": "IEEE EDL 20(3), pages 140–142; abstract; DOI 10.1109/55.748914",
      "limit": "Observes BBT/possible avalanche enhancement during FN erase; used only for floating-gate hot-hole physics, not a pure-BBHH recipe."
    },
    {
      "id": "aeon-impinj-2007",
      "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
      "date": "2007-09-26",
      "label": "Impinj AEON/MTP Floating-Gate Announcement",
      "kind": "Company product announcement",
      "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
      "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
    },
    {
      "id": "aeon-virage-fn-2009",
      "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
      "date": "2009-06-30",
      "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
      "kind": "Company-authored technical article",
      "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
      "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
    },
    {
      "id": "ip-actt-envm",
      "label": "Actt eNVM Product Page",
      "url": "https://www.analogcircuit.cn/product/envm.html",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
      "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
    },
    {
      "id": "ip-actt-andes-cmt",
      "label": "Andes: Actt Acquired CMT",
      "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
      "kind": "news",
      "date": "2016-08-30",
      "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
      "limit": "CMT is a lineage name, not a current public SKU."
    },
    {
      "id": "ip-nscore-products",
      "label": "NSCore Products",
      "url": "https://www.nscore.com/products/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
      "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
    },
    {
      "id": "ip-nscore-twinbit-g2",
      "label": "NSCore TwinBit Gen-2",
      "url": "https://www.nscore.com/twinbit_g2.html",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
      "limit": "No public bias table or junction dimensions."
    },
    {
      "id": "ip-floadia-zt",
      "label": "Floadia LEE Flash ZT",
      "url": "https://floadia.com/product/lee-flash-zt/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
      "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
    },
    {
      "id": "ip-floadia-zt-news",
      "label": "Floadia ZT News: Floating Gate",
      "url": "https://floadia.com/news/422/",
      "kind": "vendor",
      "date": "2024-12-09",
      "locator": "ZT uses a floating gate as the storage node.",
      "limit": "The news item does not give poly count or well structure."
    },
    {
      "id": "ip-floadia-g1",
      "label": "Floadia LEE Flash G1",
      "url": "https://floadia.com/product/lee-flash-g1/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
      "limit": "No public nitride thickness or bias table."
    },
    {
      "id": "ip-floadia-g2",
      "label": "Floadia LEE Flash G2",
      "url": "https://floadia.com/product/lee-flash-g2/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
      "limit": "An in-development note is not a production guarantee."
    },
    {
      "id": "ip-sst-home",
      "label": "SST Home and Services",
      "url": "https://www.sst.com/services/",
      "kind": "vendor",
      "date": "2026-09-16",
      "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
      "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
    },
    {
      "id": "ip-sst-superflash",
      "label": "SST / Microchip SuperFlash Brochure DS00001425F",
      "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
      "kind": "vendor",
      "date": "2018-03",
      "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
      "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
    },
    {
      "id": "ip-numem-current",
      "label": "Numem: Public MRAM IP Positioning",
      "url": "https://www.numem.com/",
      "kind": "Manufacturer product page",
      "date": null,
      "accessedAt": "2026-09-10",
      "locator": "What is Numem MRAM?; Numem MRAM IP",
      "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
    },
    {
      "id": "ip-numem-2019",
      "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
      "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
      "kind": "Manufacturer public conference presentation",
      "date": "2019-08-05",
      "accessedAt": "2026-09-10",
      "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
      "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
    },
    {
      "id": "ip-stt-physics",
      "label": "Everspin: STT Family Physics",
      "url": "https://www.everspin.com/stt-mram-technology",
      "kind": "Manufacturer mechanism explanation",
      "date": null,
      "accessedAt": "2026-09-10",
      "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
      "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
    },
    {
      "id": "ip-gf-platform",
      "label": "GF: 22FDX Embedded MRAM Platform",
      "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
      "kind": "Original foundry announcement",
      "date": "2020-02-27",
      "accessedAt": "2026-09-10",
      "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
      "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
    },
    {
      "id": "ip-gf-cell-2024",
      "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
      "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
      "kind": "Original research paper",
      "date": "2024-09-18",
      "accessedAt": "2026-09-10",
      "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
      "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
    },
    {
      "id": "ip-weebit-product",
      "label": "Weebit: Embedded ReRAM IP",
      "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
      "kind": "Manufacturer IP product page",
      "date": null,
      "accessedAt": "2026-09-10",
      "locator": "IP module, design deliverables, control, and analog periphery",
      "limit": "Product identity does not imply every foundry node uses the same published research recipe."
    },
    {
      "id": "ip-weebit-bitcell",
      "label": "Weebit: ReRAM Bitcell",
      "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
      "kind": "Manufacturer mechanism explanation",
      "date": null,
      "accessedAt": "2026-09-10",
      "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
      "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
    },
    {
      "id": "ip-weebit-cell-2021",
      "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
      "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
      "kind": "Author-posted original research paper",
      "date": "2021-05",
      "accessedAt": "2026-09-10",
      "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
      "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
    },
    {
      "id": "ip-crossbar-macro",
      "label": "Crossbar: High-Performance ReRAM IP Brief",
      "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
      "kind": "Manufacturer public product brief",
      "date": null,
      "accessedAt": "2026-09-10",
      "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
      "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
    },
    {
      "id": "ip-crossbar-2015",
      "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
      "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
      "kind": "Manufacturer public conference presentation",
      "date": "2015",
      "accessedAt": "2026-09-10",
      "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
      "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
    },
    {
      "id": "ip-crossbar-cell-2012",
      "label": "Crossbar: Published Patent Application US20120007035A1",
      "url": "https://patents.google.com/patent/US20120007035A1/en",
      "kind": "Original published patent application",
      "date": "2012-01-12",
      "accessedAt": "2026-09-10",
      "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
      "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
    },
    {
      "id": "aeon-transfer-2008",
      "url": "https://www.sec.gov/Archives/edgar/data/1050776/000119312508145768/d8k.htm",
      "date": "2008-06-26",
      "label": "Virage Logic Filing on the Impinj NVM IP Business",
      "kind": "Original SEC filing",
      "locator": "Item 2.01; signed 2008-07-02; transaction 2008-06-26",
      "limit": "Supports acquisition of the logic NVM IP business assets by Virage Logic, not a direct Synopsys acquisition of Impinj."
    },
    {
      "id": "aeon-transfer-2010",
      "url": "https://news.synopsys.com/home?item=123195",
      "date": "2010-09-02",
      "label": "Synopsys Completes the Virage Logic Acquisition",
      "kind": "Company completion announcement",
      "locator": "Opening completion paragraph and added NVM portfolio",
      "limit": "Supports corporate acquisition and portfolio succession, not identical AEON internal cells across generations."
    },
    {
      "id": "aeon-synopsys-2013",
      "url": "https://news.synopsys.com/2013-11-20-Synopsys-New-Ultra-Low-Power-Non-Volatile-Memory-IP-Cuts-Power-by-90-Percent-and-Size-in-Half",
      "date": "2013-11-20",
      "label": "Synopsys DesignWare AEON MTP ULP Announcement",
      "kind": "Company product announcement",
      "locator": "Highlights, opening paragraph and Availability",
      "limit": "Explicitly continues AEON branding with MTP ULP. Performance comparisons are not used; branding does not establish a cell netlist."
    },
    {
      "id": "aeon-synopsys-current",
      "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-rfid.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "label": "Synopsys Current MTP ULP NVM Product Page",
      "kind": "Current company product page",
      "locator": "Overview and Highlights; checked 2026-09-10",
      "limit": "Publishes single-poly, floating-gate and zero-mask-adder positioning. The page uses MTP ULP naming; this does not prove all current MTP shares the 2009 AEON cell."
    },
    {
      "id": "RES-UMC-RRAM-2023",
      "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20230328",
      "date": "2023-03-28",
      "label": "UMC / eMemory: 22nm RRAM Qualification",
      "claim": "22nm ULP RRAM IP qualified at 8Mb plus 16Kb; a 16Mb automotive version remained in development.",
      "limit": "Qualification applies to the announced version, not shipments by every customer.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-UMC-MRAM-2018",
      "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20180806",
      "date": "2018-08-06",
      "label": "UMC / Avalanche: MRAM Development Agreement",
      "claim": "Joint MRAM development initially based on 28nm CMOS.",
      "limit": "A development agreement does not establish embedded-macro production.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-UMC-MRAM-2022",
      "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20220913",
      "date": "2022-09-13",
      "label": "UMC / Avalanche: 22nm P-SRAM Availability",
      "claim": "Third-generation standalone pMTJ STT-MRAM products announced as immediately available.",
      "limit": "Standalone specifications are not specifications for a general embedded IP offering.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-FARADAY-RRAM-2025",
      "url": "https://www.faraday-tech.com/html/News/pressRelease/CHI_01_0441.jsp",
      "date": "2025-06-10",
      "label": "Faraday: FlashKit-22RRAM Silicon Validation",
      "claim": "A UMC 22ULP SoC development platform has been validated in silicon.",
      "limit": "Platform validation does not establish a named customer shipment volume.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-UMC-ENVMPAGE",
      "url": "https://www.umc.com/en/Product/technologies/Detail/envm",
      "date": null,
      "label": "UMC: eNVM Platform Table",
      "claim": "The product table lists 22uLP/uLL RRAM.",
      "limit": "Undated page; SRAM area entries are not RRAM bitcell areas.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-UMC-INFINEON-2023",
      "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20230307",
      "date": "2023-03-07",
      "label": "UMC / Infineon: 40nm Automotive MCU Agreement",
      "claim": "Infineon proprietary eNVM is used at Singapore Fab 12i.",
      "limit": "The announcement does not identify RRAM, MRAM, or the memory material.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-PANASONIC-UMC-2017",
      "url": "https://news.panasonic.com/global/press/en170201-3",
      "date": "2017-02-01",
      "label": "Panasonic / UMC: 40nm ReRAM Collaboration",
      "claim": "180nm ReRAM had been produced since 2013; 40nm samples were planned for 2018.",
      "limit": "A forward-looking sampling plan does not establish completion.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-PANASONIC-SSDM-2018",
      "url": "https://confit.atlas.jp/guide/event-img/ssdm2018/B-1-01/public/pdf_archive?type=in",
      "date": "2018",
      "label": "Panasonic: 40nm ReRAM Mechanism and Reliability",
      "claim": "An 8Mbit test macro and a tantalum-oxide filament mechanism.",
      "limit": "100k-cycle endurance and retention after 10k cycles are distinct conditions.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-FUJITSU-RERAM-2019",
      "url": "https://info.archives.global.fujitsu/tw/about/resources/news/press-releases/2019/fep-0812.html",
      "date": "2019-08-12",
      "label": "Fujitsu / Panasonic: 8Mbit ReRAM Product",
      "claim": "MB85AS8MT is a named SPI ReRAM product with joint development and planned availability announced.",
      "limit": "This announcement does not identify the process node or foundry.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-IBM-14NM-2020",
      "url": "https://research.ibm.com/publications/a-14-nm-embedded-stt-mram-cmos-technology",
      "date": "2020-12-12",
      "label": "IBM: 14nm CMOS Embedded STT-MRAM",
      "claim": "Demonstrates 14nm CMOS integration and writing down to 4ns.",
      "limit": "An integration demonstration, not a public PDK or foundry-production announcement.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-IBM-11NM-2017",
      "url": "https://research.ibm.com/publications/low-current-spin-transfer-torque-mram--1",
      "date": "2017-06-05",
      "label": "IBM: Low-Current 11nm MTJ Research",
      "claim": "An 11nm MTJ with 10ns pulses, 8μA and WER of 10⁻⁹.",
      "limit": "11nm describes the MTJ size, not a CMOS node.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-IBM-ALLOY-2024",
      "url": "https://research.ibm.com/publications/first-demonstration-of-high-retention-energy-barriers-and-2-ns-switching-using-magnetic-ordered-alloy-based-stt-mram-devices",
      "date": "2024-06-16",
      "label": "IBM: Ordered-Alloy Free-Layer Research",
      "claim": "A strongly perpendicular free layer demonstrates a high energy barrier and 2ns operation.",
      "limit": "No node, array capacity or production qualification is stated; an energy barrier is not an unconditional retention guarantee.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-IBM-REVIEW-2024",
      "url": "https://research.ibm.com/publications/spin-transfer-torque-magnetoresistive-random-access-memory-technology-status-and-future-directions",
      "date": "2024-11-06",
      "label": "IBM Authors: STT-MRAM Status and Directions",
      "claim": "Distinguishes standalone, embedded, working-memory and last-level-cache requirements.",
      "limit": "Commercial technology categories in a review do not establish IBM product availability.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-ITRI-SOT-2022",
      "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=01_content&MGID=111061510283488782&MmmID=1036276263153520257&SiteID=1",
      "date": "2022-06-15",
      "label": "ITRI: SOT and Cryogenic STT Collaborations",
      "claim": "SOT with TSMC and cryogenic STT with NYCU are separate collaborations.",
      "limit": "The release omits full error-rate, node and retention-temperature conditions.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-ITRI-CIM-2024",
      "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=01_content&MGID=113011710184808020&MmmID=1036276263153520257&SiteID=1",
      "date": "2024-01-17",
      "label": "ITRI / TSMC: IEDM 2023 SOT-CIM",
      "claim": "10ns SOT devices and compute-in-memory; the release claims 1% of a compared STT product power.",
      "limit": "The comparison workload is not fully disclosed; this is not a universal 100× SOT advantage.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-SOT-BETAW-2025",
      "url": "https://www.nature.com/articles/s41928-025-01434-x",
      "date": "2025-09-02",
      "label": "Joint Research: β-W 64kb SOT-MRAM",
      "claim": "Co insertion improves β-W thermal stability in a 64kb research memory.",
      "limit": "Public abstract and author information reviewed; annealing is not operating temperature and does not establish production.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-ITRI-SERVICE",
      "url": "https://www.itri.org.tw/english/ListStyle.aspx?DisplayStyle=01_content&MGID=1126511563713777471&MmmID=1071732317047353240&SiteID=1",
      "date": null,
      "label": "ITRI: 8-Inch MRAM Development Services",
      "claim": "Provides MRAM development, prototyping and preliminary trial production.",
      "limit": "8 inches is wafer size, not a node; these services do not imply high-volume production.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-ITRI-RRAM",
      "url": "https://www.itri.org.tw/ListStyle.aspx?DisplayStyle=13_content&MmmID=1036233405427625204&SiteID=1&Trt_idx=4557",
      "date": null,
      "label": "ITRI: 1S1R 3D RRAM Technology Transfer",
      "claim": "A transfer listing for cross-point arrays, bidirectional selectors and device measurements.",
      "limit": "Undated and without current production evidence; this older listing does not describe the entire ReRAM market today.",
      "locator": "Main text / abstract",
      "kind": "Official primary source / author research",
      "evidence": "Main text or public abstract reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "everspin-toggle",
      "label": "Everspin Toggle MRAM · Toggle MRAM",
      "url": "https://www.everspin.com/persyst?page=2",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The current PERSYST catalog lists Toggle production parts. MR3A16ACYS35 is marked MP and specifies 8Mb, asynchronous x16, 35ns, 3.3V and −40 to 85°C.",
      "limit": "These values belong only to MR3A16ACYS35. Do not mix speed, temperature or automotive ratings across parts. The old MR4A16B datasheet is inaccessible, so its over-20-year retention is not cited."
    },
    {
      "id": "everspin-1gb-ddr",
      "label": "Everspin 1Gb STT-MRAM · STT-MRAM / DDR4-derived",
      "url": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/mram-20251231.htm",
      "date": "2026-03-04",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2025 Form 10-K confirms continuing 1Gb STT-MRAM shipments. The technology page identifies a DDR4-like persistent-DRAM product for enterprise storage.",
      "limit": "DDR4-like does not imply drop-in compatibility with every DDR4 controller. Do not transfer Toggle or xSPI retention, endurance or automotive ratings. The old family URL is now 404."
    },
    {
      "id": "everspin-xspi",
      "label": "Everspin EMxxLX xSPI · STT-MRAM / xSPI",
      "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
      "date": "2026-03-05",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The March 5, 2026 investor release confirms HR 64Mb xSPI STT-MRAM completed AEC-Q100 Grade 1 production qualification and is orderable with distributor inventory. HR 128Mb qualification was expected in May and 256Mb in July, with 256Mb volume availability expected in the second half of 2026.",
      "limit": "The 128Mb and 256Mb dates were forecasts as of March 5, 2026; subsequent completion was not verified. HR qualification does not transfer to other EMxxLX variants. This release does not specify bandwidth or retention."
    },
    {
      "id": "avalanche-umc22",
      "label": "Avalanche Technology / UMC · pMTJ STT-MRAM",
      "url": "https://www.umc.com/en/News/press_release/Content/technology_related/20220913",
      "date": "2022-09-13",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The September 13, 2022 release announces immediate availability of Gen 3 P-SRAM on UMC 22nm. The cited parallel x32 product specifies over 10^14 writes and 1,000-year retention at 85°C.",
      "limit": "This is a discrete product, not proof of identical specifications for general UMC embedded macros. Retention is a supplier reliability specification."
    },
    {
      "id": "avalanche-scaling2026",
      "label": "Avalanche Technology · STT-MRAM",
      "url": "https://www.avalanche-technology.com/avalanche-technology-phase-one-magnetic-cell-scaling-space-grade-mram-us-government/",
      "date": "2026-03-02",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2026 web announcement reports completion of a first-phase MTJ scaling milestone for future higher-density space-grade MRAM.",
      "limit": "The page is dated March 2, 2026, but the body says March 2, 2025. A 16x density increase is a future goal, not a shipped product."
    },
    {
      "id": "samsung-emram",
      "label": "Samsung Foundry · STT-MRAM / eMRAM",
      "url": "https://semiconductor.samsung.com/foundry/process-technology/specialty-technology/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The current specialty-process page confirms 28nm FD-SOI eMRAM mass production since 2019 and expansion to 14LPU and 8LPU, with 5nm still planned.",
      "limit": "Platform expansion does not establish named high-volume customers at every node. Earlier roadmap dates are not completion evidence."
    },
    {
      "id": "intel-22ffl-research",
      "label": "Intel · STT-MRAM",
      "url": "https://ieee-iedm.org/wp-content/uploads/2026/05/2018-IEDM-Archive.pdf",
      "date": "2018-12-04",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official IEDM 2018 program lists Intel-authored work on MRAM embedded in 22FFL FinFET, establishing primary evidence of process-integration research.",
      "limit": "No newer verified Intel commercial MRAM offering was found in this bounded review. Do not infer availability from the paper or the Intel 16 name."
    },
    {
      "id": "tsmc-16mram2025",
      "label": "TSMC · eMRAM / STT route",
      "url": "https://investor.tsmc.com/sites/ir/annual-report/2025/2025%20Annual%20Report.E.pdf",
      "date": "2025",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2025 annual report confirms qualification and customer availability of second-generation 16nm automotive Grade 1 MRAM. 12nm automotive and 5nm high-speed MRAM remain in development.",
      "limit": "Qualification is not proof of volume shipment of a named MCU. SOT research must remain separate from qualified platforms."
    },
    {
      "id": "tsmc-sot2025",
      "label": "TSMC SOT-MRAM · SOT-MRAM",
      "url": "https://investor.tsmc.com/sites/ir/annual-report/2025/2025%20Annual%20Report.E.pdf",
      "date": "2025-12",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2025 annual report describes an IEDM 2025 Type-C SOT-MRAM demonstration using a circular MTJ with built-in magnetic anisotropy for field-free operation.",
      "limit": "A research demonstration is not a commercial process or a shipping SRAM replacement; 16nm automotive MRAM maturity does not transfer."
    },
    {
      "id": "gf-22fdx",
      "label": "GlobalFoundries · STT-MRAM / 22FDX",
      "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
      "date": "2020-02-27",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The February 27, 2020 announcement confirms production entry of 22FDX eMRAM and 4–48Mb silicon-validated macros, with 100k endurance and 10-year retention across the stated temperature range.",
      "limit": "Grade 1 was a future target in that release. The current FDX page still lists MRAM, but customer-specific qualification requires separate evidence."
    },
    {
      "id": "renesas-ra8-2025",
      "label": "Renesas RA8M2 / RA8D2 · Embedded MRAM",
      "url": "https://www.renesas.com/en/about/newsroom/renesas-adds-two-new-mcu-groups-blazing-fast-ra8-series-1ghz-performance-and-embedded-mram",
      "date": "2025-10-22",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The October 22, 2025 release announces available RA8M2 and RA8D2 MCUs with embedded MRAM, a 1GHz Cortex-M85 and a 250MHz Cortex-M33.",
      "limit": "CPU clock is not native MRAM read speed. Do not transfer 2024 research-macro measurements directly to the RA8 products."
    },
    {
      "id": "st-pcm-boundary",
      "label": "STMicroelectronics · PCM, not established MRAM offering",
      "url": "https://newsroom.st.com/media-center/press-item.html/p4733.html",
      "date": "2025-11-18",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The November 18, 2025 STM32V8 announcement explicitly identifies 18nm FD-SOI and embedded PCM, with Samsung Foundry manufacturing cooperation.",
      "limit": "Samsung cooperation or advanced eNVM does not make this MRAM. Any ST MRAM research requires its own direct source."
    },
    {
      "id": "nxp-s32k5",
      "label": "NXP S32K5 · Embedded MRAM",
      "url": "https://www.nxp.com",
      "date": "2025-10-30",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "NXP announced the 16nm FinFET S32K5 with embedded MRAM on March 11, 2025. Its October 30, 2025 product brief still labels the family preproduction.",
      "limit": "The claimed 15x write advantage is a supplier comparison against embedded flash, not an absolute latency. Announcement is not volume-production evidence."
    },
    {
      "id": "netsol-stt",
      "label": "NETSOL · STT-MRAM",
      "url": "https://netsol.co.kr/wp-content/uploads/2024/03/S3RxxxxR1M_rev1.1.pdf",
      "date": "2024-03",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The March 2024 S3RxxxxR1M datasheet specifies 1–16Mbit STT-MRAM, asynchronous x8/x16 interfaces and an industrial −40 to 85°C range; the website also lists serial products.",
      "limit": "Do not transfer larger densities or process nodes from other series or media reports into this datasheet. Shipment volume is not disclosed."
    },
    {
      "id": "tdk-headway",
      "label": "TDK / Headway · STT-MRAM",
      "url": "https://www.tdk.com/system/files/tdk_investor_day_20250901_en.pdf",
      "date": "2025-09-01",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "TDK lists STT-MRAM among its spintronics technologies in the 2025 investor-day presentation.",
      "limit": "HDD-head production and MTJ expertise do not establish commercial discrete MRAM. No orderable MRAM SKU, PDK or specific foundry commitment was verified."
    },
    {
      "id": "numem-aime",
      "label": "Numem · Foundry-based STT-MRAM",
      "url": "https://numem.com/news",
      "date": "2025-06-10",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Numem describes foundry-based STT-MRAM IP and chips/chiplets enhanced by AIME. Its June 10, 2025 announcement claims production readiness.",
      "limit": "Power and SRAM-class performance are supplier claims without uniform independent benchmarking. This is not evidence of a new magnetic material or named volume shipments."
    },
    {
      "id": "imec-sot",
      "label": "imec · SOT-MRAM",
      "url": "https://www.imec-int.com/en/press/imecs-extremely-scaled-sot-mram-devices-show-record-low-switching-energy-and-virtually",
      "date": "2023-12-13",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "On December 13, 2023 imec reported roughly 50nm critical-dimension SOT devices on 300mm wafers, below 100fJ/bit switching energy and endurance above 10^15 cycles.",
      "limit": "Device switching energy excludes full macro, bus and system overhead. The 50nm dimension is not a 50nm CMOS process-node claim."
    },
    {
      "id": "RRAM-WEEBIT-2026",
      "label": "Weebit Nano · ReRAM",
      "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
      "date": "2026-07-31",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Three customer designs had taped out by July 2026, with a prototype running software.",
      "limit": "First customer product mass production remained a future milestone."
    },
    {
      "id": "RRAM-ONSEMI-2026",
      "label": "onsemi · ReRAM",
      "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
      "date": "2026-07-31",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Weebit reported onsemi ReRAM technology transfer progressing to schedule.",
      "limit": "Licensing or transfer does not establish product mass production."
    },
    {
      "id": "RRAM-TI-2026",
      "label": "Texas Instruments · ReRAM",
      "url": "https://www.weebit-nano.com/news/press-releases/weebit-nano-expands-licensing-agreements-with-key-customers-three-customer-chip-designs-taped-out-to-date/",
      "date": "2026-07-31",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Weebit reported TI ReRAM technology transfer progressing to schedule.",
      "limit": "TI commercial FRAM and this ReRAM transfer are separate technology routes."
    },
    {
      "id": "RRAM-SKYWATER-S130",
      "label": "SkyWater／Weebit Nano · ReRAM",
      "url": "https://www.weebit-nano.com/products/embedded-reram-ip/weebit-reram-nvm-in-skywater-130nm-cmos/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official IP page lists qualified S130 130 nm CMOS ReRAM, available for integration, with two added masks in BEOL.",
      "limit": "IP qualification does not qualify every customer chip or prove its mass production."
    },
    {
      "id": "RRAM-DBHITEK-130",
      "label": "DB HiTek／Weebit Nano · ReRAM",
      "url": "https://www.weebit-nano.com/products/embedded-reram-ip/wbt-dbh-db130lva-reram-rram/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "130 nm BCD ReRAM IP is silicon-proven and qualified, adding two masks; listed specifications include 10K writes and over ten years retention at 125°C.",
      "limit": "100K cycles is an extension option; base BCD volume does not establish ReRAM product shipments."
    },
    {
      "id": "RRAM-TSMC-IOT",
      "label": "TSMC · ReRAM",
      "url": "https://www.tsmc.com/english/dedicatedFoundry/technology/platform_IoT_tech_NVM",
      "date": "2024",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The IoT NVM page lists 40RRAM and 22RRAM in production; 12RRAM entered consumer-grade risk production in 2024, with cells between BEOL metal layers.",
      "limit": "12RRAM risk production is not full production or automotive qualification."
    },
    {
      "id": "RRAM-INFINEON-TC4X",
      "label": "Infineon／TSMC · ReRAM",
      "url": "https://www.infineon.com/technology-news/2022/infatv202211-031",
      "date": "2022-11-25",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2022 announcement describes preparing TSMC RRAM for next-generation AURIX TC4x, supporting bit-wise writes without prior erase.",
      "limit": "This announcement does not prove every TC4x variant uses RRAM or has reached production."
    },
    {
      "id": "CBRAM-GF-RENESAS",
      "label": "GlobalFoundries／Renesas／Dialog · CBRAM",
      "url": "https://gf.com/news-and-events/news/globalfoundries-acquires-renesas-non-volatile-resistive-ram-technology-to-proliferate-iot-and-5g-applications/",
      "date": "2023-02-09",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "GF acquired production-proven CBRAM technology from Renesas in 2023, following a 2020 Dialog license; 22FDX qualification was underway.",
      "limit": "Prior CBRAM production does not establish 22FDX production; the acquirer was GF, not Infineon."
    },
    {
      "id": "RRAM-NUVOTON-M2L31",
      "label": "Nuvoton · ReRAM",
      "url": "https://www.nuvoton.com/products/microcontrollers/arm-cortex-m23-mcus/m2l31-series/index.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The M2L31 family lists an Arm Cortex-M23, 64–512 KB ReRAM and 72 MHz operation; writes do not require a page erase.",
      "limit": "72 MHz is the MCU clock, not cell write latency; density and reliability are part-specific."
    },
    {
      "id": "RRAM-PANASONIC-UMC",
      "label": "Panasonic／UMC · ReRAM",
      "url": "https://news.panasonic.com/global/press/en170201-3",
      "date": "2017-02-01",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2017 agreement combined Panasonic ReRAM with UMC manufacturing to develop a 40 nm mass-production process.",
      "limit": "The development target is not evidence of 2026 availability or the process used by every current Nuvoton part."
    },
    {
      "id": "RRAM-RAMXEED-PRODUCT",
      "label": "RAMXEED · ReRAM",
      "url": "https://www.ramxeed.com/products/reram/reram-products.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The product list marks the MB85AS8MT 8 Mbit SPI ReRAM as mass-produced with one million cycles; the 12 Mbit part requires sales contact.",
      "limit": "Do not transfer the 8 Mbit production status or endurance to the 12 Mbit part."
    },
    {
      "id": "RRAM-CROSSBAR-DARIC",
      "label": "CrossBar · ReRAM",
      "url": "https://crossbar-inc.com/blogs/all/overview-of-crossbar-hardware-reram-and-chip",
      "date": "2026-05-06",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "A 2026 company article describes the 22 nm Daric secure processor integrating ReRAM, computing and cryptography on one die.",
      "limit": "The article does not establish production qualification or independent security certification; avoid blanket immunity claims."
    },
    {
      "id": "XPOINT-MICRON-EXIT",
      "label": "Micron · 3D XPoint",
      "url": "https://investors.micron.com/news/press-release/2021/Micron-Updates-Data-Center-Portfolio-Strategy-to-Address-Growing-Opportunity-for-Memory-and-Storage-Hierarchy-Innovation-03-16-2021/default.aspx",
      "date": "2021-03-16",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Micron announced an immediate end to 3D XPoint development in 2021 and redirected resources toward CXL memory products.",
      "limit": "Ending this route does not end all PCM research; CXL is an interconnect, not a memory-cell mechanism."
    },
    {
      "id": "XPOINT-INTEL-EXIT",
      "label": "Intel · 3D XPoint",
      "url": "https://www.intc.com/filings-reports/all-sec-filings/content/0000050863-23-000006/intc-20221231.htm",
      "date": "2022",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Intel's 2022 annual filing states that the Optane memory business wind-down began in 2022.",
      "limit": "Historical product pages or inventory sales do not establish continuing development or other vendors' PCM exits."
    },
    {
      "id": "PCM-ST-P3E",
      "label": "STMicroelectronics · PCM",
      "url": "https://www.st.com/content/st_com/en/campaigns/stellar-p3e-automotive-mcu-with-npu-accelerator-and-xmemory.html",
      "date": "2026",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2026 Stellar P3E page identifies xMemory PCM, with full automotive qualification and production readiness planned for H2 2026.",
      "limit": "Reaching the planned quarter does not prove completion; P3E timing does not apply to every Stellar part."
    },
    {
      "id": "PCM-IBM-AIMC",
      "label": "IBM Research · PCM",
      "url": "https://research.ibm.com/publications/deep-neural-network-inference-with-a-64-core-in-memory-compute-chip-based-on-phase-change-memory",
      "date": "2023-09-17",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "A 14 nm CMOS research chip with backend PCM integrates 64 256×256 analog cores and digital processing and communication for neural-network inference.",
      "limit": "Analog weight-compute results do not establish a purchasable general-purpose PCM memory or complete-system performance."
    },
    {
      "id": "FERAM-TI-MSP430",
      "label": "Texas Instruments · FeRAM",
      "url": "https://www.ti.com/tool/TIDM-FRAM-EEPROM",
      "date": "2016-12-20",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "An MSP430 reference design emulates EEPROM using embedded FRAM and lists supported MCUs and I2C/SPI host interfaces.",
      "limit": "FRAM is the storage technology; EEPROM emulation is interface behavior, not floating-gate or FeFET construction."
    },
    {
      "id": "FERAM-RAMXEED",
      "label": "RAMXEED · FeRAM",
      "url": "https://www.ramxeed.com/faq/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The FAQ states FeRAM has been mass-produced since 1999 for frequent-write applications; retention must be interpreted at the specified temperature.",
      "limit": "Cycle ratings, interfaces and temperatures are part-specific; FeRAM is not synonymous with all FeFET or FTJ devices."
    },
    {
      "id": "FERAM-INFINEON",
      "label": "Infineon · FeRAM",
      "url": "https://www.infineon.com/products/memories/f-ram-ferroelectric-ram",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Infineon lists serial, parallel and EXCELON F-RAM using PZT ferroelectric films, with family-dependent endurance up to 100 trillion cycles.",
      "limit": "Maximum ratings do not apply to every part; this does not establish HfO2 FeFET or FTJ construction."
    },
    {
      "id": "FERAM-GF-IPMS-2026",
      "label": "GlobalFoundries／Fraunhofer IPMS · FeRAM",
      "url": "https://www.ipms.fraunhofer.de/en/press-media/press/2026/Ferroelectric-memory-storage.html",
      "date": "2026-06-11",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2026 collaboration reports HfO2 ferroelectric FRAM integrated in 22FDX, operating below 1 V with nanosecond switching.",
      "limit": "The announcement lacks orderable parts, a complete qualification report or shipment volumes."
    },
    {
      "id": "FERRO-NAMLAB-2025",
      "label": "NaMLab · FeFET／FTJ",
      "url": "https://www.namlab.com/publications/",
      "date": "2025",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official 2025 publication list includes HZO bilayer FTJ thickness scaling and charge-trapping challenges in CMOS-embedded FeFETs.",
      "limit": "Publication listings establish research participation, not foundry service, PDK availability or mass production."
    },
    {
      "id": "FERRO-FMC",
      "label": "FMC · Ferroelectric Memory",
      "url": "https://www.ferroelectric-memory.com/technology/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The current site proposes DRAM+ persistent modules and CACHE+ persistent chiplets based on ferroelectric technology.",
      "limit": "The current page describes ferroelectric capacitors; it does not establish that DRAM+ or CACHE+ uses a FeFET or FTJ. Product qualification and shipment volumes are not verified."
    },
    {
      "id": "FERRO-IMEC-NDREAD",
      "label": "imec · FeRAM／FeCAP",
      "url": "https://www.imec-int.com/en/articles/non-destructive-readout-mechanism-ferroelectric-capacitors",
      "date": "2023",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Joint work with Georgia Tech demonstrated nondestructive FeCAP reading, reporting over 10^11 read cycles at IEDM 2023.",
      "limit": "Read endurance is not write endurance and does not establish conventional FeRAM behavior or mass production."
    },
    {
      "id": "RRAM-CEA-LETI",
      "label": "CEA-Leti／Weebit Nano · ReRAM",
      "url": "https://www.cea.fr/cea-tech/leti/english/Pages/What's-On/Press%20release/Weebit-Nano-and-CEA-Leti-to-demonstrate-brain-inspired-neuromorphic-demo-.aspx",
      "date": "2019-07-18",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The announcement combines CEA-Leti spiking neural networks with Weebit SiOx ReRAM in a neuromorphic object-recognition demonstration.",
      "limit": "The demonstration is not an orderable complete AI accelerator; transfer and qualification require separate evidence."
    },
    {
      "id": "industry-infineon-sonos",
      "label": "Infineon／Cypress · SONOS eFlash",
      "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official page identifies 2T SONOS, FN program/erase, production nodes and process/design licensing.",
      "limit": "Separate Cypress history from current macros; do not combine family-wide maximum specifications."
    },
    {
      "id": "industry-sst-superflash",
      "label": "SST／Microchip · SuperFlash NOR／eFlash",
      "url": "https://www.sst.com/services/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "SST lists SuperFlash process integration and licensing, complementing standalone NOR coverage.",
      "limit": "Licensing does not establish identical current qualification across nodes; verify each technology generation."
    },
    {
      "id": "industry-st-estm",
      "label": "STMicroelectronics · eSTM eFlash／Page EEPROM",
      "url": "https://www.st.com/content/st_com/en/about/innovation-and-technology/estm.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "ST links 40nm floating-gate eSTM with vertical select transistors to STM32H5 and Page EEPROM implementations.",
      "limit": "Keep eSTM separate from Stellar PCM; it is not the cell used by every ST MCU."
    },
    {
      "id": "industry-renesas-sgmonos",
      "label": "Renesas · SG-MONOS eFlash",
      "url": "https://www.renesas.com/en/about/press-room/renesas-electronics-announces-world-s-first-development-fin-shaped-monos-flash-memory-cells-high",
      "date": "2016-12-07",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2016 announcement identifies production 40nm SG-MONOS MCUs and research on 16/14nm fin-shaped cells.",
      "limit": "This announcement does not prove 16/14nm production; verify current part numbers separately."
    },
    {
      "id": "industry-xfab-xt011",
      "label": "X-FAB · XT011 eFlash／EEPROM",
      "url": "https://www.xfab.com/news/details/article/x-fab-releases-embedded-flash-solution-on-its-110nm-automotive-bcd-on-soi-technology",
      "date": "2024-12-03",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The 2024 announcement identifies embedded Flash and EEPROM on the XT011 110nm BCD-on-SOI platform.",
      "limit": "Keep this separate from the historical 2003 XC06 example; do not assume identical cells."
    },
    {
      "id": "industry-floadia-zt",
      "label": "Floadia · LEE Flash ZT MTP",
      "url": "https://floadia.com/product/lee-flash-zt/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The ZT page describes FN program/erase, zero added masks and named platform production records.",
      "limit": "General and platform-specific endurance figures differ; do not infer universal endurance or polysilicon count."
    },
    {
      "id": "industry-samsung-vnand9",
      "label": "Samsung · Ninth-Generation TLC V-NAND",
      "url": "https://news.samsung.com/global/samsung-electronics-begins-industrys-first-mass-production-of-9th-gen-v-nand",
      "date": "2024-04-23",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Samsung announced mass production of 1Tb TLC ninth-generation V-NAND in April 2024.",
      "limit": "Evidence concerns this TLC generation; later demonstrations and projected QLC timing are separate."
    },
    {
      "id": "industry-skhynix-321tlc",
      "label": "SK hynix · 321-Layer TLC 4D NAND",
      "url": "https://news.skhynix.com/en/sk-hynix-starts-mass-production-of-world-first-321-high-nand/",
      "date": "2024-11-21",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "SK hynix announced the start of 321-layer 1Tb TLC NAND mass production in November 2024.",
      "limit": "Separate production from customer delivery; do not assign this die to every Solidigm SSD."
    },
    {
      "id": "industry-solidigm-p5336",
      "label": "Solidigm · D5-P5336 QLC SSD",
      "url": "https://www.solidigm.com/products/data-center/d5/p5336.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official D5-P5336 page identifies a commercial enterprise QLC SSD family and capacity options.",
      "limit": "SSD capacity and system metrics are not die specifications; corporate relationships do not establish common NAND."
    },
    {
      "id": "industry-micron-g9",
      "label": "Micron · G9 TLC NAND",
      "url": "https://investors.micron.com/news/press-release/2024/Micron-Announces-Volume-Production-of-Ninth-Generation-NAND-Flash-Technology-07-30-2024/default.aspx",
      "date": "2024-07-30",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The July 2024 release reports G9 TLC NAND and volume shipment of the Micron 2650 SSD using it.",
      "limit": "Do not extend TLC evidence to every QLC or NOR product; interface speed is not cell programming speed."
    },
    {
      "id": "industry-kioxia-sandisk-gen10",
      "label": "Kioxia／Sandisk · Tenth-Generation BiCS 3D NAND",
      "url": "https://www.kioxia.com/en-jp/about/news/2026/20260703-2.html",
      "date": "2026-07-03",
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The July 2026 joint announcement states that tenth-generation 3D Flash production began at Kitakami K2.",
      "limit": "Production start does not establish universal customer availability or identical finished products."
    },
    {
      "id": "industry-ymtc-xtacking",
      "label": "YMTC · Xtacking 3D NAND",
      "url": "https://www.ymtc.com/en/technicalintroduction.html",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official page explains separate peripheral/array wafers joined by bonding and names Xtacking 4.0 X4 products in 2025.",
      "limit": "Awards and architecture descriptions alone do not prove each product's volume, layer count or shipment status."
    },
    {
      "id": "industry-macronix-nor",
      "label": "Macronix · Serial NOR／OctaBus",
      "url": "https://www.macronix.com/en-us/products/NOR-Flash/Serial-NOR-Flash/Pages/default.aspx",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "Macronix's official Serial NOR page provides its product portfolio and OctaBus interface offerings.",
      "limit": "This source directly supports NOR; verify NAND parts separately and do not infer cell geometry from interfaces."
    },
    {
      "id": "industry-winbond-w25q",
      "label": "Winbond · W25Q16JW Serial NOR",
      "url": "https://www.winbond.com/hq/new-online-purchasing-guide/?__locale=en&pLine=/product/code-storage-flash/qspi-nor/&pNo=W25Q16JW",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official catalog identifies W25Q16JW Serial NOR and associated ordering entries.",
      "limit": "Catalog presence does not guarantee stock; verify NAND families and other capacities separately."
    },
    {
      "id": "industry-gigadevice-flash",
      "label": "GigaDevice · GD25／GD55 NOR；GD5F NAND",
      "url": "https://www.gigadevice.com/product/flash",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official primary source",
      "locator": "Product, technology or announcement text",
      "claim": "The official portfolio identifies GD25/GD55 SPI NOR and GD5F SPI/parallel NAND.",
      "limit": "Family coverage does not replace part-specific production status, temperature, endurance or retention specifications."
    },
    {
      "id": "everspin-ddr-technology",
      "label": "Current official explanation of 1Gb DDR4-like persistent DRAM and separate xSPI STT products.",
      "url": "https://www.everspin.com/stt-mram-technology",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "gf-current-fdx",
      "label": "Current FDX platform page continues to list MRAM.",
      "url": "https://gf.com/technologies/cmos/fdx-fd-soi/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "headway-author-research",
      "label": "Headway-authored embedded STT-MRAM research presentation; not commercial supply evidence.",
      "url": "https://www.cea.fr/cea-tech/leti/Documents/%C3%A9v%C3%A9nements/Prez%20workshop%20memory%202017/2.2.pdf",
      "date": "2017",
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "numem-current",
      "label": "Current site explicitly identifies foundry-based STT-MRAM and AIME.",
      "url": "https://www.numem.com/",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "nxp-launch",
      "label": "S32K5 launch and supplier comparison claims.",
      "url": "https://www.nxp.com",
      "date": "2025-03-11",
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "samsung-history",
      "label": "Historical node schedules must remain separate from current platform evidence.",
      "url": "https://semiconductor.samsung.com/news-events/tech-blog/developing-the-industrys-most-energy-efficient-next-generation-mram-selected-as-iedm-highlight-paper/",
      "date": "2023",
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "everspin-persyst-catalog",
      "label": "Current official catalog lists MR3A16ACYS35 as MP, 8Mb, x16, 35ns, 3.3V and −40 to 85°C.",
      "url": "https://www.everspin.com/persyst?page=2",
      "date": null,
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "everspin-2025-10k",
      "label": "The annual filing confirms continuing 1Gb STT-MRAM shipments; its March 4 filing date is explicitly stated in the March 5 official release.",
      "url": "https://www.sec.gov/Archives/edgar/data/1438423/000162828026014733/mram-20251231.htm",
      "date": "2026-03-04",
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "everspin-hr-xspi-20260305",
      "label": "Original official release: HR 64Mb qualified and orderable; HR 128/256Mb qualification and volume dates remain forecasts.",
      "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-advances-high-reliability-xspi-mram-portfolio-256mb",
      "date": "2026-03-05",
      "accessedAt": "2026-09-10",
      "kind": "Official supplementary source",
      "locator": "Main text / relevant specification",
      "limit": "Applies only to the named version and stated conditions."
    },
    {
      "id": "RES-IBM-DSMTJ-2025",
      "url": "https://research.ibm.com/publications/progress-and-gaps-in-double-spin-torque-mtjs-for-last-level-cache-applications",
      "date": "2025-12-06",
      "label": "IBM: Double Spin-Torque MTJs for Cache",
      "claim": "4-kbit research array with 2ns write pulses.",
      "limit": "Research-array demonstration; does not establish production yield or a shipped cache product.",
      "kind": "Official primary source",
      "locator": "Public abstract / main text",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-EVERSPIN-TELEDYNE-2026",
      "url": "https://investor.everspin.com/news-releases/news-release-details/everspin-technologies-and-teledyne-hirel-semiconductors-partner",
      "date": "2026-09-02",
      "label": "Everspin / Teledyne HiRel Partnership",
      "claim": "A partnership begins with 256Mb PERSYST, with Teledyne availability anticipated in Q4 2026.",
      "limit": "A planned partner delivery does not prove completed qualification of every HR SKU.",
      "kind": "Official primary source",
      "locator": "Public abstract / main text",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-SONY-MICRON-2014",
      "url": "https://investors.micron.com/static-files/7ac25c4b-edd0-4482-97ad-267a7263bcf0",
      "date": "2014-06-05",
      "label": "Micron / Sony: Copper ReRAM Research",
      "claim": "Micron announced copper ReRAM work for a 16Gb storage-class-memory demonstration with Sony.",
      "limit": "Historical R&D evidence, not current availability, a Sony sensor design win or production volume.",
      "kind": "Official primary source",
      "locator": "Public abstract / main text",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "MRAM-KIOXIA-SKHYNIX-64GB-2025",
      "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-80.html",
      "date": "2025-04-15",
      "label": "Kioxia／SK hynix · 64 Gbit 1Selector–1MTJ Cross-Point MRAM",
      "claim": "The jointly developed 64 Gbit cross-point MRAM replaces select transistors with two-terminal selectors; MTJ diameter is 20 nm, half-pitch 20.5 nm, and cell area 0.001681 µm².",
      "limit": "This is a research array, not evidence of product availability. The 20 nm figure is MTJ diameter, not a CMOS process node; typical-bit tests do not establish full-array yield.",
      "locator": "Official body; NRAM uses the August 2016 archive entry",
      "kind": "Primary official source",
      "evidence": "Public body or archive entry reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RRAM-TETRAMEM-MLX200-2026",
      "url": "https://tetramem.com/tetramem-completes-mlx200-silicon-validation/",
      "date": "2026-05-19",
      "label": "TetraMem · MLX200 Multi-Level RRAM Analog IMC",
      "claim": "In May 2026, TetraMem reported MLX200 tape-out and initial silicon validation on TSMC 22nm, integrating multi-level RRAM with mixed-signal computing in a SoC.",
      "limit": "Evaluation kits were scheduled for H2 2026 at announcement. Initial validation does not establish mass production or delivery, and computing results are not general-purpose storage specifications.",
      "locator": "Official body; NRAM uses the August 2016 archive entry",
      "kind": "Primary official source",
      "evidence": "Public body or archive entry reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RRAM-INTRINSIC-SURECORE",
      "url": "https://www.intrinsicsemi.com/",
      "date": null,
      "label": "Intrinsic／sureCore · SiOx RRAM",
      "claim": "Intrinsic identifies silicon-oxide RRAM as its core technology and lists a sureCore collaboration combining CMOS-compatible cells, memory architectures and compiler-design expertise.",
      "limit": "The collaboration does not establish qualification or mass production of a named process macro; the site does not provide a complete orderable part and datasheet proving current supply.",
      "locator": "Official body; NRAM uses the August 2016 archive entry",
      "kind": "Primary official source",
      "evidence": "Public body or archive entry reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "NRAM-NANTERO-FUJITSU-2016",
      "url": "https://info.archives.global.fujitsu/global/about/resources/news/press-releases/2016/",
      "date": "2016-08-31",
      "label": "Nantero／Fujitsu Semiconductor／Mie Fujitsu Semiconductor · Carbon-Nanotube NRAM",
      "claim": "Fujitsu's official archive confirms that its two semiconductor businesses licensed Nantero carbon-nanotube NRAM in 2016 and began joint development toward a 55nm product.",
      "limit": "This historical development evidence establishes neither 2026 production and availability nor program termination; NRAM should be classified separately from oxide RRAM.",
      "locator": "Official body; NRAM uses the August 2016 archive entry",
      "kind": "Primary official source",
      "evidence": "Public body or archive entry reviewed",
      "accessedAt": "2026-09-10"
    },
    {
      "id": "RES-PUFSEC-HROT-2025",
      "label": "PUFsecurity: NeoPUF & PUFcc Hardware Root of Trust Technical Whitepaper",
      "url": "https://www.pufsecurity.com/pufcc",
      "kind": "Vendor Official Whitepaper",
      "date": "2025-06",
      "locator": "Architecture and Qualification Sections",
      "claim": "NeoPUF harnesses microscopic gate oxide quantum tunneling variations for zero-mask chip fingerprinting across TSMC and UMC nodes; PUFcc integrates NIST SP 800-90B TRNG, secure OTP, and cryptographic engines with PSA Certified Level 3 and SESIP Level 3 compliance.",
      "evidence": "Verified official whitepaper and architecture briefs",
      "limit": "Applies to named PUFcc/PUFiot architectures; specific macro areas and latencies track process PDK datasheets.",
      "accessedAt": "2026-09-17"
    },
    {
      "id": "RES-TOWER-YFLASH-2024",
      "label": "Tower Semiconductor: Y-Flash 0-Mask Embedded Flash Technology Brief",
      "url": "https://towersemi.com/technology/non-volatile-memory-nvm/",
      "kind": "Foundry Process Platform Document",
      "date": "2024-11",
      "locator": "Power Management & Embedded NVM Section",
      "claim": "Single-poly floating gate; per Tower's public NVM brief and arXiv:2202.10228, program uses channel hot-electron injection (CHE) and erase uses band-to-band-tunneling (BBT) holes — not FN/FN. Zero mask adders integrate with Tower HV BCD/power platforms; public briefs cite 1K–10K endurance and high-temperature retention; name Ta, Tj, and AEC-Q100 qualification per product.",
      "evidence": "Verified foundry technology briefs",
      "limit": "Single-poly cells suit low-to-mid density PMIC/BMS trim; cite CHE/BBT per Tower primary sources, not FN/FN.",
      "accessedAt": "2026-09-17"
    },
    {
      "id": "RES-WEEBIT-RERAM-2025",
      "label": "Weebit Nano: Embedded ReRAM IP and Neuromorphic Computing Whitepaper",
      "url": "https://www.weebit-nano.com/products/embedded-reram-ip/wbt-dbh-db130lva-reram-rram/",
      "locator": "Official technology page and SkyWater / DB HiTek commercial foundry qualification notices",
      "kind": "Supplier technical specification & foundry qualification",
      "date": "2025-06-01",
      "limit": "DB HiTek 130nm qualified IP; SkyWater 130nm and GF 22FDX are platform/evaluation stages — customer production needs named evidence."
    },
    {
      "id": "RES-EVERSPIN-PLP-2025",
      "label": "Everspin Technologies: Enterprise STT-MRAM Write Buffer & Power Loss Protection (PLP) Application Note",
      "url": "https://www.everspin.com/products",
      "locator": "Official enterprise storage accelerator and RAID/SSD power loss protection architecture brief",
      "kind": "Supplier application note",
      "date": "2025-04-15",
      "limit": "Confirms commercial shipment of STT-MRAM for NVMe write journaling and supercap-free PLP architectures; requires dedicated controller or interface bridge."
    },
    {
      "id": "RES-INFINEON-TC4X-2024",
      "label": "Infineon Technologies: AURIX™ TC4x Automotive MCU & TSMC 28nm eRRAM Architecture Manual",
      "url": "https://www.infineon.com/aurix-tc4x",
      "locator": "Official product manual and automotive ASIL-D embedded memory roadmap chapter",
      "kind": "Microcontroller architecture manual",
      "date": "2024-11-20",
      "limit": "Confirms TC4x adoption of TSMC 28nm eRRAM overcoming eFlash scaling limits with 100K cycles and zero-wait random access; specific to flagship automotive MCUs."
    },
    {
      "id": "RES-ST-STELLAR-PCM-2024",
      "label": "STMicroelectronics: Stellar 32-Bit Automotive MCU Embedded Phase-Change Memory (28nm FD-SOI ePCM) Whitepaper",
      "url": "https://www.st.com/content/st_com/en/about/innovation-and-technology/pcm.html",
      "locator": "Official automotive MCU and 28nm FD-SOI embedded PCM architecture release",
      "kind": "Automotive silicon technical whitepaper",
      "date": "2024-09-18",
      "limit": "Confirms 28nm FD-SOI integration of ePCM enabling zero-downtime OTA (dual-bank instant swap) and 165°C retention; phase-change material is Ge2Sb2Te5 (GST)."
    },
    {
      "id": "RES-INTRINSICID-QUIDDIKEY-2025",
      "label": "Intrinsic ID: Quiddikey Silicon Hardware Root of Trust (SRAM PUF + Fuzzy Extractor) Technical Whitepaper",
      "url": "https://www.intrinsic-id.com/products/quiddikey/",
      "locator": "Official SRAM PUF Key Reconstruction & Zero-Factory-Provisioning Architecture Whitepaper",
      "kind": "Security Technical Whitepaper",
      "date": "2025-05-12",
      "limit": "Extracts root keys dynamically from native 6T SRAM power-up mismatch; pairs with public Helper Data (Activation Code) and BCH ECC; zero key material at rest, zero factory provisioning."
    },
    {
      "id": "RES-SYNOPSYS-TROOT-2024",
      "label": "Synopsys: DesignWare tRoot™ Hardware Secure Module (HSM) & 1T AntiFuse Security Subsystem Manual",
      "url": "https://www.synopsys.com/designware-ip/security-ip.html",
      "locator": "Official Hardware Secure Module and Secure Boot Architecture Announcement",
      "kind": "Product Specification Manual",
      "date": "2024-11-20",
      "limit": "Integrates isolated secure RISC-V/ARC processor core, hardware crypto accelerator, TRNG, and 1T Split-Channel AntiFuse OTP; compliant with PSA Certified Level 3."
    },
    {
      "id": "RES-RAMBUS-CRYPTOMANAGER-2025",
      "label": "Rambus: CryptoManager™ Root of Trust & PCIe/CXL SPDM 1.3 Device Attestation Whitepaper",
      "url": "https://www.rambus.com/security/root-of-trust/",
      "locator": "Official PCIe/CXL IDE & Silicon Root of Trust Lifecycle Architecture",
      "kind": "Enterprise Security Whitepaper",
      "date": "2025-02-18",
      "limit": "Hardware acceleration of DMTF SPDM 1.2/1.3 device attestation and line-rate PCIe/CXL IDE (AES-GCM) encryption, bridging Foundry, OSAT, and cloud CSP certificate lifecycles."
    },
    {
      "id": "op-pat-nrom-hhi",
      "label": "Saifun: Self-Aligned NROM Programming and Erasure Areas",
      "url": "https://patents.google.com/patent/US6664588B2/en",
      "kind": "Public Patent",
      "date": "2003; 2026-09-10 accessed",
      "locator": "Figures 4, 8A, 9, and 10–11; band-to-band hole generation and localized hot-hole injection",
      "limit": "The pocket implant and local hole path belong to this example; US5768192A is not used as evidence for this erase path."
    },
    {
      "id": "op-pat-sonos-fn",
      "label": "Cypress: SONOS ONO Stack Scaling",
      "url": "https://patents.google.com/patent/WO2014008160A2/en",
      "kind": "Public Patent",
      "date": "2014; 2026-09-10 accessed",
      "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
      "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
    },
    {
      "id": "op-nand-hole-erase",
      "label": "KIOXIA: Schottky Source Contact and Hole Supply",
      "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-88.html",
      "kind": "Manufacturer Research",
      "date": "2025-09-18; 2026-09-10 accessed",
      "locator": "Figures 1 and 4; GIDL hole supply from an N+ silicon source and the Schottky-contact alternative",
      "limit": "Supports carrier supply and a named study; this diagram uses the conventional GIDL branch without merging in a Schottky source."
    },
    {
      "id": "op-pat-nand-gidl",
      "label": "SanDisk: GIDL-Assisted 3D NAND Erase",
      "url": "https://patents.google.com/patent/US10923196B1/en",
      "kind": "Public Patent",
      "date": "2021; 2026-09-10 accessed",
      "locator": "Figure 8 and GIDL erase description; terminal/select-gate bias difference, hole supply, and charge neutralization",
      "limit": "Uses its own BL/SL and select-gate biases; do not substitute the floating-terminal erase conditions of US7696559B2."
    },
    {
      "id": "op-stt-katine-2000",
      "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
      "url": "https://arxiv.org/abs/cond-mat/9908231",
      "kind": "Original research paper",
      "date": "2000",
      "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
      "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
    },
    {
      "id": "op-vcm-reservoir-2026",
      "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
      "url": "https://www.nature.com/articles/s43246-026-01143-8",
      "kind": "Original research paper",
      "date": "2026-04-06",
      "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
      "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
    },
    {
      "id": "op-pcm-ibm-thermal-2016",
      "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
      "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
      "kind": "Author-institution original paper record",
      "date": "2016-10-25",
      "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
      "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
    }
  ],
  "engineering": {
    "schemaVersion": "1.0",
    "language": "en",
    "operations": [
      {
        "topicId": "efuse",
        "operationId": "write",
        "title": "Program: Concentrate Current in a Controlled Region",
        "summary": "Carriers travel along the conductor, while local current density and Joule heating increase the rate of material migration. US7417300B2 uses a narrowed geometry to control current crowding and address material backflow; US8847350B2 shapes current concentration through via contact placement. The teaching focus is permanent material redistribution and the final resistance distribution, rather than describing every mechanism as metal rupture.",
        "sources": [
          {
            "id": "ch-pat-efuse-poly",
            "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
            "url": "https://patents.google.com/patent/US7417300B2/en",
            "kind": "Patent",
            "date": "Granted 2008-08-26; reviewed 2026-09-10",
            "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
            "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
          },
          {
            "id": "ch-pat-efuse-via",
            "label": "TSMC: Metal Via Fuse Patent US8847350B2",
            "url": "https://patents.google.com/patent/US8847350B2/en",
            "kind": "Patent",
            "date": "Granted 2014-09-30; reviewed 2026-09-10",
            "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
            "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
          },
          {
            "id": "ch-maturity-ibm-efuse",
            "label": "IBM: eFUSE from Memory Redundancy to Autonomic Chips",
            "url": "https://research.ibm.com/publications/electrically-programmable-fuse-efuse-from-memory-redundancy-to-autonomic-chips",
            "kind": "Manufacturer Research Abstract",
            "date": "2007-09-16; reviewed 2026-09-10",
            "locator": "CICC 2007 abstract; IBM implementations and applications from 180 nm to 45 nm",
            "limit": "Establishes historical implementations at an identified company across an identified process range. The abstract does not enumerate product models, shipment volumes, or current platform qualifications; 32 nm and beyond were prospective at the time."
          }
        ],
        "variants": [
          {
            "id": "silicide-poly",
            "title": "Silicide/Polysilicon eFuse",
            "summary": "Electromigration opens a silicide gap at the neck; underlying polysilicon can remain, so high resistance does not imply complete physical separation.",
            "mechanism": "EM",
            "frames": [
              {
                "id": "op-efuse-write-silicide-poly-1-en",
                "title": "Initial Path",
                "caption": "The intact conductor provides a low-resistance path.",
                "state": "R ↓",
                "stimulus": "Unprogrammed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-silicide-poly-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-silicide-poly-1-en-title\">Silicide/Polysilicon eFuse — Initial Path. The intact conductor provides a low-resistance path.</title><defs><marker id=\"op-efuse-write-silicide-poly-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-write-silicide-poly-2-en",
                "title": "Apply Program Conditions",
                "caption": "Current crowds at the constriction, producing local heat and electromigration.",
                "state": "Before transition",
                "stimulus": "I_P → J ↑",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-silicide-poly-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-silicide-poly-2-en-title\">Silicide/Polysilicon eFuse — Apply Program Conditions. Current crowds at the constriction, producing local heat and electromigration.</title><defs><marker id=\"op-efuse-write-silicide-poly-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><path d=\"M302 68H64\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-write-silicide-poly-2-en-current)\"/><text x=\"180\" y=\"58\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_P</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-write-silicide-poly-3-en",
                "title": "Local Permanent Change",
                "caption": "Material migration leaves a local void or gap.",
                "state": "R ↑",
                "stimulus": "Controlled program pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-silicide-poly-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-silicide-poly-3-en-title\">Silicide/Polysilicon eFuse — Local Permanent Change. Material migration leaves a local void or gap.</title><defs><marker id=\"op-efuse-write-silicide-poly-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><path d=\"M179 149H229\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-write-silicide-poly-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"204\" cy=\"149\" r=\"10\" fill=\"#075f9d\"/><text x=\"204\" y=\"156\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"160\" y=\"95\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Void</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-write-silicide-poly-4-en",
                "title": "Verify at Low Field",
                "caption": "After program stress is removed, read current identifies the permanent state.",
                "state": "I_R ↓",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-silicide-poly-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-silicide-poly-4-en-title\">Silicide/Polysilicon eFuse — Verify at Low Field. After program stress is removed, read current identifies the permanent state.</title><defs><marker id=\"op-efuse-write-silicide-poly-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-silicide-poly-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R; I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-poly",
                "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
                "url": "https://patents.google.com/patent/US7417300B2/en",
                "kind": "Patent",
                "date": "Granted 2008-08-26; reviewed 2026-09-10",
                "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
                "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "metal-via",
            "title": "Metal-Via eFuse",
            "summary": "Shows current crowding, local heating, and melt separation near the via; a silicide electromigration path is not substituted.",
            "mechanism": "Joule",
            "frames": [
              {
                "id": "op-efuse-write-metal-via-1-en",
                "title": "Initial Path",
                "caption": "The intact conductor provides a low-resistance path.",
                "state": "R ↓",
                "stimulus": "Unprogrammed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-metal-via-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-metal-via-1-en-title\">Metal-Via eFuse — Initial Path. The intact conductor provides a low-resistance path.</title><defs><marker id=\"op-efuse-write-metal-via-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-write-metal-via-2-en",
                "title": "Apply Program Conditions",
                "caption": "Current crowding generates local heat near the via.",
                "state": "Before transition",
                "stimulus": "I_P → J ↑",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-metal-via-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-metal-via-2-en-title\">Metal-Via eFuse — Apply Program Conditions. Current crowding generates local heat near the via.</title><defs><marker id=\"op-efuse-write-metal-via-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text><path d=\"M122 185H180V128\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-write-metal-via-2-en-current)\"/><text x=\"95\" y=\"121\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_P</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-write-metal-via-3-en",
                "title": "Local Permanent Change",
                "caption": "Material near the via heats, melts, and separates, leaving a high-resistance gap.",
                "state": "R ↑",
                "stimulus": "Controlled program pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-metal-via-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-metal-via-3-en-title\">Metal-Via eFuse — Local Permanent Change. Material near the via heats, melts, and separates, leaving a high-resistance gap.</title><defs><marker id=\"op-efuse-write-metal-via-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><path d=\"M183 124V158\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-write-metal-via-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"183\" cy=\"143\" r=\"10\" fill=\"#075f9d\"/><text x=\"183\" y=\"150\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M216 143q-12 8 0 16t0 16\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"95\" y=\"107\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gap</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-write-metal-via-4-en",
                "title": "Verify at Low Field",
                "caption": "After program stress is removed, read current identifies the permanent state.",
                "state": "I_R ↓",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-write-metal-via-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-write-metal-via-4-en-title\">Metal-Via eFuse — Verify at Low Field. After program stress is removed, read current identifies the permanent state.</title><defs><marker id=\"op-efuse-write-metal-via-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-write-metal-via-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R; I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-via",
                "label": "TSMC: Metal Via Fuse Patent US8847350B2",
                "url": "https://patents.google.com/patent/US8847350B2/en",
                "kind": "Patent",
                "date": "Granted 2014-09-30; reviewed 2026-09-10",
                "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
                "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "efuse",
        "operationId": "erase",
        "title": "Erase: No Reverse Recovery in Normal Operation",
        "summary": "Changing the data encoding or activating spare locations can change the information read by the system, but it does not restore the original fuse material. The number of available updates depends on reserved capacity and the protocol, not on the program/erase endurance of one bit. Test flows must also reserve sacrificial test cells rather than treating irreversible programming as a repeatedly recoverable functional test.",
        "sources": [
          {
            "id": "ch-pat-efuse-poly",
            "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
            "url": "https://patents.google.com/patent/US7417300B2/en",
            "kind": "Patent",
            "date": "Granted 2008-08-26; reviewed 2026-09-10",
            "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
            "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
          },
          {
            "id": "ch-pat-efuse-via",
            "label": "TSMC: Metal Via Fuse Patent US8847350B2",
            "url": "https://patents.google.com/patent/US8847350B2/en",
            "kind": "Patent",
            "date": "Granted 2014-09-30; reviewed 2026-09-10",
            "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
            "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
          },
          {
            "id": "ch-maturity-ibm-efuse",
            "label": "IBM: eFUSE from Memory Redundancy to Autonomic Chips",
            "url": "https://research.ibm.com/publications/electrically-programmable-fuse-efuse-from-memory-redundancy-to-autonomic-chips",
            "kind": "Manufacturer Research Abstract",
            "date": "2007-09-16; reviewed 2026-09-10",
            "locator": "CICC 2007 abstract; IBM implementations and applications from 180 nm to 45 nm",
            "limit": "Establishes historical implementations at an identified company across an identified process range. The abstract does not enumerate product models, shipment volumes, or current platform qualifications; 32 nm and beyond were prospective at the time."
          }
        ],
        "variants": [
          {
            "id": "silicide-poly",
            "title": "Silicide/Polysilicon eFuse",
            "summary": "Electromigration opens a silicide gap at the neck; underlying polysilicon can remain, so high resistance does not imply complete physical separation.",
            "mechanism": "EM",
            "frames": [
              {
                "id": "op-efuse-erase-silicide-poly-1-en",
                "title": "Original Material",
                "caption": "Keep the unprogrammed structure as a reference.",
                "state": "R ↓",
                "stimulus": "No high-field pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-silicide-poly-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-silicide-poly-1-en-title\">Silicide/Polysilicon eFuse — Original Material. Keep the unprogrammed structure as a reference.</title><defs><marker id=\"op-efuse-erase-silicide-poly-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-erase-silicide-poly-2-en",
                "title": "After Permanent Change",
                "caption": "Removing normal power does not restore the original material.",
                "state": "R ↑",
                "stimulus": "Program pulse completed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-silicide-poly-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-silicide-poly-2-en-title\">Silicide/Polysilicon eFuse — After Permanent Change. Removing normal power does not restore the original material.</title><defs><marker id=\"op-efuse-erase-silicide-poly-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-erase-silicide-poly-3-en",
                "title": "Reverse Operation Unavailable",
                "caption": "No qualified electrical erase path exists; read still detects the changed state.",
                "state": "I_R ↓",
                "stimulus": "Reverse bias is not an erase procedure",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-silicide-poly-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-silicide-poly-3-en-title\">Silicide/Polysilicon eFuse — Reverse Operation Unavailable. No qualified electrical erase path exists; read still detects the changed state.</title><defs><marker id=\"op-efuse-erase-silicide-poly-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-silicide-poly-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><circle cx=\"183\" cy=\"75\" r=\"22\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M168.7 89.3l28.6 -28.6\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">No Qualified Reverse</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-poly",
                "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
                "url": "https://patents.google.com/patent/US7417300B2/en",
                "kind": "Patent",
                "date": "Granted 2008-08-26; reviewed 2026-09-10",
                "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
                "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "metal-via",
            "title": "Metal-Via eFuse",
            "summary": "Shows current crowding, local heating, and melt separation near the via; a silicide electromigration path is not substituted.",
            "mechanism": "Joule",
            "frames": [
              {
                "id": "op-efuse-erase-metal-via-1-en",
                "title": "Original Material",
                "caption": "Keep the unprogrammed structure as a reference.",
                "state": "R ↓",
                "stimulus": "No high-field pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-metal-via-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-metal-via-1-en-title\">Metal-Via eFuse — Original Material. Keep the unprogrammed structure as a reference.</title><defs><marker id=\"op-efuse-erase-metal-via-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-erase-metal-via-2-en",
                "title": "After Permanent Change",
                "caption": "Removing normal power does not restore the original material.",
                "state": "R ↑",
                "stimulus": "Program pulse completed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-metal-via-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-metal-via-2-en-title\">Metal-Via eFuse — After Permanent Change. Removing normal power does not restore the original material.</title><defs><marker id=\"op-efuse-erase-metal-via-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-erase-metal-via-3-en",
                "title": "Reverse Operation Unavailable",
                "caption": "No qualified electrical erase path exists; read still detects the changed state.",
                "state": "I_R ↓",
                "stimulus": "Reverse bias is not an erase procedure",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-erase-metal-via-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-erase-metal-via-3-en-title\">Metal-Via eFuse — Reverse Operation Unavailable. No qualified electrical erase path exists; read still detects the changed state.</title><defs><marker id=\"op-efuse-erase-metal-via-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-erase-metal-via-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><circle cx=\"183\" cy=\"75\" r=\"22\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M168.7 89.3l28.6 -28.6\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">No Qualified Reverse</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-via",
                "label": "TSMC: Metal Via Fuse Patent US8847350B2",
                "url": "https://patents.google.com/patent/US8847350B2/en",
                "kind": "Patent",
                "date": "Granted 2014-09-30; reviewed 2026-09-10",
                "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
                "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "efuse",
        "operationId": "read",
        "title": "Read: Measure Resistance Without Reprogramming",
        "summary": "The required guarantee is that the high- and low-resistance distributions remain distinguishable across temperature, process variation, and time in service. Programmed resistance is not infinite, and unprogrammed resistance is not zero; series resistance from the select transistor and wiring affects the result. The readout must therefore be analyzed with its reference path, rather than judging read reliability solely from a gap in a microscope image.",
        "sources": [
          {
            "id": "ch-pat-efuse-poly",
            "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
            "url": "https://patents.google.com/patent/US7417300B2/en",
            "kind": "Patent",
            "date": "Granted 2008-08-26; reviewed 2026-09-10",
            "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
            "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
          },
          {
            "id": "ch-pat-efuse-via",
            "label": "TSMC: Metal Via Fuse Patent US8847350B2",
            "url": "https://patents.google.com/patent/US8847350B2/en",
            "kind": "Patent",
            "date": "Granted 2014-09-30; reviewed 2026-09-10",
            "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
            "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
          },
          {
            "id": "ch-maturity-ibm-efuse",
            "label": "IBM: eFUSE from Memory Redundancy to Autonomic Chips",
            "url": "https://research.ibm.com/publications/electrically-programmable-fuse-efuse-from-memory-redundancy-to-autonomic-chips",
            "kind": "Manufacturer Research Abstract",
            "date": "2007-09-16; reviewed 2026-09-10",
            "locator": "CICC 2007 abstract; IBM implementations and applications from 180 nm to 45 nm",
            "limit": "Establishes historical implementations at an identified company across an identified process range. The abstract does not enumerate product models, shipment volumes, or current platform qualifications; 32 nm and beyond were prospective at the time."
          }
        ],
        "variants": [
          {
            "id": "silicide-poly",
            "title": "Silicide/Polysilicon eFuse",
            "summary": "Electromigration opens a silicide gap at the neck; underlying polysilicon can remain, so high resistance does not imply complete physical separation.",
            "mechanism": "EM",
            "frames": [
              {
                "id": "op-efuse-read-silicide-poly-1-en",
                "title": "Written Material Retained",
                "caption": "Start with permanently changed material; reading does not repair it.",
                "state": "R ↑",
                "stimulus": "Before read bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-silicide-poly-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-silicide-poly-1-en-title\">Silicide/Polysilicon eFuse — Written Material Retained. Start with permanently changed material; reading does not repair it.</title><defs><marker id=\"op-efuse-read-silicide-poly-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-read-silicide-poly-2-en",
                "title": "Apply Low-Field Read",
                "caption": "Observe the existing path under read conditions below program stress.",
                "state": "R ↑",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-silicide-poly-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-silicide-poly-2-en-title\">Silicide/Polysilicon eFuse — Apply Low-Field Read. Observe the existing path under read conditions below program stress.</title><defs><marker id=\"op-efuse-read-silicide-poly-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><path d=\"M302 68H64\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-read-silicide-poly-2-en-current)\"/><text x=\"180\" y=\"58\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-read-silicide-poly-3-en",
                "title": "Measure Existing Conduction",
                "caption": "The gap reduces read current; high resistance does not mean an ideal open circuit.",
                "state": "I_R ↓",
                "stimulus": "Maintain low-field read",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-silicide-poly-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-silicide-poly-3-en-title\">Silicide/Polysilicon eFuse — Measure Existing Conduction. The gap reduces read current; high resistance does not mean an ideal open circuit.</title><defs><marker id=\"op-efuse-read-silicide-poly-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"30\" y=\"165\" width=\"300\" height=\"56\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M38 114H119L144 137H216L241 114H322V177H241L216 156H144L119 177H38Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><path d=\"M47 120H115L144 140H214L245 120H312\" fill=\"none\" stroke=\"#899ba9\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 139H183\" fill=\"none\" stroke=\"#f3e2af\" stroke-width=\"13\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"64\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"296\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"181\" y=\"214\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SiO₂</text><circle cx=\"171\" cy=\"144\" r=\"12\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M163.2 151.8l15.600000000000001 -15.600000000000001\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"160\" y=\"95\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Void</text><text x=\"180\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              },
              {
                "id": "op-efuse-read-silicide-poly-4-en",
                "title": "Compare Initial and Written Branches",
                "caption": "Compare two pre-existing states at equal V_R; reading did not change the material.",
                "state": "Resistance window distinguished",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-silicide-poly-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-silicide-poly-4-en-title\">Silicide/Polysilicon eFuse — Compare Initial and Written Branches. Compare two pre-existing states at equal V_R; reading did not change the material.</title><defs><marker id=\"op-efuse-read-silicide-poly-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-silicide-poly-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M48 42V218H325\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"30\" y=\"41\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R</text><rect x=\"88\" y=\"80\" width=\"67\" height=\"138\" fill=\"#087766\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"168\" width=\"67\" height=\"50\" fill=\"#075f9d\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"120\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Initial</text><text x=\"262\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Written</text><text x=\"187\" y=\"34\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R = const.</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-poly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-poly",
                "label": "IBM: Locally Narrowed Electrical Fuse Patent US7417300B2",
                "url": "https://patents.google.com/patent/US7417300B2/en",
                "kind": "Patent",
                "date": "Granted 2008-08-26; reviewed 2026-09-10",
                "locator": "Figures 3 and 4A; embodiment descriptions of electromigration and material backflow; claim 1",
                "limit": "Supports a specific polysilicon/silicide fuse structure and its engineering problems. A patent embodiment is not a commercial product reliability guarantee, nor does it establish that all eFuses use the same materials or state transition."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "metal-via",
            "title": "Metal-Via eFuse",
            "summary": "Shows current crowding, local heating, and melt separation near the via; a silicide electromigration path is not substituted.",
            "mechanism": "Joule",
            "frames": [
              {
                "id": "op-efuse-read-metal-via-1-en",
                "title": "Written Material Retained",
                "caption": "Start with permanently changed material; reading does not repair it.",
                "state": "R ↑",
                "stimulus": "Before read bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-metal-via-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-metal-via-1-en-title\">Metal-Via eFuse — Written Material Retained. Start with permanently changed material; reading does not repair it.</title><defs><marker id=\"op-efuse-read-metal-via-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-read-metal-via-2-en",
                "title": "Apply Low-Field Read",
                "caption": "Observe the existing path under read conditions below program stress.",
                "state": "R ↑",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-metal-via-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-metal-via-2-en-title\">Metal-Via eFuse — Apply Low-Field Read. Observe the existing path under read conditions below program stress.</title><defs><marker id=\"op-efuse-read-metal-via-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><path d=\"M122 185H180V128\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-efuse-read-metal-via-2-en-current)\"/><text x=\"95\" y=\"121\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-read-metal-via-3-en",
                "title": "Measure Existing Conduction",
                "caption": "The gap reduces read current; high resistance does not mean an ideal open circuit.",
                "state": "I_R ↓",
                "stimulus": "Maintain low-field read",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-metal-via-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-metal-via-3-en-title\">Metal-Via eFuse — Measure Existing Conduction. The gap reduces read current; high resistance does not mean an ideal open circuit.</title><defs><marker id=\"op-efuse-read-metal-via-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"52\" y=\"149\" width=\"255\" height=\"81\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"44\" y=\"172\" width=\"137\" height=\"34\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"181\" y=\"79\" width=\"128\" height=\"35\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"163\" y=\"113\" width=\"38\" height=\"77\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"166\" y=\"169\" width=\"29\" height=\"17\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"103\" y=\"165\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">A</text><text x=\"268\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">K</text><text x=\"288\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text><circle cx=\"183\" cy=\"176\" r=\"12\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M175.2 183.8l15.600000000000001 -15.600000000000001\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"95\" y=\"107\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gap</text><text x=\"180\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              },
              {
                "id": "op-efuse-read-metal-via-4-en",
                "title": "Compare Initial and Written Branches",
                "caption": "Compare two pre-existing states at equal V_R; reading did not change the material.",
                "state": "Resistance window distinguished",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-efuse-read-metal-via-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-efuse-read-metal-via-4-en-title\">Metal-Via eFuse — Compare Initial and Written Branches. Compare two pre-existing states at equal V_R; reading did not change the material.</title><defs><marker id=\"op-efuse-read-metal-via-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-efuse-read-metal-via-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M48 42V218H325\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"30\" y=\"41\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R</text><rect x=\"88\" y=\"80\" width=\"67\" height=\"138\" fill=\"#087766\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"168\" width=\"67\" height=\"50\" fill=\"#075f9d\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"120\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Initial</text><text x=\"262\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Written</text><text x=\"187\" y=\"34\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R = const.</text></svg>",
                "sourceIds": [
                  "ch-pat-efuse-via"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-efuse-via",
                "label": "TSMC: Metal Via Fuse Patent US8847350B2",
                "url": "https://patents.google.com/patent/US8847350B2/en",
                "kind": "Patent",
                "date": "Granted 2014-09-30; reviewed 2026-09-10",
                "locator": "Figures 1 and 5A; sections on current crowding and via contact placement; claim 1",
                "limit": "Supports a specific interconnect geometry and programming method. It does not provide process-independent programming current, area, or production yield figures."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "antifuse",
        "operationId": "write",
        "title": "Program: Apply the Breakdown Field Only to the Selected Dielectric",
        "summary": "The selected MOS provides a path that establishes a storage-layer field between the high-potential column line and a low-potential internal node. Programming is dielectric breakdown of the core-device gate oxide: Vpgm is set by that process oxide thickness and the allowed time-to-breakdown, typically several times core Vdd, not a node-independent 2.8–3.5 V. Public Kilopass teaching places program voltage near 8–9 V for a ~32 Å oxide and 5–6 V for ~20 Å. A named foundry example separately shows that a 1.8 V core must survive program stress well above Vdd; that is evidence of the stress class, not a universal Vpgm. This path is not I/O floating-gate hot-carrier injection, whose program window follows the I/O device (about 6.5 V PGM on 3.3 V PMOS and 7.5 V on 5 V PMOS; an NMOS floating-gate cell at the same node needs a higher Vpgm). That I/O FG HCI pairing is public literature / architecture-class and must not be back-filled onto oxide-breakdown AntiFuse. Current must be controlled to protect the selector. Evolution from soft breakdown to stronger conduction is a distributed process, not the formation of an ideal metal wire with identical dimensions and resistance in every cell.",
        "sources": [
          {
            "id": "ch-pat-antifuse",
            "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
            "url": "https://patents.google.com/patent/US6667902B2/en",
            "kind": "Patent",
            "date": "Granted 2003-12-23; reviewed 2026-09-10",
            "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
            "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
          },
          {
            "id": "ch-pat-kilopass-vpp-tox",
            "label": "Kilopass: Gate-Oxide Thickness Sets Program Voltage US6940751",
            "url": "https://patents.google.com/patent/US6940751B2/en",
            "kind": "Patent",
            "date": "Granted 2005-09-06; reviewed 2026-09-13",
            "locator": "Specification: VPP approximately 8–9 V for a 32 Å gate oxide, 5–6 V for 20 Å; voltages vary by process and application.",
            "limit": "The thickness–voltage pairing is a teaching example in this patent, not a current XPM macro datasheet and not a fixed specification for one lithography node."
          },
          {
            "id": "ch-ememory-neofuse-9v-2016",
            "label": "eMemory named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
            "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
            "kind": "Vendor news",
            "date": "2016-01-14; reviewed 2026-09-11",
            "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming; 1.0 V read",
            "limit": "Supports 9 V program stress in that named 0.18 µm 1.8 V/13.5 V source-driver example. It is not a node-independent breakdown voltage and not floating-gate HCI."
          },
          {
            "id": "ch-pat-pmos-otp-6678190",
            "label": "eMemory: Series-PMOS Single-Poly Embedded EPROM Patent US6678190B2",
            "url": "https://patents.google.com/patent/US6678190B2/en",
            "kind": "Patent",
            "date": "Granted 2004-01-13; reviewed 2026-09-11",
            "locator": "Figures 5, 9 and 10 and the write-“1” bias text: VSL/VNW 3–8 V; gate-current peak near drain −5 to −6 V and gate about −1 V",
            "limit": "Embodiment biases belong to this PMOS, no-control-gate cell. They must not be rewritten as a 3.3 V/5 V to 6.5 V/7.5 V rule, nor moved onto gate-oxide-breakdown AntiFuse."
          },
          {
            "id": "ch-pat-io-nvm-6920067",
            "label": "eMemory: I/O-Device Single-Poly NVM Patent US6920067B2",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Patent",
            "date": "Granted 2005-07-19; reviewed 2026-09-11",
            "locator": "Specification: I/O devices such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V, with another mode preferably 6 V",
            "limit": "Supports p-type cells (and an NMOS claim variant) built to I/O device rules. It does not state that a 5 V I/O cell must program at 7.5 V."
          },
          {
            "id": "ch-eetimes-neobit-2003",
            "label": "EE Times: Hsu on 0.35 µm NeoBit program at 6–6.5 V",
            "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
            "kind": "Contemporary industry report",
            "date": "2003-11-05; reviewed 2026-09-11",
            "locator": "Charles Hsu quoted: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
            "limit": "Supports a 0.35 µm-generation public voltage comparison. It is not 180 nm core-GOX breakdown."
          },
          {
            "id": "ch-author-pmos-io-pgm",
            "label": "Public literature / architecture-class: I/O PMOS floating-gate OTP program voltages",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Architecture-class reference",
            "date": "reviewed 2026-09-11",
            "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V PGM for a 5 V I/O PMOS cell; an NMOS floating-gate cell at the same node needs a higher Vpgm",
            "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move these figures onto gate-oxide-breakdown AntiFuse, and do not treat them as the measurement table of every current NeoBit macro."
          },
          {
            "id": "ch-pat-pmos-vs-nmos-5761121",
            "label": "Ohsaki et al.: PMOS Single-Poly NVM Patent US5761121A",
            "url": "https://patents.google.com/patent/US5761121A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-02; reviewed 2026-09-11",
            "locator": "Background: conventional n-channel single-poly program/erase may be as high as about 20 V; this p-channel example about 8.5 V, with about 7.5 V coupled onto the floating gate",
            "limit": "This cell has control-gate coupling and is not NeoBit. The 8.5 V / 7.5 V / 20 V figures must not be rewritten as a NeoBit 3.3 V / 5 V I/O table."
          },
          {
            "id": "ch-maturity-kilopass",
            "label": "Synopsys: 2018 Kilopass Acquisition and OTP Shipment Statement",
            "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
            "kind": "Manufacturer Historical Product and Shipment Statement",
            "date": "2018-01-10; reviewed 2026-09-10",
            "locator": "Highlights and product sections; antifuse 1T/2T, XPM, Gusto, SecretCode, and cumulative shipments",
            "limit": "More than 170 customers, 400 SoC designs, and 10 billion units were manufacturer statements in 2018, not an independent shipment audit conducted for this material. Portfolio-wide figures are not assigned to an individual model or node."
          },
          {
            "id": "ch-maturity-otp-current",
            "label": "Synopsys: Current Antifuse OTP NVM IP Product Page",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
            "kind": "Manufacturer Product and Validation Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Overview; process availability; TSMC advanced-node silicon validation and N5A/N7A automotive qualification",
            "limit": "Availability, silicon validation, automotive qualification, and volume-production shipments are different evidence levels. N5A/N7A AEC-Q100 Grade 1 qualifications are not extended to every node, nor are the claims restated as an unbreakable security guarantee."
          }
        ],
        "variants": [
          {
            "id": "mos-breakdown",
            "title": "MOS Dielectric-Breakdown Antifuse",
            "summary": "Storage element only: gate connects to column C, silicon to an internal node. The series select MOS and array periphery are omitted, not a complete commercial OTP cell.",
            "mechanism": "BD",
            "frames": [
              {
                "id": "op-antifuse-write-mos-breakdown-1-en",
                "title": "Initial Path",
                "caption": "Intact dielectric blocks low-field DC.",
                "state": "R ↑",
                "stimulus": "Unprogrammed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-write-mos-breakdown-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-write-mos-breakdown-1-en-title\">MOS Dielectric-Breakdown Antifuse — Initial Path. Intact dielectric blocks low-field DC.</title><defs><marker id=\"op-antifuse-write-mos-breakdown-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"168\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Intact Dielectric</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-write-mos-breakdown-2-en",
                "title": "Apply Program Conditions",
                "caption": "A high field stresses the thin dielectric; periphery limits stress.",
                "state": "Before transition",
                "stimulus": "V_P → E",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-write-mos-breakdown-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-write-mos-breakdown-2-en-title\">MOS Dielectric-Breakdown Antifuse — Apply Program Conditions. A high field stresses the thin dielectric; periphery limits stress.</title><defs><marker id=\"op-antifuse-write-mos-breakdown-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"168\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Intact Dielectric</text><path d=\"M321 112V178\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-antifuse-write-mos-breakdown-2-en-field)\"/><text x=\"330\" y=\"102\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">+V_P</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-write-mos-breakdown-3-en",
                "title": "Local Permanent Change",
                "caption": "A local conducting path lets electrons cross the former dielectric region.",
                "state": "R ↓",
                "stimulus": "Controlled program pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-write-mos-breakdown-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-write-mos-breakdown-3-en-title\">MOS Dielectric-Breakdown Antifuse — Local Permanent Change. A local conducting path lets electrons cross the former dielectric region.</title><defs><marker id=\"op-antifuse-write-mos-breakdown-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M186 185V135\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-antifuse-write-mos-breakdown-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"181\" cy=\"157\" r=\"10\" fill=\"#075f9d\"/><text x=\"181\" y=\"164\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-write-mos-breakdown-4-en",
                "title": "Verify at Low Field",
                "caption": "After program stress is removed, read current identifies the permanent state.",
                "state": "I_R ↑",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-write-mos-breakdown-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-write-mos-breakdown-4-en-title\">MOS Dielectric-Breakdown Antifuse — Verify at Low Field. After program stress is removed, read current identifies the permanent state.</title><defs><marker id=\"op-antifuse-write-mos-breakdown-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-write-mos-breakdown-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R; I_R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-antifuse",
                "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
                "url": "https://patents.google.com/patent/US6667902B2/en",
                "kind": "Patent",
                "date": "Granted 2003-12-23; reviewed 2026-09-10",
                "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
                "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "antifuse",
        "operationId": "erase",
        "title": "Erase: No Repair of the Broken-Down Dielectric in Normal Operation",
        "summary": "Resistive memories that also contain conductive paths may perform SET/RESET through controlled ion migration; antifuse OTP does not provide a product operating contract for reversible recovery. The ability to draw a conductive filament in both devices does not make their endurance, operating directions, or array requirements equivalent.",
        "sources": [
          {
            "id": "ch-pat-antifuse",
            "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
            "url": "https://patents.google.com/patent/US6667902B2/en",
            "kind": "Patent",
            "date": "Granted 2003-12-23; reviewed 2026-09-10",
            "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
            "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
          },
          {
            "id": "ch-pat-kilopass-vpp-tox",
            "label": "Kilopass: Gate-Oxide Thickness Sets Program Voltage US6940751",
            "url": "https://patents.google.com/patent/US6940751B2/en",
            "kind": "Patent",
            "date": "Granted 2005-09-06; reviewed 2026-09-13",
            "locator": "Specification: VPP approximately 8–9 V for a 32 Å gate oxide, 5–6 V for 20 Å; voltages vary by process and application.",
            "limit": "The thickness–voltage pairing is a teaching example in this patent, not a current XPM macro datasheet and not a fixed specification for one lithography node."
          },
          {
            "id": "ch-ememory-neofuse-9v-2016",
            "label": "eMemory named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
            "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
            "kind": "Vendor news",
            "date": "2016-01-14; reviewed 2026-09-11",
            "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming; 1.0 V read",
            "limit": "Supports 9 V program stress in that named 0.18 µm 1.8 V/13.5 V source-driver example. It is not a node-independent breakdown voltage and not floating-gate HCI."
          },
          {
            "id": "ch-pat-pmos-otp-6678190",
            "label": "eMemory: Series-PMOS Single-Poly Embedded EPROM Patent US6678190B2",
            "url": "https://patents.google.com/patent/US6678190B2/en",
            "kind": "Patent",
            "date": "Granted 2004-01-13; reviewed 2026-09-11",
            "locator": "Figures 5, 9 and 10 and the write-“1” bias text: VSL/VNW 3–8 V; gate-current peak near drain −5 to −6 V and gate about −1 V",
            "limit": "Embodiment biases belong to this PMOS, no-control-gate cell. They must not be rewritten as a 3.3 V/5 V to 6.5 V/7.5 V rule, nor moved onto gate-oxide-breakdown AntiFuse."
          },
          {
            "id": "ch-pat-io-nvm-6920067",
            "label": "eMemory: I/O-Device Single-Poly NVM Patent US6920067B2",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Patent",
            "date": "Granted 2005-07-19; reviewed 2026-09-11",
            "locator": "Specification: I/O devices such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V, with another mode preferably 6 V",
            "limit": "Supports p-type cells (and an NMOS claim variant) built to I/O device rules. It does not state that a 5 V I/O cell must program at 7.5 V."
          },
          {
            "id": "ch-eetimes-neobit-2003",
            "label": "EE Times: Hsu on 0.35 µm NeoBit program at 6–6.5 V",
            "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
            "kind": "Contemporary industry report",
            "date": "2003-11-05; reviewed 2026-09-11",
            "locator": "Charles Hsu quoted: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
            "limit": "Supports a 0.35 µm-generation public voltage comparison. It is not 180 nm core-GOX breakdown."
          },
          {
            "id": "ch-author-pmos-io-pgm",
            "label": "Public literature / architecture-class: I/O PMOS floating-gate OTP program voltages",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Architecture-class reference",
            "date": "reviewed 2026-09-11",
            "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V PGM for a 5 V I/O PMOS cell; an NMOS floating-gate cell at the same node needs a higher Vpgm",
            "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move these figures onto gate-oxide-breakdown AntiFuse, and do not treat them as the measurement table of every current NeoBit macro."
          },
          {
            "id": "ch-pat-pmos-vs-nmos-5761121",
            "label": "Ohsaki et al.: PMOS Single-Poly NVM Patent US5761121A",
            "url": "https://patents.google.com/patent/US5761121A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-02; reviewed 2026-09-11",
            "locator": "Background: conventional n-channel single-poly program/erase may be as high as about 20 V; this p-channel example about 8.5 V, with about 7.5 V coupled onto the floating gate",
            "limit": "This cell has control-gate coupling and is not NeoBit. The 8.5 V / 7.5 V / 20 V figures must not be rewritten as a NeoBit 3.3 V / 5 V I/O table."
          },
          {
            "id": "ch-maturity-kilopass",
            "label": "Synopsys: 2018 Kilopass Acquisition and OTP Shipment Statement",
            "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
            "kind": "Manufacturer Historical Product and Shipment Statement",
            "date": "2018-01-10; reviewed 2026-09-10",
            "locator": "Highlights and product sections; antifuse 1T/2T, XPM, Gusto, SecretCode, and cumulative shipments",
            "limit": "More than 170 customers, 400 SoC designs, and 10 billion units were manufacturer statements in 2018, not an independent shipment audit conducted for this material. Portfolio-wide figures are not assigned to an individual model or node."
          },
          {
            "id": "ch-maturity-otp-current",
            "label": "Synopsys: Current Antifuse OTP NVM IP Product Page",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
            "kind": "Manufacturer Product and Validation Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Overview; process availability; TSMC advanced-node silicon validation and N5A/N7A automotive qualification",
            "limit": "Availability, silicon validation, automotive qualification, and volume-production shipments are different evidence levels. N5A/N7A AEC-Q100 Grade 1 qualifications are not extended to every node, nor are the claims restated as an unbreakable security guarantee."
          }
        ],
        "variants": [
          {
            "id": "mos-breakdown",
            "title": "MOS Dielectric-Breakdown Antifuse",
            "summary": "Storage element only: gate connects to column C, silicon to an internal node. The series select MOS and array periphery are omitted, not a complete commercial OTP cell.",
            "mechanism": "BD",
            "frames": [
              {
                "id": "op-antifuse-erase-mos-breakdown-1-en",
                "title": "Original Material",
                "caption": "Keep the unprogrammed structure as a reference.",
                "state": "R ↑",
                "stimulus": "No high-field pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-erase-mos-breakdown-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-erase-mos-breakdown-1-en-title\">MOS Dielectric-Breakdown Antifuse — Original Material. Keep the unprogrammed structure as a reference.</title><defs><marker id=\"op-antifuse-erase-mos-breakdown-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"168\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Intact Dielectric</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-erase-mos-breakdown-2-en",
                "title": "After Permanent Change",
                "caption": "Removing normal power does not restore the original material.",
                "state": "R ↓",
                "stimulus": "Program pulse completed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-erase-mos-breakdown-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-erase-mos-breakdown-2-en-title\">MOS Dielectric-Breakdown Antifuse — After Permanent Change. Removing normal power does not restore the original material.</title><defs><marker id=\"op-antifuse-erase-mos-breakdown-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-erase-mos-breakdown-3-en",
                "title": "Reverse Operation Unavailable",
                "caption": "No qualified electrical erase path exists; read still detects the changed state.",
                "state": "I_R ↑",
                "stimulus": "Reverse bias is not an erase procedure",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-erase-mos-breakdown-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-erase-mos-breakdown-3-en-title\">MOS Dielectric-Breakdown Antifuse — Reverse Operation Unavailable. No qualified electrical erase path exists; read still detects the changed state.</title><defs><marker id=\"op-antifuse-erase-mos-breakdown-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-erase-mos-breakdown-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">No Qualified Reverse</text><circle cx=\"323\" cy=\"157\" r=\"19\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M310.65 169.35l24.7 -24.7\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-antifuse",
                "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
                "url": "https://patents.google.com/patent/US6667902B2/en",
                "kind": "Patent",
                "date": "Granted 2003-12-23; reviewed 2026-09-10",
                "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
                "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "antifuse",
        "operationId": "read",
        "title": "Read: Distinguish an Intact Dielectric from a Conductive Path",
        "summary": "The read criterion is the current distribution of each state under the actual read bias. Selector threshold, series resistance, dielectric leakage, and variation in programmed conduction all affect margin. Validate these over the specified temperature and time conditions rather than treating one high-current measurement immediately after programming as sufficient evidence of lifetime read reliability.",
        "sources": [
          {
            "id": "ch-pat-antifuse",
            "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
            "url": "https://patents.google.com/patent/US6667902B2/en",
            "kind": "Patent",
            "date": "Granted 2003-12-23; reviewed 2026-09-10",
            "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
            "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
          },
          {
            "id": "ch-pat-kilopass-vpp-tox",
            "label": "Kilopass: Gate-Oxide Thickness Sets Program Voltage US6940751",
            "url": "https://patents.google.com/patent/US6940751B2/en",
            "kind": "Patent",
            "date": "Granted 2005-09-06; reviewed 2026-09-13",
            "locator": "Specification: VPP approximately 8–9 V for a 32 Å gate oxide, 5–6 V for 20 Å; voltages vary by process and application.",
            "limit": "The thickness–voltage pairing is a teaching example in this patent, not a current XPM macro datasheet and not a fixed specification for one lithography node."
          },
          {
            "id": "ch-ememory-neofuse-9v-2016",
            "label": "eMemory named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
            "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
            "kind": "Vendor news",
            "date": "2016-01-14; reviewed 2026-09-11",
            "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming; 1.0 V read",
            "limit": "Supports 9 V program stress in that named 0.18 µm 1.8 V/13.5 V source-driver example. It is not a node-independent breakdown voltage and not floating-gate HCI."
          },
          {
            "id": "ch-pat-pmos-otp-6678190",
            "label": "eMemory: Series-PMOS Single-Poly Embedded EPROM Patent US6678190B2",
            "url": "https://patents.google.com/patent/US6678190B2/en",
            "kind": "Patent",
            "date": "Granted 2004-01-13; reviewed 2026-09-11",
            "locator": "Figures 5, 9 and 10 and the write-“1” bias text: VSL/VNW 3–8 V; gate-current peak near drain −5 to −6 V and gate about −1 V",
            "limit": "Embodiment biases belong to this PMOS, no-control-gate cell. They must not be rewritten as a 3.3 V/5 V to 6.5 V/7.5 V rule, nor moved onto gate-oxide-breakdown AntiFuse."
          },
          {
            "id": "ch-pat-io-nvm-6920067",
            "label": "eMemory: I/O-Device Single-Poly NVM Patent US6920067B2",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Patent",
            "date": "Granted 2005-07-19; reviewed 2026-09-11",
            "locator": "Specification: I/O devices such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V, with another mode preferably 6 V",
            "limit": "Supports p-type cells (and an NMOS claim variant) built to I/O device rules. It does not state that a 5 V I/O cell must program at 7.5 V."
          },
          {
            "id": "ch-eetimes-neobit-2003",
            "label": "EE Times: Hsu on 0.35 µm NeoBit program at 6–6.5 V",
            "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
            "kind": "Contemporary industry report",
            "date": "2003-11-05; reviewed 2026-09-11",
            "locator": "Charles Hsu quoted: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
            "limit": "Supports a 0.35 µm-generation public voltage comparison. It is not 180 nm core-GOX breakdown."
          },
          {
            "id": "ch-author-pmos-io-pgm",
            "label": "Public literature / architecture-class: I/O PMOS floating-gate OTP program voltages",
            "url": "https://patents.google.com/patent/US6920067B2/en",
            "kind": "Architecture-class reference",
            "date": "reviewed 2026-09-11",
            "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V PGM for a 5 V I/O PMOS cell; an NMOS floating-gate cell at the same node needs a higher Vpgm",
            "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move these figures onto gate-oxide-breakdown AntiFuse, and do not treat them as the measurement table of every current NeoBit macro."
          },
          {
            "id": "ch-pat-pmos-vs-nmos-5761121",
            "label": "Ohsaki et al.: PMOS Single-Poly NVM Patent US5761121A",
            "url": "https://patents.google.com/patent/US5761121A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-02; reviewed 2026-09-11",
            "locator": "Background: conventional n-channel single-poly program/erase may be as high as about 20 V; this p-channel example about 8.5 V, with about 7.5 V coupled onto the floating gate",
            "limit": "This cell has control-gate coupling and is not NeoBit. The 8.5 V / 7.5 V / 20 V figures must not be rewritten as a NeoBit 3.3 V / 5 V I/O table."
          },
          {
            "id": "ch-maturity-kilopass",
            "label": "Synopsys: 2018 Kilopass Acquisition and OTP Shipment Statement",
            "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
            "kind": "Manufacturer Historical Product and Shipment Statement",
            "date": "2018-01-10; reviewed 2026-09-10",
            "locator": "Highlights and product sections; antifuse 1T/2T, XPM, Gusto, SecretCode, and cumulative shipments",
            "limit": "More than 170 customers, 400 SoC designs, and 10 billion units were manufacturer statements in 2018, not an independent shipment audit conducted for this material. Portfolio-wide figures are not assigned to an individual model or node."
          },
          {
            "id": "ch-maturity-otp-current",
            "label": "Synopsys: Current Antifuse OTP NVM IP Product Page",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/otp.html",
            "kind": "Manufacturer Product and Validation Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Overview; process availability; TSMC advanced-node silicon validation and N5A/N7A automotive qualification",
            "limit": "Availability, silicon validation, automotive qualification, and volume-production shipments are different evidence levels. N5A/N7A AEC-Q100 Grade 1 qualifications are not extended to every node, nor are the claims restated as an unbreakable security guarantee."
          }
        ],
        "variants": [
          {
            "id": "mos-breakdown",
            "title": "MOS Dielectric-Breakdown Antifuse",
            "summary": "Storage element only: gate connects to column C, silicon to an internal node. The series select MOS and array periphery are omitted, not a complete commercial OTP cell.",
            "mechanism": "BD",
            "frames": [
              {
                "id": "op-antifuse-read-mos-breakdown-1-en",
                "title": "Written Material Retained",
                "caption": "Start with permanently changed material; reading does not repair it.",
                "state": "R ↓",
                "stimulus": "Before read bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-read-mos-breakdown-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-read-mos-breakdown-1-en-title\">MOS Dielectric-Breakdown Antifuse — Written Material Retained. Start with permanently changed material; reading does not repair it.</title><defs><marker id=\"op-antifuse-read-mos-breakdown-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-read-mos-breakdown-2-en",
                "title": "Apply Low-Field Read",
                "caption": "Observe the existing path under read conditions below program stress.",
                "state": "R ↓",
                "stimulus": "V_R ≪ V_P",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-read-mos-breakdown-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-read-mos-breakdown-2-en-title\">MOS Dielectric-Breakdown Antifuse — Apply Low-Field Read. Observe the existing path under read conditions below program stress.</title><defs><marker id=\"op-antifuse-read-mos-breakdown-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M321 112V178\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-antifuse-read-mos-breakdown-2-en-field)\"/><text x=\"330\" y=\"102\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-read-mos-breakdown-3-en",
                "title": "Measure Existing Conduction",
                "caption": "The broken-down region conducts more strongly; its geometry is unchanged.",
                "state": "I_R ↑",
                "stimulus": "Maintain low-field read",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-read-mos-breakdown-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-read-mos-breakdown-3-en-title\">MOS Dielectric-Breakdown Antifuse — Measure Existing Conduction. The broken-down region conducts more strongly; its geometry is unchanged.</title><defs><marker id=\"op-antifuse-read-mos-breakdown-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"55\" y=\"177\" width=\"250\" height=\"49\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"144\" width=\"222\" height=\"33\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"69\" y=\"108\" width=\"222\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"111\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G / C</text><text x=\"180\" y=\"212\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Si / Internal Node</text><path d=\"M180 54V108\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 226V244\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 143l-7 9 12 8-7 18\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M186 185V135\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-antifuse-read-mos-breakdown-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"181\" cy=\"157\" r=\"10\" fill=\"#075f9d\"/><text x=\"181\" y=\"164\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"181\" y=\"35\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              },
              {
                "id": "op-antifuse-read-mos-breakdown-4-en",
                "title": "Compare Initial and Written Branches",
                "caption": "Compare two pre-existing states at equal V_R; reading did not change the material.",
                "state": "Resistance window distinguished",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-antifuse-read-mos-breakdown-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-antifuse-read-mos-breakdown-4-en-title\">MOS Dielectric-Breakdown Antifuse — Compare Initial and Written Branches. Compare two pre-existing states at equal V_R; reading did not change the material.</title><defs><marker id=\"op-antifuse-read-mos-breakdown-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-antifuse-read-mos-breakdown-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M48 42V218H325\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"30\" y=\"41\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R</text><rect x=\"88\" y=\"168\" width=\"67\" height=\"50\" fill=\"#087766\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"80\" width=\"67\" height=\"138\" fill=\"#075f9d\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"120\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Initial</text><text x=\"262\" y=\"248\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Written</text><text x=\"187\" y=\"34\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R = const.</text></svg>",
                "sourceIds": [
                  "ch-pat-antifuse"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "R / I_R",
                "meaning": "Low-field read current distinguishes resistance; no logic-0/1 encoding is assigned."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-antifuse",
                "label": "Kilopass: Ultrathin Dielectric Breakdown Cell Patent US6667902B2",
                "url": "https://patents.google.com/patent/US6667902B2/en",
                "kind": "Patent",
                "date": "Granted 2003-12-23; reviewed 2026-09-10",
                "locator": "Figures 1, 3, and 8: selection, programming, and read; Figures 12–15: stress and breakdown-characteristic plots",
                "limit": "The 2.5 V, 7 V, and 1.5 V values in this material belong only to this early embodiment. They must not be reused as operating recommendations for current OTP IP, and this patent does not establish the topology of every commercial cell."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "eeprom",
        "operationId": "write",
        "title": "Program: Establish Stored Charge Through a Local Window",
        "summary": "FN tunneling occurs at the thin dielectric's high-field region. The control gate acts through capacitive coupling and has no metal connection to the floating gate. Byte/page write commands are interface behavior and do not directly describe bare-cell bias voltages.",
        "sources": [
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          },
          {
            "id": "ch-mtp-standalone-microchip",
            "label": "Microchip: 24AA256/24LC256/24FC256 Standalone Serial EEPROM Datasheet",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/24AA256-24LC256-24FC256-256K-I2C-Serial-EEPROM-DS20001203.pdf",
            "kind": "Manufacturer Datasheet",
            "date": "2022 revision; reviewed 2026-09-10",
            "locator": "DS20001203Y pages 1–2: product, packages, and block diagram; Section 6: byte/page writes; Section 8: reads",
            "limit": "Establishes a standalone device, I2C interface, 64-byte page buffer, and internal erase/write control. The datasheet does not disclose the bitcell cross-section or polysilicon layer count; a teaching patent is not evidence of this product's implementation."
          }
        ],
        "variants": [
          {
            "id": "local-window",
            "title": "Local Window: FN Program/Tunnel Erase",
            "summary": "The n-channel branch expressly permitted by US4115914A is redrawn with n+ contacts and p-type silicon. Most original process figures use a p-channel example; this is not a literal reproduction of that process section. This sequence uses tunneling only.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-eeprom-write-local-window-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-write-local-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-write-local-window-1-en-title\">Local Window: FN Program/Tunnel Erase — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-eeprom-write-local-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-write-local-window-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-write-local-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-write-local-window-2-en-title\">Local Window: FN Program/Tunnel Erase — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-eeprom-write-local-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-write-local-window-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-write-local-window-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons tunnel through the local barrier into isolated storage.",
                "state": "Q < 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-write-local-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-write-local-window-3-en-title\">Local Window: FN Program/Tunnel Erase — Track Electron Transfer. Electrons tunnel through the local barrier into isolated storage.</title><defs><marker id=\"op-eeprom-write-local-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M185 192V131\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-write-local-window-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"185\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"185\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-write-local-window-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-write-local-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-write-local-window-4-en-title\">Local Window: FN Program/Tunnel Erase — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-eeprom-write-local-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-write-local-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "eeprom",
        "operationId": "erase",
        "title": "Erase: Reverse the Window Field to Remove Electrons",
        "summary": "Separate physical erase from host commands. A 24LC256 write includes an internally timed erase/write cycle; the host does not directly apply bare-cell erase biases. Selection lines, shared terminals, and page organization determine the affected region, which the EEPROM label alone does not specify.",
        "sources": [
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          },
          {
            "id": "ch-mtp-standalone-microchip",
            "label": "Microchip: 24AA256/24LC256/24FC256 Standalone Serial EEPROM Datasheet",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/24AA256-24LC256-24FC256-256K-I2C-Serial-EEPROM-DS20001203.pdf",
            "kind": "Manufacturer Datasheet",
            "date": "2022 revision; reviewed 2026-09-10",
            "locator": "DS20001203Y pages 1–2: product, packages, and block diagram; Section 6: byte/page writes; Section 8: reads",
            "limit": "Establishes a standalone device, I2C interface, 64-byte page buffer, and internal erase/write control. The datasheet does not disclose the bitcell cross-section or polysilicon layer count; a teaching patent is not evidence of this product's implementation."
          }
        ],
        "variants": [
          {
            "id": "local-window",
            "title": "Local Window: FN Program/Tunnel Erase",
            "summary": "The n-channel branch expressly permitted by US4115914A is redrawn with n+ contacts and p-type silicon. Most original process figures use a p-channel example; this is not a literal reproduction of that process section. This sequence uses tunneling only.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-eeprom-erase-local-window-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-erase-local-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-erase-local-window-1-en-title\">Local Window: FN Program/Tunnel Erase — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-eeprom-erase-local-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-erase-local-window-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-erase-local-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-erase-local-window-2-en-title\">Local Window: FN Program/Tunnel Erase — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-eeprom-erase-local-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-erase-local-window-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-erase-local-window-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-erase-local-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-erase-local-window-3-en-title\">Local Window: FN Program/Tunnel Erase — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-eeprom-erase-local-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M185 132V190\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-erase-local-window-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"185\" cy=\"162\" r=\"10\" fill=\"#075f9d\"/><text x=\"185\" y=\"169\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-erase-local-window-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-erase-local-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-erase-local-window-4-en-title\">Local Window: FN Program/Tunnel Erase — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-eeprom-erase-local-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-erase-local-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "eeprom",
        "operationId": "read",
        "title": "Read: Sense the Channel and Return Data Through the Interface",
        "summary": "The source-to-drain channel carries the read current; floating-gate electrons need not leave. Interface clock rate, serial transfer, and random/sequential access are device timing conditions, separate from bare-cell sensing time.",
        "sources": [
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          },
          {
            "id": "ch-mtp-standalone-microchip",
            "label": "Microchip: 24AA256/24LC256/24FC256 Standalone Serial EEPROM Datasheet",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/MPD/ProductDocuments/DataSheets/24AA256-24LC256-24FC256-256K-I2C-Serial-EEPROM-DS20001203.pdf",
            "kind": "Manufacturer Datasheet",
            "date": "2022 revision; reviewed 2026-09-10",
            "locator": "DS20001203Y pages 1–2: product, packages, and block diagram; Section 6: byte/page writes; Section 8: reads",
            "limit": "Establishes a standalone device, I2C interface, 64-byte page buffer, and internal erase/write control. The datasheet does not disclose the bitcell cross-section or polysilicon layer count; a teaching patent is not evidence of this product's implementation."
          }
        ],
        "variants": [
          {
            "id": "local-window",
            "title": "Local Window: FN Program/Tunnel Erase",
            "summary": "The n-channel branch expressly permitted by US4115914A is redrawn with n+ contacts and p-type silicon. Most original process figures use a p-channel example; this is not a literal reproduction of that process section. This sequence uses tunneling only.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-eeprom-read-local-window-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-read-local-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-read-local-window-1-en-title\">Local Window: FN Program/Tunnel Erase — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-eeprom-read-local-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-read-local-window-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-read-local-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-read-local-window-2-en-title\">Local Window: FN Program/Tunnel Erase — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-eeprom-read-local-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-read-local-window-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-read-local-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-read-local-window-3-en-title\">Local Window: FN Program/Tunnel Erase — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-eeprom-read-local-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M112 181H150\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-read-local-window-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-eeprom-read-local-window-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-eeprom-read-local-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-eeprom-read-local-window-4-en-title\">Local Window: FN Program/Tunnel Erase — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-eeprom-read-local-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-eeprom-read-local-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-eeprom-read-local-window-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "mtp",
        "operationId": "write",
        "title": "Program: Establish the Identified Cell's Charge-Transfer Path",
        "summary": "Single-poly does not specify an injection mechanism. NeoMTP uses channel-hot-hole-induced hot-electron injection in a p-type device, distinct from the n-channel teaching example. Floadia ZT separately discloses FN programming. A low core supply does not eliminate internal voltage boosting or high fields.",
        "sources": [
          {
            "id": "ch-pat-eeprom-singlepoly",
            "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
            "url": "https://patents.google.com/patent/US5844271A/en",
            "kind": "Patent",
            "date": "Granted 1998-12-01; reviewed 2026-09-10",
            "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
            "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
          },
          {
            "id": "ch-product-mtp",
            "label": "Synopsys: MTP EEPROM NVM IP for Analog and Mixed-Signal Processes",
            "url": "https://www.synopsys.com/resources/mtp-eeprom-nvm-ip-for-analog-and-mixed-signal-process-nodes-datasheet.html",
            "kind": "Manufacturer Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Public introduction and learning points: floating gate, logic process, electrical erase, and hard macro",
            "limit": "Only the public introduction was reviewed; the detailed datasheet behind the registration form was not obtained. The product positioning and broad physical mechanism are confirmed. Undisclosed capacities, paired endurance/retention conditions, film stacks, and carrier paths are not inferred."
          },
          {
            "id": "ch-mtp-synopsys",
            "label": "Synopsys: Single-Poly Floating-Gate MTP EEPROM IP",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-eeprom.html",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product overview paragraphs 1–2; first Highlights item; integrated high-voltage circuitry description",
            "limit": "Confirms single-poly floating-gate storage and zero added masks for this product family. Control-terminal cross-sections and carrier paths are not disclosed. Family maxima and qualifications for selected nodes cannot be combined into a guarantee for every macro."
          },
          {
            "id": "ch-mtp-ememory-neoee",
            "label": "eMemory: NeoEE Single-Poly Embedded EEPROM",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly description; Technical Principles: capacitive-coupling MOS devices, selectors, and FN charge transfer in both directions",
            "limit": "Confirms the identified single-poly floating-gate technology and FN program/erase principles. Complete terminal biases, cross-section dimensions, and paired reliability ratings for a target macro were not obtained."
          },
          {
            "id": "ch-mtp-ememory-neomtp",
            "label": "eMemory: NeoMTP Single-Poly p-Type Floating-Gate Principles",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly and additional-erase-gate descriptions; Technical Principles: p-type FG-MOSFET, CHEI, and FN erase destination",
            "limit": "The manufacturer describes channel-hot-hole-induced hot-electron injection and FN electron transfer from floating gate to erase gate. Do not substitute an n-channel/source-erase cross-section or extend this mechanism to NeoEE or other vendors' MTP."
          },
          {
            "id": "ch-mtp-xfab-xc06",
            "label": "X-FAB: Historical XC06 Double-Poly Embedded EEPROM Process Brief",
            "url": "https://www.fbe-asic.com/documents/is-xc06.pdf",
            "kind": "Manufacturer-Authored Process Document",
            "date": "Rev 09/2003; reviewed 2026-09-10",
            "locator": "Page 1 Main Process Features: Flash/EEPROM tunnel oxide and double-poly stack; page 2 EEPROM macros; revision footer",
            "limit": "A 2003 X-FAB-authored document publicly hosted by FBE ASIC. Used only as a historical foundry example. Current availability, the complete EEPROM cross-section, and carrier paths are not established. Base-CMOS single-poly specifications cannot substitute for the NVM-option stack."
          },
          {
            "id": "ch-mtp-ymc-product",
            "label": "Yield Microelectronics: Logic-Process Embedded MTP IP",
            "url": "https://www.ymc.com.tw/index_en.php",
            "kind": "Manufacturer Company and Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "About YMC paragraph: ymtp core technology, logic-process-based MTP eNVM, and licensing customers",
            "limit": "Confirms YMC's MTP IP business and customer types. This paragraph does not disclose the polysilicon count, bitcell, or program/erase mechanism of every product."
          },
          {
            "id": "ch-mtp-ymc-singlepoly",
            "label": "Yield Microelectronics: Single-Floating-Gate NVM Patent US7423903B2",
            "url": "https://patents.google.com/patent/US7423903B2/en",
            "kind": "Patent",
            "date": "Granted 2008-09-09; reviewed 2026-09-10",
            "locator": "Figures 1, 2A, and 2B; fabrication paragraphs describing one polysilicon deposition and patterning; original-assignee field",
            "limit": "Establishes a disclosed YMC single-poly implementation connecting transistor and capacitor gates into one floating node. It does not identify the cell of every current ymtp product; bias conditions and transfer directions must be read separately for each embodiment."
          },
          {
            "id": "ch-mtp-floadia-zt",
            "label": "Floadia: LEE Flash ZT Zero-Added-Mask MTP",
            "url": "https://floadia.com/product/lee-flash-zt/",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product Info; Major Features items 4–5; FN program/erase paragraph",
            "limit": "Confirms MTP, standard CMOS, zero added masks, and FN programming/erase. This page does not explicitly state the polysilicon count. Cycle figures differ across page sections and are not adopted as a common guarantee."
          },
          {
            "id": "ch-mtp-floadia-zt-fg",
            "label": "Floadia and Maxchip: Public Floating-Gate LEE Flash ZT MTP Integration",
            "url": "https://floadia.com/news/422/",
            "kind": "Manufacturer Announcement",
            "date": "2016-05-20; reviewed 2026-09-10",
            "locator": "2016-05-20 title and announcement; paragraph identifying floating-gate storage and FN program/erase",
            "limit": "An identified historical integration on Maxchip 0.18 um BCD supports floating-gate storage and FN program/erase. The polysilicon count is not stated and cannot be inferred from zero added masks. These generation-specific ratings do not apply to all current ZT products."
          },
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          }
        ],
        "variants": [
          {
            "id": "double-poly-window",
            "title": "Double-Poly EEPROM: Local-Window Principle",
            "summary": "Uses the control/floating gates and local window in US4115914A to explain the double-poly EEPROM route. This is not a named foundry macro cross-section; process details, tunneling terminals and operating conditions remain vendor-specific.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-mtp-write-double-poly-window-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-double-poly-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-double-poly-window-1-en-title\">Double-Poly EEPROM: Local-Window Principle — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-mtp-write-double-poly-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-write-double-poly-window-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-double-poly-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-double-poly-window-2-en-title\">Double-Poly EEPROM: Local-Window Principle — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-mtp-write-double-poly-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-write-double-poly-window-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-write-double-poly-window-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons tunnel through the local barrier into isolated storage.",
                "state": "Q < 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-double-poly-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-double-poly-window-3-en-title\">Double-Poly EEPROM: Local-Window Principle — Track Electron Transfer. Electrons tunnel through the local barrier into isolated storage.</title><defs><marker id=\"op-mtp-write-double-poly-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M185 192V131\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-write-double-poly-window-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"185\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"185\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-write-double-poly-window-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-double-poly-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-double-poly-window-4-en-title\">Double-Poly EEPROM: Local-Window Principle — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-mtp-write-double-poly-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-double-poly-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "buried-control",
            "title": "Single Poly: Buried-Control CHE/Source FN Example",
            "summary": "Figures 4 and 5 of US5844271A share one FG conductor, with control buried in silicon. This teaching example does not define current vendors’ MTP cells or carrier paths. Erase coupling remains symbolic; inconsistent read entries in Table 2 are not reproduced.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-mtp-write-buried-control-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-buried-control-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-buried-control-1-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-mtp-write-buried-control-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-write-buried-control-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-buried-control-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-buried-control-2-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-mtp-write-buried-control-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG +V_P</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M80 179V157\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-write-buried-control-2-en-field)\" stroke-dasharray=\"6 5\"/><text x=\"78\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">C_CG</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-write-buried-control-3-en",
                "title": "Track Electron Transfer",
                "caption": "Channel electrons accelerate before local injection into storage.",
                "state": "Q < 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-buried-control-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-buried-control-3-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Track Electron Transfer. Channel electrons accelerate before local injection into storage.</title><defs><marker id=\"op-mtp-write-buried-control-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG +V_P</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M199 183H275\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-write-buried-control-3-en-electron)\"/><path d=\"M278 182Q295 160 281 137\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-write-buried-control-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"290\" cy=\"159\" r=\"10\" fill=\"#075f9d\"/><text x=\"290\" y=\"166\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"280\" y=\"85\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CHE</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-write-buried-control-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-write-buried-control-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-write-buried-control-4-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-mtp-write-buried-control-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-write-buried-control-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"266\" y=\"82\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-singlepoly",
                "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
                "url": "https://patents.google.com/patent/US5844271A/en",
                "kind": "Patent",
                "date": "Granted 1998-12-01; reviewed 2026-09-10",
                "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
                "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "mtp",
        "operationId": "erase",
        "title": "ERS: Restore a State Suitable for Reprogramming",
        "summary": "Polysilicon count cannot establish erase destination, polarity, or granularity. Capacitive-control regions and tunneling exits may differ. Changing a control voltage is not a direct metal connection that drains the floating gate. Dielectric defects still accumulate through cycling. Electron removal by FN and net-charge reduction by hot-hole injection are different mechanisms. The separate BBHH teaching model is not evidence that a current YMC product uses BBHH.",
        "sources": [
          {
            "id": "ch-pat-eeprom-singlepoly",
            "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
            "url": "https://patents.google.com/patent/US5844271A/en",
            "kind": "Patent",
            "date": "Granted 1998-12-01; reviewed 2026-09-10",
            "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
            "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
          },
          {
            "id": "ch-product-mtp",
            "label": "Synopsys: MTP EEPROM NVM IP for Analog and Mixed-Signal Processes",
            "url": "https://www.synopsys.com/resources/mtp-eeprom-nvm-ip-for-analog-and-mixed-signal-process-nodes-datasheet.html",
            "kind": "Manufacturer Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Public introduction and learning points: floating gate, logic process, electrical erase, and hard macro",
            "limit": "Only the public introduction was reviewed; the detailed datasheet behind the registration form was not obtained. The product positioning and broad physical mechanism are confirmed. Undisclosed capacities, paired endurance/retention conditions, film stacks, and carrier paths are not inferred."
          },
          {
            "id": "ch-mtp-synopsys",
            "label": "Synopsys: Single-Poly Floating-Gate MTP EEPROM IP",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-eeprom.html",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product overview paragraphs 1–2; first Highlights item; integrated high-voltage circuitry description",
            "limit": "Confirms single-poly floating-gate storage and zero added masks for this product family. Control-terminal cross-sections and carrier paths are not disclosed. Family maxima and qualifications for selected nodes cannot be combined into a guarantee for every macro."
          },
          {
            "id": "ch-mtp-ememory-neoee",
            "label": "eMemory: NeoEE Single-Poly Embedded EEPROM",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly description; Technical Principles: capacitive-coupling MOS devices, selectors, and FN charge transfer in both directions",
            "limit": "Confirms the identified single-poly floating-gate technology and FN program/erase principles. Complete terminal biases, cross-section dimensions, and paired reliability ratings for a target macro were not obtained."
          },
          {
            "id": "ch-mtp-ememory-neomtp",
            "label": "eMemory: NeoMTP Single-Poly p-Type Floating-Gate Principles",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly and additional-erase-gate descriptions; Technical Principles: p-type FG-MOSFET, CHEI, and FN erase destination",
            "limit": "The manufacturer describes channel-hot-hole-induced hot-electron injection and FN electron transfer from floating gate to erase gate. Do not substitute an n-channel/source-erase cross-section or extend this mechanism to NeoEE or other vendors' MTP."
          },
          {
            "id": "ch-mtp-xfab-xc06",
            "label": "X-FAB: Historical XC06 Double-Poly Embedded EEPROM Process Brief",
            "url": "https://www.fbe-asic.com/documents/is-xc06.pdf",
            "kind": "Manufacturer-Authored Process Document",
            "date": "Rev 09/2003; reviewed 2026-09-10",
            "locator": "Page 1 Main Process Features: Flash/EEPROM tunnel oxide and double-poly stack; page 2 EEPROM macros; revision footer",
            "limit": "A 2003 X-FAB-authored document publicly hosted by FBE ASIC. Used only as a historical foundry example. Current availability, the complete EEPROM cross-section, and carrier paths are not established. Base-CMOS single-poly specifications cannot substitute for the NVM-option stack."
          },
          {
            "id": "ch-mtp-ymc-product",
            "label": "Yield Microelectronics: Logic-Process Embedded MTP IP",
            "url": "https://www.ymc.com.tw/index_en.php",
            "kind": "Manufacturer Company and Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "About YMC paragraph: ymtp core technology, logic-process-based MTP eNVM, and licensing customers",
            "limit": "Confirms YMC's MTP IP business and customer types. This paragraph does not disclose the polysilicon count, bitcell, or program/erase mechanism of every product."
          },
          {
            "id": "ch-mtp-ymc-singlepoly",
            "label": "Yield Microelectronics: Single-Floating-Gate NVM Patent US7423903B2",
            "url": "https://patents.google.com/patent/US7423903B2/en",
            "kind": "Patent",
            "date": "Granted 2008-09-09; reviewed 2026-09-10",
            "locator": "Figures 1, 2A, and 2B; fabrication paragraphs describing one polysilicon deposition and patterning; original-assignee field",
            "limit": "Establishes a disclosed YMC single-poly implementation connecting transistor and capacitor gates into one floating node. It does not identify the cell of every current ymtp product; bias conditions and transfer directions must be read separately for each embodiment."
          },
          {
            "id": "ch-mtp-floadia-zt",
            "label": "Floadia: LEE Flash ZT Zero-Added-Mask MTP",
            "url": "https://floadia.com/product/lee-flash-zt/",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product Info; Major Features items 4–5; FN program/erase paragraph",
            "limit": "Confirms MTP, standard CMOS, zero added masks, and FN programming/erase. This page does not explicitly state the polysilicon count. Cycle figures differ across page sections and are not adopted as a common guarantee."
          },
          {
            "id": "ch-mtp-floadia-zt-fg",
            "label": "Floadia and Maxchip: Public Floating-Gate LEE Flash ZT MTP Integration",
            "url": "https://floadia.com/news/422/",
            "kind": "Manufacturer Announcement",
            "date": "2016-05-20; reviewed 2026-09-10",
            "locator": "2016-05-20 title and announcement; paragraph identifying floating-gate storage and FN program/erase",
            "limit": "An identified historical integration on Maxchip 0.18 um BCD supports floating-gate storage and FN program/erase. The polysilicon count is not stated and cannot be inferred from zero added masks. These generation-specific ratings do not apply to all current ZT products."
          },
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          }
        ],
        "variants": [
          {
            "id": "double-poly-window",
            "title": "Double-Poly EEPROM: Local-Window Principle",
            "summary": "Uses the control/floating gates and local window in US4115914A to explain the double-poly EEPROM route. This is not a named foundry macro cross-section; process details, tunneling terminals and operating conditions remain vendor-specific.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-mtp-erase-double-poly-window-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-double-poly-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-double-poly-window-1-en-title\">Double-Poly EEPROM: Local-Window Principle — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-mtp-erase-double-poly-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-erase-double-poly-window-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-double-poly-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-double-poly-window-2-en-title\">Double-Poly EEPROM: Local-Window Principle — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-mtp-erase-double-poly-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-erase-double-poly-window-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-erase-double-poly-window-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-double-poly-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-double-poly-window-3-en-title\">Double-Poly EEPROM: Local-Window Principle — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-mtp-erase-double-poly-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M185 132V190\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-erase-double-poly-window-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"185\" cy=\"162\" r=\"10\" fill=\"#075f9d\"/><text x=\"185\" y=\"169\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-erase-double-poly-window-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-double-poly-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-double-poly-window-4-en-title\">Double-Poly EEPROM: Local-Window Principle — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-mtp-erase-double-poly-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-double-poly-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "buried-control",
            "title": "Single Poly: Buried-Control CHE/Source FN Example",
            "summary": "Figures 4 and 5 of US5844271A share one FG conductor, with control buried in silicon. This teaching example does not define current vendors’ MTP cells or carrier paths. Erase coupling remains symbolic; inconsistent read entries in Table 2 are not reproduced.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-mtp-erase-buried-control-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-buried-control-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-buried-control-1-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-mtp-erase-buried-control-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-erase-buried-control-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_S > V_FG",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-buried-control-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-buried-control-2-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-mtp-erase-buried-control-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG = V_C</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_E</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M80 179V157\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-erase-buried-control-2-en-field)\" stroke-dasharray=\"6 5\"/><text x=\"78\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">C_CG</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-erase-buried-control-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "V_S > V_FG",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-buried-control-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-buried-control-3-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-mtp-erase-buried-control-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG = V_C</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_E</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M181 144V191\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-erase-buried-control-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"182\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"182\" y=\"172\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"183\" y=\"84\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN → S</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-erase-buried-control-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-erase-buried-control-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-erase-buried-control-4-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-mtp-erase-buried-control-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-erase-buried-control-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"266\" y=\"82\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-singlepoly",
                "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
                "url": "https://patents.google.com/patent/US5844271A/en",
                "kind": "Patent",
                "date": "Granted 1998-12-01; reviewed 2026-09-10",
                "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
                "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "mtp",
        "operationId": "read",
        "title": "Read: Sense the Selected Channel Under Normal Bias",
        "summary": "Macro read behavior depends on the cell, coupling ratio, selectors, bitlines, references, and ECC. A public cross-section explains storage principles but does not replace macro timing, output protocol, or usable read margin.",
        "sources": [
          {
            "id": "ch-pat-eeprom-singlepoly",
            "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
            "url": "https://patents.google.com/patent/US5844271A/en",
            "kind": "Patent",
            "date": "Granted 1998-12-01; reviewed 2026-09-10",
            "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
            "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
          },
          {
            "id": "ch-product-mtp",
            "label": "Synopsys: MTP EEPROM NVM IP for Analog and Mixed-Signal Processes",
            "url": "https://www.synopsys.com/resources/mtp-eeprom-nvm-ip-for-analog-and-mixed-signal-process-nodes-datasheet.html",
            "kind": "Manufacturer Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Public introduction and learning points: floating gate, logic process, electrical erase, and hard macro",
            "limit": "Only the public introduction was reviewed; the detailed datasheet behind the registration form was not obtained. The product positioning and broad physical mechanism are confirmed. Undisclosed capacities, paired endurance/retention conditions, film stacks, and carrier paths are not inferred."
          },
          {
            "id": "ch-mtp-synopsys",
            "label": "Synopsys: Single-Poly Floating-Gate MTP EEPROM IP",
            "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-eeprom.html",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product overview paragraphs 1–2; first Highlights item; integrated high-voltage circuitry description",
            "limit": "Confirms single-poly floating-gate storage and zero added masks for this product family. Control-terminal cross-sections and carrier paths are not disclosed. Family maxima and qualifications for selected nodes cannot be combined into a guarantee for every macro."
          },
          {
            "id": "ch-mtp-ememory-neoee",
            "label": "eMemory: NeoEE Single-Poly Embedded EEPROM",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly description; Technical Principles: capacitive-coupling MOS devices, selectors, and FN charge transfer in both directions",
            "limit": "Confirms the identified single-poly floating-gate technology and FN program/erase principles. Complete terminal biases, cross-section dimensions, and paired reliability ratings for a target macro were not obtained."
          },
          {
            "id": "ch-mtp-ememory-neomtp",
            "label": "eMemory: NeoMTP Single-Poly p-Type Floating-Gate Principles",
            "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
            "kind": "Manufacturer Technical Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Opening single-poly and additional-erase-gate descriptions; Technical Principles: p-type FG-MOSFET, CHEI, and FN erase destination",
            "limit": "The manufacturer describes channel-hot-hole-induced hot-electron injection and FN electron transfer from floating gate to erase gate. Do not substitute an n-channel/source-erase cross-section or extend this mechanism to NeoEE or other vendors' MTP."
          },
          {
            "id": "ch-mtp-xfab-xc06",
            "label": "X-FAB: Historical XC06 Double-Poly Embedded EEPROM Process Brief",
            "url": "https://www.fbe-asic.com/documents/is-xc06.pdf",
            "kind": "Manufacturer-Authored Process Document",
            "date": "Rev 09/2003; reviewed 2026-09-10",
            "locator": "Page 1 Main Process Features: Flash/EEPROM tunnel oxide and double-poly stack; page 2 EEPROM macros; revision footer",
            "limit": "A 2003 X-FAB-authored document publicly hosted by FBE ASIC. Used only as a historical foundry example. Current availability, the complete EEPROM cross-section, and carrier paths are not established. Base-CMOS single-poly specifications cannot substitute for the NVM-option stack."
          },
          {
            "id": "ch-mtp-ymc-product",
            "label": "Yield Microelectronics: Logic-Process Embedded MTP IP",
            "url": "https://www.ymc.com.tw/index_en.php",
            "kind": "Manufacturer Company and Product Introduction",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "About YMC paragraph: ymtp core technology, logic-process-based MTP eNVM, and licensing customers",
            "limit": "Confirms YMC's MTP IP business and customer types. This paragraph does not disclose the polysilicon count, bitcell, or program/erase mechanism of every product."
          },
          {
            "id": "ch-mtp-ymc-singlepoly",
            "label": "Yield Microelectronics: Single-Floating-Gate NVM Patent US7423903B2",
            "url": "https://patents.google.com/patent/US7423903B2/en",
            "kind": "Patent",
            "date": "Granted 2008-09-09; reviewed 2026-09-10",
            "locator": "Figures 1, 2A, and 2B; fabrication paragraphs describing one polysilicon deposition and patterning; original-assignee field",
            "limit": "Establishes a disclosed YMC single-poly implementation connecting transistor and capacitor gates into one floating node. It does not identify the cell of every current ymtp product; bias conditions and transfer directions must be read separately for each embodiment."
          },
          {
            "id": "ch-mtp-floadia-zt",
            "label": "Floadia: LEE Flash ZT Zero-Added-Mask MTP",
            "url": "https://floadia.com/product/lee-flash-zt/",
            "kind": "Manufacturer Product Page",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Product Info; Major Features items 4–5; FN program/erase paragraph",
            "limit": "Confirms MTP, standard CMOS, zero added masks, and FN programming/erase. This page does not explicitly state the polysilicon count. Cycle figures differ across page sections and are not adopted as a common guarantee."
          },
          {
            "id": "ch-mtp-floadia-zt-fg",
            "label": "Floadia and Maxchip: Public Floating-Gate LEE Flash ZT MTP Integration",
            "url": "https://floadia.com/news/422/",
            "kind": "Manufacturer Announcement",
            "date": "2016-05-20; reviewed 2026-09-10",
            "locator": "2016-05-20 title and announcement; paragraph identifying floating-gate storage and FN program/erase",
            "limit": "An identified historical integration on Maxchip 0.18 um BCD supports floating-gate storage and FN program/erase. The polysilicon count is not stated and cannot be inferred from zero added masks. These generation-specific ratings do not apply to all current ZT products."
          },
          {
            "id": "ch-pat-eeprom-window",
            "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
            "url": "https://patents.google.com/patent/US4115914A/en",
            "kind": "Patent",
            "date": "Granted 1978-09-26; reviewed 2026-09-10",
            "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
            "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
          }
        ],
        "variants": [
          {
            "id": "double-poly-window",
            "title": "Double-Poly EEPROM: Local-Window Principle",
            "summary": "Uses the control/floating gates and local window in US4115914A to explain the double-poly EEPROM route. This is not a named foundry macro cross-section; process details, tunneling terminals and operating conditions remain vendor-specific.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-mtp-read-double-poly-window-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-double-poly-window-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-double-poly-window-1-en-title\">Double-Poly EEPROM: Local-Window Principle — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-mtp-read-double-poly-window-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-read-double-poly-window-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-double-poly-window-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-double-poly-window-2-en-title\">Double-Poly EEPROM: Local-Window Principle — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-mtp-read-double-poly-window-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-read-double-poly-window-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-double-poly-window-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-double-poly-window-3-en-title\">Double-Poly EEPROM: Local-Window Principle — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-mtp-read-double-poly-window-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><rect x=\"169\" y=\"148\" width=\"33\" height=\"13\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"169\" y=\"161\" width=\"33\" height=\"8\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M112 181H150\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-read-double-poly-window-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-window"
                ]
              },
              {
                "id": "op-mtp-read-double-poly-window-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-double-poly-window-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-double-poly-window-4-en-title\">Double-Poly EEPROM: Local-Window Principle — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-mtp-read-double-poly-window-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-double-poly-window-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-read-double-poly-window-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
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              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-window",
                "label": "Hughes Aircraft Company: Local Tunnel-Window EEPROM Patent US4115914A",
                "url": "https://patents.google.com/patent/US4115914A/en",
                "kind": "Patent",
                "date": "Granted 1978-09-26; reviewed 2026-09-10",
                "locator": "Front page of the original publication; Figures 3i and 6; claims 2 and 9; parent application in the priority chain",
                "limit": "1976-03-26 is the parent-application date found in the records; this application was filed in 1977. The earliest date in a priority chain is not a legal determination of the effective priority of every claim."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "buried-control",
            "title": "Single Poly: Buried-Control CHE/Source FN Example",
            "summary": "Figures 4 and 5 of US5844271A share one FG conductor, with control buried in silicon. This teaching example does not define current vendors’ MTP cells or carrier paths. Erase coupling remains symbolic; inconsistent read entries in Table 2 are not reproduced.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-mtp-read-buried-control-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-buried-control-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-buried-control-1-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-mtp-read-buried-control-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-read-buried-control-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-buried-control-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-buried-control-2-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-mtp-read-buried-control-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG = V_R</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +v</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M80 179V157\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-read-buried-control-2-en-field)\" stroke-dasharray=\"6 5\"/><text x=\"78\" y=\"101\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">C_CG</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-read-buried-control-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-buried-control-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-buried-control-3-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-mtp-read-buried-control-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"23\" y=\"175\" width=\"93\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"145\" y=\"175\" width=\"190\" height=\"56\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"35\" y=\"182\" width=\"69\" height=\"24\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"29\" y=\"149\" width=\"81\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"151\" y=\"175\" width=\"40\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"292\" y=\"175\" width=\"36\" height=\"30\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"163\" width=\"76\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"233\" y=\"145\" width=\"87\" height=\"30\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M29 122H320V145H233V163H157V149H29Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.5\"/><text x=\"73\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"70\" y=\"201\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG n+</text><text x=\"191\" y=\"144\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><text x=\"166\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"310\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"240\" y=\"225\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M127 111V234\" fill=\"none\" stroke=\"#7c8996\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><text x=\"178\" y=\"39\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">One Floating Gate</text><text x=\"67\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CG = V_R</text><path d=\"M68 207V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"174\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +v</text><path d=\"M172 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"300\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><path d=\"M310 206V235\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-charge=\"stored\" cx=\"102\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"102\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"134\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"141\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M285 183H264\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-read-buried-control-3-en-electron)\"/><circle cx=\"243\" cy=\"182\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M233.25 191.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"243\" y=\"82\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              },
              {
                "id": "op-mtp-read-buried-control-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-mtp-read-buried-control-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-mtp-read-buried-control-4-en-title\">Single Poly: Buried-Control CHE/Source FN Example — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-mtp-read-buried-control-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-mtp-read-buried-control-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-mtp-read-buried-control-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-eeprom-singlepoly"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-eeprom-singlepoly",
                "label": "Cypress Semiconductor: Buried-Control-Gate Single-Poly EEPROM Patent US5844271A",
                "url": "https://patents.google.com/patent/US5844271A/en",
                "kind": "Patent",
                "date": "Granted 1998-12-01; reviewed 2026-09-10",
                "locator": "Figures 3–6; buried control electrode, thick/thin oxide regions, and operating descriptions; claim 1",
                "limit": "Demonstrates one single-poly EEPROM implementation. It does not establish that current Synopsys MTP uses this structure or the same hot-electron injection and tunneling paths."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nor",
        "operationId": "write",
        "title": "Program: Compare Channel Hot-Electron and Source-Side Injection",
        "summary": "Source-side injection uses the potential drop at the boundary between the selection and storage regions to energize channel electrons, which are collected by the field toward the floating gate. Source/drain labels and biases must follow the original drawing; injection locations in different structures cannot be interchanged arbitrarily. Higher injection efficiency also does not eliminate the macro's need for voltage boosting, current limiting, or verification.",
        "sources": [
          {
            "id": "ch-pat-nor-splitgate",
            "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
            "url": "https://patents.google.com/patent/US6232180B1/en",
            "kind": "Patent",
            "date": "Granted 2001-05-15; reviewed 2026-09-10",
            "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
            "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
          },
          {
            "id": "ch-tech-superflash",
            "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
            "kind": "Manufacturer Technical Brochure",
            "date": "2018-03; reviewed 2026-09-10",
            "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
            "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
          },
          {
            "id": "ch-maturity-nor-product",
            "label": "Microchip: SST39SF020A Parallel Flash Product Page",
            "url": "https://www.microchip.com/en-us/product/SST39SF020A",
            "kind": "Manufacturer Status for an Identified Product",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Model, product status, and 2 Mb / 4.5–5.5 V parallel flash summary",
            "limit": "Listed as in production when reviewed. The 4.5–5.5 V range is this product's supply range, not an interface voltage for all NOR and certainly not the cell's tunneling bias."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          }
        ],
        "variants": [
          {
            "id": "stacked-che",
            "title": "Stacked Gate: Drain CHE/Source FN",
            "summary": "Corresponds to conventional stacked-gate mechanisms in the background of US6232180B1, not to its proposed split-gate invention.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-nor-write-stacked-che-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-stacked-che-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-stacked-che-1-en-title\">Stacked Gate: Drain CHE/Source FN — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-nor-write-stacked-che-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-stacked-che-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-stacked-che-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-stacked-che-2-en-title\">Stacked Gate: Drain CHE/Source FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-write-stacked-che-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-stacked-che-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-stacked-che-3-en",
                "title": "Track Electron Transfer",
                "caption": "Channel electrons accelerate before local injection into storage.",
                "state": "Q < 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-stacked-che-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-stacked-che-3-en-title\">Stacked Gate: Drain CHE/Source FN — Track Electron Transfer. Channel electrons accelerate before local injection into storage.</title><defs><marker id=\"op-nor-write-stacked-che-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M107 180H246\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-stacked-che-3-en-electron)\"/><path d=\"M246 181Q260 164 255 137\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-stacked-che-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"256\" cy=\"155\" r=\"10\" fill=\"#075f9d\"/><text x=\"256\" y=\"162\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><ellipse cx=\"246\" cy=\"181\" rx=\"19\" ry=\"10\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\"/><text x=\"305\" y=\"57\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CHE</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-stacked-che-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-stacked-che-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-stacked-che-4-en-title\">Stacked Gate: Drain CHE/Source FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-write-stacked-che-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-stacked-che-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "superflash-ssi",
            "title": "SuperFlash: SSI/Inter-Gate FN",
            "summary": "WL-poly erase exit of the first/second generation; third-generation dedicated erase gates and another patent’s well-erase conditions are not substituted.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-write-superflash-ssi-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-superflash-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-superflash-ssi-1-en-title\">SuperFlash: SSI/Inter-Gate FN — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-nor-write-superflash-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-write-superflash-ssi-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "SG = V_ON; S +V_P; D = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-superflash-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-superflash-ssi-2-en-title\">SuperFlash: SSI/Inter-Gate FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-write-superflash-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_ON</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-superflash-ssi-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-write-superflash-ssi-3-en",
                "title": "Track Electron Transfer",
                "caption": "Channel electrons accelerate before local injection into storage.",
                "state": "Q < 0",
                "stimulus": "SG = V_ON; S +V_P; D = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-superflash-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-superflash-ssi-3-en-title\">SuperFlash: SSI/Inter-Gate FN — Track Electron Transfer. Channel electrons accelerate before local injection into storage.</title><defs><marker id=\"op-nor-write-superflash-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_ON</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M107 180H185\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-superflash-ssi-3-en-electron)\"/><path d=\"M185 181Q199 164 194 137\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-superflash-ssi-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"195\" cy=\"155\" r=\"10\" fill=\"#075f9d\"/><text x=\"195\" y=\"162\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><ellipse cx=\"185\" cy=\"181\" rx=\"19\" ry=\"10\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\"/><text x=\"305\" y=\"57\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SSI</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-write-superflash-ssi-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-superflash-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-superflash-ssi-4-en-title\">SuperFlash: SSI/Inter-Gate FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-write-superflash-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-superflash-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-tech-superflash",
                "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "Manufacturer Technical Brochure",
                "date": "2018-03; reviewed 2026-09-10",
                "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
                "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "well-erase-ssi",
            "title": "US6232180B1: SSI/Well-Channel FN",
            "summary": "SG is below an overlapping FG; source is raised for program, while SG/S/D float and the well is raised for erase.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-write-well-erase-ssi-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-well-erase-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-well-erase-ssi-1-en-title\">US6232180B1: SSI/Well-Channel FN — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-nor-write-well-erase-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-well-erase-ssi-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "SG = V_ON; S +V_P; D = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-well-erase-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-well-erase-ssi-2-en-title\">US6232180B1: SSI/Well-Channel FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-write-well-erase-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_ON</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-well-erase-ssi-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-well-erase-ssi-3-en",
                "title": "Track Electron Transfer",
                "caption": "Channel electrons accelerate before local injection into storage.",
                "state": "Q < 0",
                "stimulus": "SG = V_ON; S +V_P; D = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-well-erase-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-well-erase-ssi-3-en-title\">US6232180B1: SSI/Well-Channel FN — Track Electron Transfer. Channel electrons accelerate before local injection into storage.</title><defs><marker id=\"op-nor-write-well-erase-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_ON</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><path d=\"M107 180H185\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-well-erase-ssi-3-en-electron)\"/><path d=\"M185 181Q199 164 194 137\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-write-well-erase-ssi-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"195\" cy=\"155\" r=\"10\" fill=\"#075f9d\"/><text x=\"195\" y=\"162\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><ellipse cx=\"185\" cy=\"181\" rx=\"19\" ry=\"10\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\"/><text x=\"305\" y=\"57\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SSI</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-write-well-erase-ssi-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-write-well-erase-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-write-well-erase-ssi-4-en-title\">US6232180B1: SSI/Well-Channel FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-write-well-erase-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-write-well-erase-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nor",
        "operationId": "erase",
        "title": "Erase: Follow the Structure's Electron Exit Path",
        "summary": "Two split-gate implementations may have different erase barriers and charge exits, so their terminal voltages cannot be combined into one bias set. Erase scope depends on shared gates, wells, and array control. Updating a byte still requires the product's block-erase and data-preservation flow; fine-grained reading is not equivalent to fine-grained erase.",
        "sources": [
          {
            "id": "ch-pat-nor-splitgate",
            "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
            "url": "https://patents.google.com/patent/US6232180B1/en",
            "kind": "Patent",
            "date": "Granted 2001-05-15; reviewed 2026-09-10",
            "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
            "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
          },
          {
            "id": "ch-tech-superflash",
            "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
            "kind": "Manufacturer Technical Brochure",
            "date": "2018-03; reviewed 2026-09-10",
            "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
            "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
          },
          {
            "id": "ch-maturity-nor-product",
            "label": "Microchip: SST39SF020A Parallel Flash Product Page",
            "url": "https://www.microchip.com/en-us/product/SST39SF020A",
            "kind": "Manufacturer Status for an Identified Product",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Model, product status, and 2 Mb / 4.5–5.5 V parallel flash summary",
            "limit": "Listed as in production when reviewed. The 4.5–5.5 V range is this product's supply range, not an interface voltage for all NOR and certainly not the cell's tunneling bias."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          }
        ],
        "variants": [
          {
            "id": "stacked-che",
            "title": "Stacked Gate: Drain CHE/Source FN",
            "summary": "Corresponds to conventional stacked-gate mechanisms in the background of US6232180B1, not to its proposed split-gate invention.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-nor-erase-stacked-che-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-stacked-che-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-stacked-che-1-en-title\">Stacked Gate: Drain CHE/Source FN — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-nor-erase-stacked-che-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-stacked-che-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-stacked-che-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-stacked-che-2-en-title\">Stacked Gate: Drain CHE/Source FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-erase-stacked-che-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_E</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-stacked-che-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-stacked-che-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-stacked-che-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-stacked-che-3-en-title\">Stacked Gate: Drain CHE/Source FN — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-nor-erase-stacked-che-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_E</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M95 132V190\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-stacked-che-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"95\" cy=\"162\" r=\"10\" fill=\"#075f9d\"/><text x=\"95\" y=\"169\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-stacked-che-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-stacked-che-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-stacked-che-4-en-title\">Stacked Gate: Drain CHE/Source FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-erase-stacked-che-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-stacked-che-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "superflash-ssi",
            "title": "SuperFlash: SSI/Inter-Gate FN",
            "summary": "WL-poly erase exit of the first/second generation; third-generation dedicated erase gates and another patent’s well-erase conditions are not substituted.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-erase-superflash-ssi-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-superflash-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-superflash-ssi-1-en-title\">SuperFlash: SSI/Inter-Gate FN — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-nor-erase-superflash-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-erase-superflash-ssi-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_WL > V_FG",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-superflash-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-superflash-ssi-2-en-title\">SuperFlash: SSI/Inter-Gate FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-erase-superflash-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL +V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-superflash-ssi-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-erase-superflash-ssi-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "V_WL > V_FG",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-superflash-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-superflash-ssi-3-en-title\">SuperFlash: SSI/Inter-Gate FN — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-nor-erase-superflash-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL +V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M220 134Q231 116 218 87\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-superflash-ssi-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"229\" cy=\"105\" r=\"10\" fill=\"#075f9d\"/><text x=\"229\" y=\"112\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"310\" y=\"110\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-erase-superflash-ssi-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-superflash-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-superflash-ssi-4-en-title\">SuperFlash: SSI/Inter-Gate FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-erase-superflash-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-superflash-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-tech-superflash",
                "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "Manufacturer Technical Brochure",
                "date": "2018-03; reviewed 2026-09-10",
                "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
                "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "well-erase-ssi",
            "title": "US6232180B1: SSI/Well-Channel FN",
            "summary": "SG is below an overlapping FG; source is raised for program, while SG/S/D float and the well is raised for erase.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-erase-well-erase-ssi-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-well-erase-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-well-erase-ssi-1-en-title\">US6232180B1: SSI/Well-Channel FN — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-nor-erase-well-erase-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-well-erase-ssi-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "SG/S/D = FLT; W +V_E",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-well-erase-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-well-erase-ssi-2-en-title\">US6232180B1: SSI/Well-Channel FN — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nor-erase-well-erase-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = FLT</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D FLT</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S FLT</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">W +V_E</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-well-erase-ssi-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-well-erase-ssi-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "SG/S/D = FLT; W +V_E",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-well-erase-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-well-erase-ssi-3-en-title\">US6232180B1: SSI/Well-Channel FN — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-nor-erase-well-erase-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = FLT</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D FLT</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S FLT</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">W +V_E</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M225 132V190\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-erase-well-erase-ssi-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"225\" cy=\"162\" r=\"10\" fill=\"#075f9d\"/><text x=\"225\" y=\"169\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-erase-well-erase-ssi-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-erase-well-erase-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-erase-well-erase-ssi-4-en-title\">US6232180B1: SSI/Well-Channel FN — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nor-erase-well-erase-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-erase-well-erase-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"208\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"208\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nor",
        "operationId": "read",
        "title": "Read: Sense the Selected Cell's Channel Directly",
        "summary": "NOR does not require an entire string of storage cells to conduct before one cell can be read, which favors random access. An overerased stacked-gate cell that conducts while unselected can corrupt the shared bitline; a separate selection function helps shut off that path. Actual latency still includes wordlines, bitlines, sensing, and the external interface, not only individual-cell speed.",
        "sources": [
          {
            "id": "ch-pat-nor-splitgate",
            "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
            "url": "https://patents.google.com/patent/US6232180B1/en",
            "kind": "Patent",
            "date": "Granted 2001-05-15; reviewed 2026-09-10",
            "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
            "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
          },
          {
            "id": "ch-tech-superflash",
            "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
            "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
            "kind": "Manufacturer Technical Brochure",
            "date": "2018-03; reviewed 2026-09-10",
            "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
            "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
          },
          {
            "id": "ch-maturity-nor-product",
            "label": "Microchip: SST39SF020A Parallel Flash Product Page",
            "url": "https://www.microchip.com/en-us/product/SST39SF020A",
            "kind": "Manufacturer Status for an Identified Product",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Model, product status, and 2 Mb / 4.5–5.5 V parallel flash summary",
            "limit": "Listed as in production when reviewed. The 4.5–5.5 V range is this product's supply range, not an interface voltage for all NOR and certainly not the cell's tunneling bias."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          }
        ],
        "variants": [
          {
            "id": "stacked-che",
            "title": "Stacked Gate: Drain CHE/Source FN",
            "summary": "Corresponds to conventional stacked-gate mechanisms in the background of US6232180B1, not to its proposed split-gate invention.",
            "mechanism": "CHE / FN",
            "frames": [
              {
                "id": "op-nor-read-stacked-che-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-stacked-che-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-stacked-che-1-en-title\">Stacked Gate: Drain CHE/Source FN — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-nor-read-stacked-che-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-stacked-che-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-stacked-che-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-stacked-che-2-en-title\">Stacked Gate: Drain CHE/Source FN — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-nor-read-stacked-che-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-stacked-che-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-stacked-che-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-stacked-che-3-en-title\">Stacked Gate: Drain CHE/Source FN — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-nor-read-stacked-che-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"217\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M112 181H150\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-stacked-che-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-stacked-che-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-stacked-che-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-stacked-che-4-en-title\">Stacked Gate: Drain CHE/Source FN — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-nor-read-stacked-che-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-stacked-che-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-stacked-che-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "superflash-ssi",
            "title": "SuperFlash: SSI/Inter-Gate FN",
            "summary": "WL-poly erase exit of the first/second generation; third-generation dedicated erase gates and another patent’s well-erase conditions are not substituted.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-read-superflash-ssi-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-superflash-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-superflash-ssi-1-en-title\">SuperFlash: SSI/Inter-Gate FN — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-nor-read-superflash-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-read-superflash-ssi-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-superflash-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-superflash-ssi-2-en-title\">SuperFlash: SSI/Inter-Gate FN — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-nor-read-superflash-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"201\" y=\"145\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-read-superflash-ssi-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-superflash-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-superflash-ssi-3-en-title\">SuperFlash: SSI/Inter-Gate FN — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-nor-read-superflash-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"174\" y=\"109\" width=\"106\" height=\"39\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M98 73H245V109H174V147H98Z\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\"/><rect x=\"183\" y=\"122\" width=\"97\" height=\"26\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"135\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"190\" y=\"96\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><path d=\"M136 35V76\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"234\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"234\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"262\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"262\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M248 181H210\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-superflash-ssi-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              },
              {
                "id": "op-nor-read-superflash-ssi-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-superflash-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-superflash-ssi-4-en-title\">SuperFlash: SSI/Inter-Gate FN — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-nor-read-superflash-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-superflash-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-superflash-ssi-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-tech-superflash"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-tech-superflash",
                "label": "SST / Microchip: SuperFlash Technology Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "Manufacturer Technical Brochure",
                "date": "2018-03; reviewed 2026-09-10",
                "locator": "Pages 2–3; stacked-gate/split-gate comparison; source-side injection, inter-gate FN erase, and three structural generations",
                "limit": "Structures and mechanisms are read in the context of the identified SuperFlash generation. The 2018 shipment figures, node table, and typical reliability data are not guarantees for every product in 2026."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "well-erase-ssi",
            "title": "US6232180B1: SSI/Well-Channel FN",
            "summary": "SG is below an overlapping FG; source is raised for program, while SG/S/D float and the well is raised for erase.",
            "mechanism": "SSI / FN",
            "frames": [
              {
                "id": "op-nor-read-well-erase-ssi-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-well-erase-ssi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-well-erase-ssi-1-en-title\">US6232180B1: SSI/Well-Channel FN — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-nor-read-well-erase-ssi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG / WL</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-well-erase-ssi-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-well-erase-ssi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-well-erase-ssi-2-en-title\">US6232180B1: SSI/Well-Channel FN — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-nor-read-well-erase-ssi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-well-erase-ssi-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-well-erase-ssi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-well-erase-ssi-3-en-title\">US6232180B1: SSI/Well-Channel FN — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-nor-read-well-erase-ssi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"113\" width=\"85\" height=\"35\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"98\" y=\"118\" width=\"77\" height=\"29\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M122 86H276V148H183V113H122Z\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\"/><text x=\"136\" y=\"140\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG</text><text x=\"226\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FG</text><path d=\"M136 35H51V130H98\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"207\" width=\"111\" height=\"25\" fill=\"#8eacc7\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"183\" y=\"226\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P-WELL</text><circle data-charge=\"stored\" cx=\"210\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"210\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M248 181H210\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-well-erase-ssi-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              },
              {
                "id": "op-nor-read-well-erase-ssi-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nor-read-well-erase-ssi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nor-read-well-erase-ssi-4-en-title\">US6232180B1: SSI/Well-Channel FN — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-nor-read-well-erase-ssi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nor-read-well-erase-ssi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nor-read-well-erase-ssi-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nor-splitgate"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "FG / Vₜ",
                "meaning": "FG is a floating gate without a DC terminal; Vₜ is threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nor-splitgate",
                "label": "Worldwide Semiconductor Manufacturing / TSMC: Split-Gate Flash Patent US6232180B1",
                "url": "https://patents.google.com/patent/US6232180B1/en",
                "kind": "Patent",
                "date": "Granted 2001-05-15; reviewed 2026-09-10",
                "locator": "Assignment records from 1999 and 2000; Figure 6 and its operating table; claims 4 and 6",
                "limit": "This embodiment uses source-side injection and channel erase. Its operating table must not be combined with SuperFlash inter-gate FN erase in the same cross-section. Aggregated assignee metadata must be checked against the assignment timeline."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "sonos",
        "operationId": "write",
        "title": "Program: Distinguish Tunneling Capture from Local Hot-Electron Injection",
        "summary": "In a tunneling example, charge crosses the thin dielectric from the channel side and is then trapped. In a hot-electron example, carriers first gain energy near the drain, producing localized stored charge. An insulating trapping layer does not automatically equalize potentials and charge distributions as a conductor does. The product page does not disclose the complete film thicknesses and terminal biases, so this explanation remains at the verified mechanism level.",
        "sources": [
          {
            "id": "ch-pat-sonos",
            "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
            "url": "https://patents.google.com/patent/WO1981000790A1/en",
            "kind": "Patent",
            "date": "Published 1981-03-19; reviewed 2026-09-10",
            "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
            "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
          },
          {
            "id": "ch-pat-nrom",
            "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
            "url": "https://patents.google.com/patent/US5768192A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-16; reviewed 2026-09-10",
            "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
            "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
          },
          {
            "id": "ch-product-sonos",
            "label": "Infineon: SONOS Embedded Flash IP Solutions",
            "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
            "kind": "Manufacturer Technology and Volume-Production Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
            "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
          },
          {
            "id": "op-pat-nrom-hhi",
            "label": "Saifun: Self-Aligned NROM Programming and Erasure Areas",
            "url": "https://patents.google.com/patent/US6664588B2/en",
            "kind": "Public Patent",
            "date": "2003; 2026-09-10 accessed",
            "locator": "Figures 4, 8A, 9, and 10–11; band-to-band hole generation and localized hot-hole injection",
            "limit": "The pocket implant and local hole path belong to this example; US5768192A is not used as evidence for this erase path."
          },
          {
            "id": "op-pat-sonos-fn",
            "label": "Cypress: SONOS ONO Stack Scaling",
            "url": "https://patents.google.com/patent/WO2014008160A2/en",
            "kind": "Public Patent",
            "date": "2014; 2026-09-10 accessed",
            "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
            "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
          }
        ],
        "variants": [
          {
            "id": "uniform-fn",
            "title": "Uniform SONOS: Electron/Hole Tunneling",
            "summary": "Storage-transistor detail; Infineon’s 2T cell also has a series selector. Carrier paths follow the public Cypress patent without asserting a current macro’s complete stack.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-sonos-write-uniform-fn-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-uniform-fn-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-uniform-fn-1-en-title\">Uniform SONOS: Electron/Hole Tunneling — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-sonos-write-uniform-fn-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-write-uniform-fn-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-uniform-fn-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-uniform-fn-2-en-title\">Uniform SONOS: Electron/Hole Tunneling — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-sonos-write-uniform-fn-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-uniform-fn-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-write-uniform-fn-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons tunnel through the local barrier into isolated storage.",
                "state": "Q < 0",
                "stimulus": "V_G > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-uniform-fn-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-uniform-fn-3-en-title\">Uniform SONOS: Electron/Hole Tunneling — Track Electron Transfer. Electrons tunnel through the local barrier into isolated storage.</title><defs><marker id=\"op-sonos-write-uniform-fn-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M130 192V131\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-uniform-fn-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"130\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"130\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"mobile\" cx=\"236\" cy=\"161\" r=\"10\" fill=\"#075f9d\"/><text x=\"236\" y=\"168\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M236 192V134\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-uniform-fn-3-en-electron)\"/><text x=\"314\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-write-uniform-fn-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-uniform-fn-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-uniform-fn-4-en-title\">Uniform SONOS: Electron/Hole Tunneling — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-sonos-write-uniform-fn-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-uniform-fn-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "h+",
                "meaning": "Red plus signs are holes; red arrows show hole motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-product-sonos",
                "label": "Infineon: SONOS Embedded Flash IP Solutions",
                "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
                "kind": "Manufacturer Technology and Volume-Production Statement",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
                "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
              },
              {
                "id": "ch-pat-sonos",
                "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
                "url": "https://patents.google.com/patent/WO1981000790A1/en",
                "kind": "Patent",
                "date": "Published 1981-03-19; reviewed 2026-09-10",
                "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
                "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
              },
              {
                "id": "op-pat-sonos-fn",
                "label": "Cypress: SONOS ONO Stack Scaling",
                "url": "https://patents.google.com/patent/WO2014008160A2/en",
                "kind": "Public Patent",
                "date": "2014; 2026-09-10 accessed",
                "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
                "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "localized-nrom",
            "title": "Localized NROM: CHE/Reverse Read",
            "summary": "S/D keep their programming-time names; reverse read changes bias and current direction without silently renaming terminals.",
            "mechanism": "CHE",
            "frames": [
              {
                "id": "op-sonos-write-localized-nrom-1-en",
                "title": "Known Initial Charge",
                "caption": "Isolated storage starts within its programmable window.",
                "state": "Q ≈ 0",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-localized-nrom-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-localized-nrom-1-en-title\">Localized NROM: CHE/Reverse Read — Known Initial Charge. Isolated storage starts within its programmable window.</title><defs><marker id=\"op-sonos-write-localized-nrom-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-write-localized-nrom-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q ≈ 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-localized-nrom-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-localized-nrom-2-en-title\">Localized NROM: CHE/Reverse Read — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-sonos-write-localized-nrom-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M307 81V156\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-localized-nrom-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-write-localized-nrom-3-en",
                "title": "Track Electron Transfer",
                "caption": "Channel electrons accelerate before local injection into storage.",
                "state": "Q < 0",
                "stimulus": "G/CG +V_P; D +V_P; S = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-localized-nrom-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-localized-nrom-3-en-title\">Localized NROM: CHE/Reverse Read — Track Electron Transfer. Channel electrons accelerate before local injection into storage.</title><defs><marker id=\"op-sonos-write-localized-nrom-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G + V_P</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_P</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M107 180H246\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-localized-nrom-3-en-electron)\"/><path d=\"M246 181Q260 164 255 137\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-write-localized-nrom-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"256\" cy=\"155\" r=\"10\" fill=\"#075f9d\"/><text x=\"256\" y=\"162\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><ellipse cx=\"246\" cy=\"181\" rx=\"19\" ry=\"10\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\"/><text x=\"305\" y=\"57\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CHE</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-write-localized-nrom-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↑",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-write-localized-nrom-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-write-localized-nrom-4-en-title\">Localized NROM: CHE/Reverse Read — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-sonos-write-localized-nrom-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-write-localized-nrom-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nrom",
                "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
                "url": "https://patents.google.com/patent/US5768192A/en",
                "kind": "Patent",
                "date": "Granted 1998-06-16; reviewed 2026-09-10",
                "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
                "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "sonos",
        "operationId": "erase",
        "title": "Erase: Follow the Trap Stack and Identified Mechanism",
        "summary": "Read US6664588B2 Figures 8A and 9–11 as a named pocket-implant erase example. Do not attribute that structure to US5768192A or substitute the SONOS FN diagram for NROM hot-hole erase. The cited implementation defines selection, pulse verification and erase granularity.",
        "sources": [
          {
            "id": "ch-pat-sonos",
            "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
            "url": "https://patents.google.com/patent/WO1981000790A1/en",
            "kind": "Patent",
            "date": "Published 1981-03-19; reviewed 2026-09-10",
            "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
            "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
          },
          {
            "id": "ch-pat-nrom",
            "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
            "url": "https://patents.google.com/patent/US5768192A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-16; reviewed 2026-09-10",
            "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
            "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
          },
          {
            "id": "ch-product-sonos",
            "label": "Infineon: SONOS Embedded Flash IP Solutions",
            "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
            "kind": "Manufacturer Technology and Volume-Production Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
            "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
          },
          {
            "id": "op-pat-nrom-hhi",
            "label": "Saifun: Self-Aligned NROM Programming and Erasure Areas",
            "url": "https://patents.google.com/patent/US6664588B2/en",
            "kind": "Public Patent",
            "date": "2003; 2026-09-10 accessed",
            "locator": "Figures 4, 8A, 9, and 10–11; band-to-band hole generation and localized hot-hole injection",
            "limit": "The pocket implant and local hole path belong to this example; US5768192A is not used as evidence for this erase path."
          },
          {
            "id": "op-pat-sonos-fn",
            "label": "Cypress: SONOS ONO Stack Scaling",
            "url": "https://patents.google.com/patent/WO2014008160A2/en",
            "kind": "Public Patent",
            "date": "2014; 2026-09-10 accessed",
            "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
            "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
          }
        ],
        "variants": [
          {
            "id": "uniform-fn",
            "title": "Uniform SONOS: Electron/Hole Tunneling",
            "summary": "Storage-transistor detail; Infineon’s 2T cell also has a series selector. Carrier paths follow the public Cypress patent without asserting a current macro’s complete stack.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-sonos-erase-uniform-fn-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-uniform-fn-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-uniform-fn-1-en-title\">Uniform SONOS: Electron/Hole Tunneling — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-sonos-erase-uniform-fn-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-erase-uniform-fn-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-uniform-fn-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-uniform-fn-2-en-title\">Uniform SONOS: Electron/Hole Tunneling — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-sonos-erase-uniform-fn-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-erase-uniform-fn-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-erase-uniform-fn-3-en",
                "title": "Hole Supply and Neutralization",
                "caption": "Holes enter the trap layer and reduce net stored negative charge.",
                "state": "Q → 0",
                "stimulus": "V_G < V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-uniform-fn-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-uniform-fn-3-en-title\">Uniform SONOS: Electron/Hole Tunneling — Hole Supply and Neutralization. Holes enter the trap layer and reduce net stored negative charge.</title><defs><marker id=\"op-sonos-erase-uniform-fn-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M130 188V143\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-erase-uniform-fn-3-en-hole)\"/><circle data-charge=\"mobile\" cx=\"130\" cy=\"165\" r=\"10\" fill=\"#b52f43\"/><text x=\"130\" y=\"172\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><circle data-charge=\"mobile\" cx=\"230\" cy=\"176\" r=\"10\" fill=\"#b52f43\"/><text x=\"230\" y=\"183\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><text x=\"313\" y=\"111\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">FN</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-erase-uniform-fn-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-uniform-fn-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-uniform-fn-4-en-title\">Uniform SONOS: Electron/Hole Tunneling — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-sonos-erase-uniform-fn-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-uniform-fn-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#b52f43\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "h+",
                "meaning": "Red plus signs are holes; red arrows show hole motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-product-sonos",
                "label": "Infineon: SONOS Embedded Flash IP Solutions",
                "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
                "kind": "Manufacturer Technology and Volume-Production Statement",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
                "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
              },
              {
                "id": "ch-pat-sonos",
                "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
                "url": "https://patents.google.com/patent/WO1981000790A1/en",
                "kind": "Patent",
                "date": "Published 1981-03-19; reviewed 2026-09-10",
                "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
                "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
              },
              {
                "id": "op-pat-sonos-fn",
                "label": "Cypress: SONOS ONO Stack Scaling",
                "url": "https://patents.google.com/patent/WO2014008160A2/en",
                "kind": "Public Patent",
                "date": "2014; 2026-09-10 accessed",
                "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
                "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "nrom-pocket-hhi",
            "title": "US6664588B2: Pocket BBT/Hot-Hole Erase",
            "summary": "Follows the one-sided pocket of Figures 8A and 9; hole injection must overlap the stored-electron region. This separate erase example is not attributed to US5768192A.",
            "mechanism": "BBT / HHI",
            "frames": [
              {
                "id": "op-sonos-erase-nrom-pocket-hhi-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-nrom-pocket-hhi-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-nrom-pocket-hhi-1-en-title\">US6664588B2: Pocket BBT/Hot-Hole Erase — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-sonos-erase-nrom-pocket-hhi-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M233 170H255V207Q228 209 233 170Z\" fill=\"#8f80b5\" stroke=\"#16334c\" stroke-width=\"1.3\"/><text x=\"282\" y=\"227\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P+</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "op-pat-nrom-hhi"
                ]
              },
              {
                "id": "op-sonos-erase-nrom-pocket-hhi-2-en",
                "title": "Establish the Required Field",
                "caption": "Negative gate and positive drain establish BBT and a local field at the pocket junction.",
                "state": "Q < 0",
                "stimulus": "G −V_E; D +V_E",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-nrom-pocket-hhi-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-nrom-pocket-hhi-2-en-title\">US6664588B2: Pocket BBT/Hot-Hole Erase — Establish the Required Field. Negative gate and positive drain establish BBT and a local field at the pocket junction.</title><defs><marker id=\"op-sonos-erase-nrom-pocket-hhi-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_E</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">BBT</text><path d=\"M233 170H255V207Q228 209 233 170Z\" fill=\"#8f80b5\" stroke=\"#16334c\" stroke-width=\"1.3\"/><text x=\"282\" y=\"227\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P+</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M307 156V81\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-erase-nrom-pocket-hhi-2-en-field)\"/><text x=\"328\" y=\"122\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">E</text><ellipse cx=\"250\" cy=\"181\" rx=\"24\" ry=\"17\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\"/></svg>",
                "sourceIds": [
                  "op-pat-nrom-hhi"
                ]
              },
              {
                "id": "op-sonos-erase-nrom-pocket-hhi-3-en",
                "title": "Hole Supply and Neutralization",
                "caption": "Holes enter the trap layer and reduce net stored negative charge.",
                "state": "Q → 0",
                "stimulus": "G −V_E; D +V_E",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-nrom-pocket-hhi-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-nrom-pocket-hhi-3-en-title\">US6664588B2: Pocket BBT/Hot-Hole Erase — Hole Supply and Neutralization. Holes enter the trap layer and reduce net stored negative charge.</title><defs><marker id=\"op-sonos-erase-nrom-pocket-hhi-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G − V_E</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +V_E</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">BBT</text><path d=\"M233 170H255V207Q228 209 233 170Z\" fill=\"#8f80b5\" stroke=\"#16334c\" stroke-width=\"1.3\"/><text x=\"282\" y=\"227\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P+</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"mobile\" cx=\"249\" cy=\"194\" r=\"10\" fill=\"#b52f43\"/><text x=\"249\" y=\"201\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><path d=\"M250 189Q222 173 245 138\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-erase-nrom-pocket-hhi-3-en-hole)\"/><circle data-charge=\"mobile\" cx=\"247\" cy=\"160\" r=\"10\" fill=\"#b52f43\"/><text x=\"247\" y=\"167\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><path d=\"M260 170H285\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-erase-nrom-pocket-hhi-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"273\" cy=\"184\" r=\"10\" fill=\"#075f9d\"/><text x=\"273\" y=\"191\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "op-pat-nrom-hhi"
                ]
              },
              {
                "id": "op-sonos-erase-nrom-pocket-hhi-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-erase-nrom-pocket-hhi-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-erase-nrom-pocket-hhi-4-en-title\">US6664588B2: Pocket BBT/Hot-Hole Erase — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-sonos-erase-nrom-pocket-hhi-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-erase-nrom-pocket-hhi-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><path d=\"M233 170H255V207Q228 209 233 170Z\" fill=\"#8f80b5\" stroke=\"#16334c\" stroke-width=\"1.3\"/><text x=\"282\" y=\"227\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">P+</text><text x=\"308\" y=\"56\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "op-pat-nrom-hhi"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "h+",
                "meaning": "Red plus signs are holes; red arrows show hole motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "op-pat-nrom-hhi",
                "label": "Saifun: Self-Aligned NROM Programming and Erasure Areas",
                "url": "https://patents.google.com/patent/US6664588B2/en",
                "kind": "Public Patent",
                "date": "2003; 2026-09-10 accessed",
                "locator": "Figures 4, 8A, 9, and 10–11; band-to-band hole generation and localized hot-hole injection",
                "limit": "The pocket implant and local hole path belong to this example; US5768192A is not used as evidence for this erase path."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "sonos",
        "operationId": "read",
        "title": "Read: Sense the SONOS Window and the NROM Direction",
        "summary": "Read current travels through the channel; it does not empty all electrons from the nitride. A channel-wide threshold model explains many SONOS operations, but ignoring charge position in a localized cell can obscure why reverse reading works. Read direction must be labeled against the original programming terminals, rather than silently exchanging source and drain names in a drawing.",
        "sources": [
          {
            "id": "ch-pat-sonos",
            "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
            "url": "https://patents.google.com/patent/WO1981000790A1/en",
            "kind": "Patent",
            "date": "Published 1981-03-19; reviewed 2026-09-10",
            "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
            "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
          },
          {
            "id": "ch-pat-nrom",
            "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
            "url": "https://patents.google.com/patent/US5768192A/en",
            "kind": "Patent",
            "date": "Granted 1998-06-16; reviewed 2026-09-10",
            "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
            "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
          },
          {
            "id": "ch-product-sonos",
            "label": "Infineon: SONOS Embedded Flash IP Solutions",
            "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
            "kind": "Manufacturer Technology and Volume-Production Statement",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
            "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
          },
          {
            "id": "op-pat-nrom-hhi",
            "label": "Saifun: Self-Aligned NROM Programming and Erasure Areas",
            "url": "https://patents.google.com/patent/US6664588B2/en",
            "kind": "Public Patent",
            "date": "2003; 2026-09-10 accessed",
            "locator": "Figures 4, 8A, 9, and 10–11; band-to-band hole generation and localized hot-hole injection",
            "limit": "The pocket implant and local hole path belong to this example; US5768192A is not used as evidence for this erase path."
          },
          {
            "id": "op-pat-sonos-fn",
            "label": "Cypress: SONOS ONO Stack Scaling",
            "url": "https://patents.google.com/patent/WO2014008160A2/en",
            "kind": "Public Patent",
            "date": "2014; 2026-09-10 accessed",
            "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
            "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
          }
        ],
        "variants": [
          {
            "id": "uniform-fn",
            "title": "Uniform SONOS: Electron/Hole Tunneling",
            "summary": "Storage-transistor detail; Infineon’s 2T cell also has a series selector. Carrier paths follow the public Cypress patent without asserting a current macro’s complete stack.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-sonos-read-uniform-fn-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-uniform-fn-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-uniform-fn-1-en-title\">Uniform SONOS: Electron/Hole Tunneling — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-sonos-read-uniform-fn-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-read-uniform-fn-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Select the measured path and apply low-field read conditions.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-uniform-fn-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-uniform-fn-2-en-title\">Uniform SONOS: Electron/Hole Tunneling — Apply Low-Field Read Bias. Select the measured path and apply low-field read conditions.</title><defs><marker id=\"op-sonos-read-uniform-fn-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-read-uniform-fn-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-uniform-fn-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-uniform-fn-3-en-title\">Uniform SONOS: Electron/Hole Tunneling — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-sonos-read-uniform-fn-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S 0</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D +v</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"112\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"112\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"244\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"244\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M112 181H150\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-read-uniform-fn-3-en-electron)\"/><circle cx=\"183\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M173.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              },
              {
                "id": "op-sonos-read-uniform-fn-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-uniform-fn-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-uniform-fn-4-en-title\">Uniform SONOS: Electron/Hole Tunneling — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-sonos-read-uniform-fn-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-uniform-fn-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-read-uniform-fn-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-product-sonos",
                  "ch-pat-sonos",
                  "op-pat-sonos-fn"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "h+",
                "meaning": "Red plus signs are holes; red arrows show hole motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-product-sonos",
                "label": "Infineon: SONOS Embedded Flash IP Solutions",
                "url": "https://www.infineon.com/products/memories/embedded-flash-ip-solutions",
                "kind": "Manufacturer Technology and Volume-Production Statement",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "SONOS technology section; production nodes; 2T cell and FN program/erase; macro-family specification list",
                "limit": "The 25 ns, 100,000-cycle, and ten-year retention figures are listed at family level without fully pairing each node, capacity, temperature, and post-cycling retention condition. They are not combined into one guaranteed specification. This evidence does not cover all NROM or 3D NAND implementations."
              },
              {
                "id": "ch-pat-sonos",
                "label": "NCR: SONOS Blocking-Oxide Patent WO1981000790A1",
                "url": "https://patents.google.com/patent/WO1981000790A1/en",
                "kind": "Patent",
                "date": "Published 1981-03-19; reviewed 2026-09-10",
                "locator": "Figure 1; descriptions of silicon nitride and the upper/lower oxides; claim 1; PCT priority information",
                "limit": "Provides an early SONOS stack and retention/program-erase tradeoffs. Its film thicknesses, biases, and cycling results must not be extrapolated to modern SONOS, MONOS, or 3D NAND."
              },
              {
                "id": "op-pat-sonos-fn",
                "label": "Cypress: SONOS ONO Stack Scaling",
                "url": "https://patents.google.com/patent/WO2014008160A2/en",
                "kind": "Public Patent",
                "date": "2014; 2026-09-10 accessed",
                "locator": "Figures 1–3; uniform channel tunneling, electron programming, and hole erase",
                "limit": "A named SONOS tunneling example; no equivalence to the stack or biases of a current Infineon macro is asserted."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "localized-nrom",
            "title": "Localized NROM: CHE/Reverse Read",
            "summary": "S/D keep their programming-time names; reverse read changes bias and current direction without silently renaming terminals.",
            "mechanism": "CHE",
            "frames": [
              {
                "id": "op-sonos-read-localized-nrom-1-en",
                "title": "Stored State Retained",
                "caption": "Drawn stored carriers represent data, not the source of read current.",
                "state": "Q < 0",
                "stimulus": "Inspect the existing state",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-localized-nrom-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-localized-nrom-1-en-title\">Localized NROM: CHE/Reverse Read — Stored State Retained. Drawn stored carriers represent data, not the source of read current.</title><defs><marker id=\"op-sonos-read-localized-nrom-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-read-localized-nrom-2-en",
                "title": "Apply Low-Field Read Bias",
                "caption": "Bias original S and ground original D, reversing the program direction.",
                "state": "Charge remains in storage",
                "stimulus": "V_R; |V_DS| = v",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-localized-nrom-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-localized-nrom-2-en-title\">Localized NROM: CHE/Reverse Read — Apply Low-Field Read Bias. Bias original S and ground original D, reversing the program direction.</title><defs><marker id=\"op-sonos-read-localized-nrom-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_R</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-read-localized-nrom-3-en",
                "title": "Conduction Response",
                "caption": "The stored state determines sense current under the same read bias.",
                "state": "I_R ↓",
                "stimulus": "Normal read field",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-localized-nrom-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-localized-nrom-3-en-title\">Localized NROM: CHE/Reverse Read — Conduction Response. The stored state determines sense current under the same read bias.</title><defs><marker id=\"op-sonos-read-localized-nrom-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"26\" y=\"169\" width=\"308\" height=\"64\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"36\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"255\" y=\"169\" width=\"69\" height=\"29\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"148\" width=\"200\" height=\"21\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"112\" width=\"200\" height=\"36\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"94\" width=\"200\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"80\" y=\"66\" width=\"200\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"180\" y=\"87\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G</text><text x=\"180\" y=\"137\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><path d=\"M180 35V66\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">G = V_R</text><text x=\"64\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">S +V_R</text><text x=\"293\" y=\"258\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">D 0</text><text x=\"69\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><text x=\"303\" y=\"191\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">n+</text><path d=\"M69 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M289 199V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"181\" y=\"221\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">p-Si</text><circle data-charge=\"stored\" cx=\"243\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"243\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"264\" cy=\"132\" r=\"10\" fill=\"#075f9d\"/><text x=\"264\" y=\"139\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M284 181H266\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-read-localized-nrom-3-en-electron)\"/><circle cx=\"244\" cy=\"179\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M234.25 188.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"60\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              },
              {
                "id": "op-sonos-read-localized-nrom-4-en",
                "title": "Compare Sense Results",
                "caption": "Compare stored states under equal read conditions; logic encoding is not assigned.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sonos-read-localized-nrom-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-sonos-read-localized-nrom-4-en-title\">Localized NROM: CHE/Reverse Read — Compare Sense Results. Compare stored states under equal read conditions; logic encoding is not assigned.</title><defs><marker id=\"op-sonos-read-localized-nrom-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-sonos-read-localized-nrom-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M207 237H268\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-sonos-read-localized-nrom-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↑</text></svg>",
                "sourceIds": [
                  "ch-pat-nrom"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nrom",
                "label": "Saifun: Asymmetric Charge-Trapping Patent US5768192A",
                "url": "https://patents.google.com/patent/US5768192A/en",
                "kind": "Patent",
                "date": "Granted 1998-06-16; reviewed 2026-09-10",
                "locator": "Front page of the original publication; localized hot-electron programming and reverse-read sections; claims 1 and 23",
                "limit": "The original publication names Saifun; Spansion Israel in aggregated metadata reflects later corporate history. This patent alone does not establish the erase mechanisms or commercial specifications of every two-bit NROM implementation."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nand",
        "operationId": "write",
        "title": "Program: Raise the Selected Wordline and Inhibit Other Channels",
        "summary": "The early US7696559B2 example uses Vpgm on the selected wordline and lower pass potentials on the others, with channel conditions inhibiting unwanted programming. Both planar and 3D implementations depend on the effective field across the storage layer, not merely the wordline-to-ground voltage. Specific channel boosting, pulse stepping, and selector timing require verification for each implementation.",
        "sources": [
          {
            "id": "ch-pat-nand-vertical",
            "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
            "url": "https://patents.google.com/patent/US7696559B2/en",
            "kind": "Patent",
            "date": "Granted 2010-04-13; reviewed 2026-09-10",
            "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
            "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          },
          {
            "id": "ch-tech-multilevel",
            "label": "Kioxia: Increasing Flash Capacity with Multilevel Cells",
            "url": "https://www.kioxia.com/en-jp/rd/technology/multi-level-cell.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figure 5 and adjacent text; bits per cell, threshold-voltage states, and speed/lifetime tradeoffs",
            "limit": "Supports the requirement for 2 to the Nth power distinguishable states to store N bits and the qualitative tradeoffs. It does not provide universal endurance or speed ratios between TLC/QLC generations."
          },
          {
            "id": "ch-tech-retention",
            "label": "Kioxia: Data Retention in the Managed Flash Endurance and Reliability Series",
            "url": "https://americas.kioxia.com/content/dam/kioxia/en-us/business/memory/mlc-nand/asset/KIOXIA_NAND_Flash_Data_Retention_Technical_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2024-03; reviewed 2026-09-10",
            "locator": "Pages 1–2; P/E cycling, temperature, and data retention",
            "limit": "Supports evaluating NAND reliability under combined conditions. NAND values must not be transferred directly to EEPROM, SONOS, or OTP specifications."
          },
          {
            "id": "ch-tech-ecc",
            "label": "Kioxia: NAND Error-Correction Code Technical Brief",
            "url": "https://www.kioxia.com/content/dam/kioxia/shared/business/memory/mlc-nand/asset/productbrief/KIOXIA_Understanding_ECC_Tech_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2022-05; reviewed 2026-09-10",
            "locator": "Page 1; raw NAND, managed NAND, and the role of ECC",
            "limit": "Supports including error management in system comparisons. It does not supply a universal ECC strength, decoding latency, or spare-capacity ratio that can be applied directly throughout this material."
          },
          {
            "id": "ch-tech-deepetch",
            "label": "Kioxia: Improving Memory-Hole Process Productivity with a New Etch Gas",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-62.html",
            "kind": "Manufacturer Process Research",
            "date": "2024-02-22; reviewed 2026-09-10",
            "locator": "Sections on memory-hole profile, etch rate, and high-aspect-ratio processing",
            "limit": "Describes a specific deep-hole etching study and process bottlenecks. Its improvement figures are not extrapolated to all equipment, stack heights, or production costs."
          },
          {
            "id": "ch-paper-3dvariation",
            "label": "Y. Luo et al.: Early Retention Loss and Process Variation in 3D NAND",
            "url": "https://arxiv.org/abs/1807.05140",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "2018; reviewed 2026-09-10",
            "locator": "Abstract: layer-to-layer process variation, early retention loss, and retention interference",
            "limit": "Only the abstract was reviewed to identify research questions. Unreviewed methods, sample counts, and quantitative improvements are not reused, and the distributions are not assumed to apply to all modern 3D NAND."
          },
          {
            "id": "ch-paper-readdisturb",
            "label": "Y. Cai et al.: Read-Disturb Errors in MLC NAND Flash",
            "url": "https://arxiv.org/abs/1805.03283",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "Research account published 2018-05-08; corresponding DSN 2015 work; reviewed 2026-09-10",
            "locator": "Abstract: relationships among pass bias, accumulated cycling, and read disturb",
            "limit": "Only qualitative relationships are supported by the reviewed abstract. Unreviewed quantitative results are not reused, and 2Y nm MLC samples are not treated as equivalent to modern 3D QLC."
          },
          {
            "id": "ch-maturity-bics",
            "label": "Kioxia: BiCS FLASH Principles and Commercial Generations",
            "url": "https://www.kioxia.com/en-jp/rd/technology/bics-flash.html",
            "kind": "Manufacturer Fundamentals and Commercial History",
            "date": "Page includes technical descriptions through 2023; reviewed 2026-09-10",
            "locator": "Commercial-generation section; stacked electrodes, memory holes, and charge-storage film in Figures 4–5",
            "limit": "48 layers / 2015, 96 layers / 2018, 112 layers / 2020, and 162 layers / 2022 are the manufacturer's listed commercial history. This page is not treated as the latest 2026 layer-count ranking or a complete specification for each generation."
          }
        ],
        "variants": [
          {
            "id": "vertical-electron",
            "title": "US7696559B2: Vertical String/Electron Tunneling",
            "summary": "A string topology with an unfolded local film section. Erase follows source-line raising and electron release, not an asserted GIDL hole mechanism.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-nand-write-vertical-electron-1-en",
                "title": "Identify the String",
                "caption": "WL* identifies the target level; SGD/SGS control terminal access.",
                "state": "Q ≈ 0",
                "stimulus": "Before the program pulse",
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                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              },
              {
                "id": "op-nand-write-vertical-electron-2-en",
                "title": "Bias the Selected Channel",
                "caption": "BL=0 keeps the selected channel low; target WL receives V_PGM and neighbors V_PASS.",
                "state": "V_CH ≈ 0",
                "stimulus": "V_PGM > V_PASS",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-write-vertical-electron-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-write-vertical-electron-2-en-title\">US7696559B2: Vertical String/Electron Tunneling — Bias the Selected Channel. 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              {
                "id": "op-nand-write-vertical-electron-3-en",
                "title": "Electrons Enter Storage",
                "caption": "The local section traces CH through tunnel dielectric into CTL, where electrons are trapped.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "V_WL > V_CH",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-write-vertical-electron-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-write-vertical-electron-3-en-title\">US7696559B2: Vertical String/Electron Tunneling — Electrons Enter Storage. The local section traces CH through tunnel dielectric into CTL, where electrons are trapped.</title><defs><marker id=\"op-nand-write-vertical-electron-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-write-vertical-electron-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-write-vertical-electron-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-write-vertical-electron-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"38\" y=\"53\" width=\"65\" height=\"152\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"103\" y=\"53\" width=\"31\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"134\" y=\"53\" width=\"48\" height=\"152\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"182\" y=\"53\" width=\"30\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"212\" y=\"53\" width=\"106\" height=\"152\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"71\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"158\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><text x=\"237\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CH</text><text x=\"71\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gate</text><text x=\"198\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Tunnel</text><text x=\"292\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Body</text><path d=\"M240 130H152\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-write-vertical-electron-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"203\" cy=\"130\" r=\"10\" fill=\"#075f9d\"/><text x=\"203\" y=\"137\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"180\" y=\"261\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">e−: CH → CTL</text></svg>",
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                "id": "op-nand-write-vertical-electron-4-en",
                "title": "Selected versus Inhibited",
                "caption": "The low channel at left programs; BL=V_DD at right precharges a floating, boosted channel and reduces tunneling field.",
                "state": "Left: program; right: retain",
                "stimulus": "Same V_PGM, different V_CH",
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                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
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              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nand-vertical",
                "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
                "url": "https://patents.google.com/patent/US7696559B2/en",
                "kind": "Patent",
                "date": "Granted 2010-04-13; reviewed 2026-09-10",
                "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
                "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
              },
              {
                "id": "ch-tech-nand",
                "label": "Kioxia: NAND Flash Memory Fundamentals",
                "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
                "kind": "Manufacturer Fundamentals Explanation",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
                "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nand",
        "operationId": "erase",
        "title": "Erase: Reset the Charge Window of a Shared Block",
        "summary": "Erase granularity follows shared wells, channels, and wordline-bias control, and differs from a read page or a host address. Planar floating-gate cells and modern 3D stacks may use different charge-removal or neutralization paths. This material preserves the boundary of the early embodiment and does not present one common-source bias as the erase specification of all NAND.",
        "sources": [
          {
            "id": "ch-pat-nand-vertical",
            "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
            "url": "https://patents.google.com/patent/US7696559B2/en",
            "kind": "Patent",
            "date": "Granted 2010-04-13; reviewed 2026-09-10",
            "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
            "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          },
          {
            "id": "ch-tech-multilevel",
            "label": "Kioxia: Increasing Flash Capacity with Multilevel Cells",
            "url": "https://www.kioxia.com/en-jp/rd/technology/multi-level-cell.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figure 5 and adjacent text; bits per cell, threshold-voltage states, and speed/lifetime tradeoffs",
            "limit": "Supports the requirement for 2 to the Nth power distinguishable states to store N bits and the qualitative tradeoffs. It does not provide universal endurance or speed ratios between TLC/QLC generations."
          },
          {
            "id": "ch-tech-retention",
            "label": "Kioxia: Data Retention in the Managed Flash Endurance and Reliability Series",
            "url": "https://americas.kioxia.com/content/dam/kioxia/en-us/business/memory/mlc-nand/asset/KIOXIA_NAND_Flash_Data_Retention_Technical_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2024-03; reviewed 2026-09-10",
            "locator": "Pages 1–2; P/E cycling, temperature, and data retention",
            "limit": "Supports evaluating NAND reliability under combined conditions. NAND values must not be transferred directly to EEPROM, SONOS, or OTP specifications."
          },
          {
            "id": "ch-tech-ecc",
            "label": "Kioxia: NAND Error-Correction Code Technical Brief",
            "url": "https://www.kioxia.com/content/dam/kioxia/shared/business/memory/mlc-nand/asset/productbrief/KIOXIA_Understanding_ECC_Tech_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2022-05; reviewed 2026-09-10",
            "locator": "Page 1; raw NAND, managed NAND, and the role of ECC",
            "limit": "Supports including error management in system comparisons. It does not supply a universal ECC strength, decoding latency, or spare-capacity ratio that can be applied directly throughout this material."
          },
          {
            "id": "ch-tech-deepetch",
            "label": "Kioxia: Improving Memory-Hole Process Productivity with a New Etch Gas",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-62.html",
            "kind": "Manufacturer Process Research",
            "date": "2024-02-22; reviewed 2026-09-10",
            "locator": "Sections on memory-hole profile, etch rate, and high-aspect-ratio processing",
            "limit": "Describes a specific deep-hole etching study and process bottlenecks. Its improvement figures are not extrapolated to all equipment, stack heights, or production costs."
          },
          {
            "id": "ch-paper-3dvariation",
            "label": "Y. Luo et al.: Early Retention Loss and Process Variation in 3D NAND",
            "url": "https://arxiv.org/abs/1807.05140",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "2018; reviewed 2026-09-10",
            "locator": "Abstract: layer-to-layer process variation, early retention loss, and retention interference",
            "limit": "Only the abstract was reviewed to identify research questions. Unreviewed methods, sample counts, and quantitative improvements are not reused, and the distributions are not assumed to apply to all modern 3D NAND."
          },
          {
            "id": "ch-paper-readdisturb",
            "label": "Y. Cai et al.: Read-Disturb Errors in MLC NAND Flash",
            "url": "https://arxiv.org/abs/1805.03283",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "Research account published 2018-05-08; corresponding DSN 2015 work; reviewed 2026-09-10",
            "locator": "Abstract: relationships among pass bias, accumulated cycling, and read disturb",
            "limit": "Only qualitative relationships are supported by the reviewed abstract. Unreviewed quantitative results are not reused, and 2Y nm MLC samples are not treated as equivalent to modern 3D QLC."
          },
          {
            "id": "ch-maturity-bics",
            "label": "Kioxia: BiCS FLASH Principles and Commercial Generations",
            "url": "https://www.kioxia.com/en-jp/rd/technology/bics-flash.html",
            "kind": "Manufacturer Fundamentals and Commercial History",
            "date": "Page includes technical descriptions through 2023; reviewed 2026-09-10",
            "locator": "Commercial-generation section; stacked electrodes, memory holes, and charge-storage film in Figures 4–5",
            "limit": "48 layers / 2015, 96 layers / 2018, 112 layers / 2020, and 162 layers / 2022 are the manufacturer's listed commercial history. This page is not treated as the latest 2026 layer-count ranking or a complete specification for each generation."
          },
          {
            "id": "op-nand-hole-erase",
            "label": "KIOXIA: Schottky Source Contact and Hole Supply",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-88.html",
            "kind": "Manufacturer Research",
            "date": "2025-09-18; 2026-09-10 accessed",
            "locator": "Figures 1 and 4; GIDL hole supply from an N+ silicon source and the Schottky-contact alternative",
            "limit": "Supports carrier supply and a named study; this diagram uses the conventional GIDL branch without merging in a Schottky source."
          },
          {
            "id": "op-pat-nand-gidl",
            "label": "SanDisk: GIDL-Assisted 3D NAND Erase",
            "url": "https://patents.google.com/patent/US10923196B1/en",
            "kind": "Public Patent",
            "date": "2021; 2026-09-10 accessed",
            "locator": "Figure 8 and GIDL erase description; terminal/select-gate bias difference, hole supply, and charge neutralization",
            "limit": "Uses its own BL/SL and select-gate biases; do not substitute the floating-terminal erase conditions of US7696559B2."
          }
        ],
        "variants": [
          {
            "id": "vertical-electron",
            "title": "US7696559B2: Vertical String/Electron Tunneling",
            "summary": "A string topology with an unfolded local film section. Erase follows source-line raising and electron release, not an asserted GIDL hole mechanism.",
            "mechanism": "FN",
            "frames": [
              {
                "id": "op-nand-erase-vertical-electron-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-vertical-electron-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-vertical-electron-1-en-title\">US7696559B2: Vertical String/Electron Tunneling — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-nand-erase-vertical-electron-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"38\" y=\"53\" width=\"65\" height=\"152\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"103\" y=\"53\" width=\"31\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"134\" y=\"53\" width=\"48\" height=\"152\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"182\" y=\"53\" width=\"30\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"212\" y=\"53\" width=\"106\" height=\"152\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"71\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"158\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><text x=\"237\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CH</text><text x=\"71\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gate</text><text x=\"198\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Tunnel</text><text x=\"292\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Body</text><circle data-charge=\"stored\" cx=\"157\" cy=\"99\" r=\"10\" fill=\"#075f9d\"/><text x=\"157\" y=\"106\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"156\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"156\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"180\" y=\"260\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Q &lt; 0</text></svg>",
                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              },
              {
                "id": "op-nand-erase-vertical-electron-2-en",
                "title": "Establish the Required Field",
                "caption": "Terminal conditions belong only to the named variant.",
                "state": "Q < 0",
                "stimulus": "SL +V_E; BL/SG = FLT",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-vertical-electron-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-vertical-electron-2-en-title\">US7696559B2: Vertical String/Electron Tunneling — Establish the Required Field. Terminal conditions belong only to the named variant.</title><defs><marker id=\"op-nand-erase-vertical-electron-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"176\" y=\"50\" width=\"24\" height=\"184\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"129\" y=\"81\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"232\" y=\"81\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"144\" y=\"81\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"226\" y=\"81\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"81\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"204\" y=\"81\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"81\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"81\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"129\" y=\"123\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"232\" y=\"123\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"144\" y=\"123\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"226\" y=\"123\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"123\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"204\" y=\"123\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"123\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"123\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"129\" y=\"165\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"232\" y=\"165\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"144\" y=\"165\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"226\" y=\"165\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"165\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"204\" y=\"165\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"165\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"165\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"50\" width=\"15\" height=\"18\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"50\" width=\"4\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"216\" width=\"15\" height=\"18\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"216\" width=\"4\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M188 28V50\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M188 234V241\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"188\" y=\"22\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">BL = FLT</text><text x=\"188\" y=\"264\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SL +V_E</text><text x=\"26\" y=\"102\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><text x=\"26\" y=\"143\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><text x=\"26\" y=\"185\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><path d=\"M111 93H129M111 135H129M111 177H129\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"274\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG FLT</text><text x=\"275\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SG FLT</text></svg>",
                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              },
              {
                "id": "op-nand-erase-vertical-electron-3-en",
                "title": "Track Electron Transfer",
                "caption": "Electrons leave storage through this variant’s specified exit.",
                "state": "Q → 0",
                "stimulus": "SL +V_E; BL/SG = FLT",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-vertical-electron-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-vertical-electron-3-en-title\">US7696559B2: Vertical String/Electron Tunneling — Track Electron Transfer. Electrons leave storage through this variant’s specified exit.</title><defs><marker id=\"op-nand-erase-vertical-electron-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"38\" y=\"53\" width=\"65\" height=\"152\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"103\" y=\"53\" width=\"31\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"134\" y=\"53\" width=\"48\" height=\"152\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"182\" y=\"53\" width=\"30\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"212\" y=\"53\" width=\"106\" height=\"152\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"71\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"158\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><text x=\"237\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CH</text><text x=\"71\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gate</text><text x=\"198\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Tunnel</text><text x=\"292\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Body</text><circle data-charge=\"stored\" cx=\"157\" cy=\"99\" r=\"10\" fill=\"#075f9d\"/><text x=\"157\" y=\"106\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"156\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"156\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M155 130H243\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-vertical-electron-3-en-electron)\"/><circle data-charge=\"mobile\" cx=\"205\" cy=\"130\" r=\"10\" fill=\"#075f9d\"/><text x=\"205\" y=\"137\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"180\" y=\"261\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">e−: CTL → CH</text></svg>",
                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              },
              {
                "id": "op-nand-erase-vertical-electron-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-vertical-electron-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-vertical-electron-4-en-title\">US7696559B2: Vertical String/Electron Tunneling — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nand-erase-vertical-electron-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-vertical-electron-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M270 237H204\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-vertical-electron-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nand-vertical",
                "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
                "url": "https://patents.google.com/patent/US7696559B2/en",
                "kind": "Patent",
                "date": "Granted 2010-04-13; reviewed 2026-09-10",
                "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
                "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
              },
              {
                "id": "ch-tech-nand",
                "label": "Kioxia: NAND Flash Memory Fundamentals",
                "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
                "kind": "Manufacturer Fundamentals Explanation",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
                "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          },
          {
            "id": "gidl-hole",
            "title": "GIDL Assist: Hole Supply/Trap Neutralization",
            "summary": "A positive terminal above the select-gate potential generates electron–hole pairs. Only the upper supply is expanded; the other end depends on the example. Separate from the older floating-terminal erase.",
            "mechanism": "GIDL / FN",
            "frames": [
              {
                "id": "op-nand-erase-gidl-hole-1-en",
                "title": "Known Initial Charge",
                "caption": "Locate programmed charge and this variant’s exit.",
                "state": "Q < 0; Vₜ ↑",
                "stimulus": "Before the operation pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-gidl-hole-1-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-gidl-hole-1-en-title\">GIDL Assist: Hole Supply/Trap Neutralization — Known Initial Charge. Locate programmed charge and this variant’s exit.</title><defs><marker id=\"op-nand-erase-gidl-hole-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"38\" y=\"53\" width=\"65\" height=\"152\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"103\" y=\"53\" width=\"31\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"134\" y=\"53\" width=\"48\" height=\"152\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"182\" y=\"53\" width=\"30\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"212\" y=\"53\" width=\"49\" height=\"152\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"261\" y=\"53\" width=\"57\" height=\"152\" fill=\"#eef2f5\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"71\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"158\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><text x=\"237\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CH</text><text x=\"71\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gate</text><text x=\"198\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Tunnel</text><text x=\"292\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Core</text><circle data-charge=\"stored\" cx=\"157\" cy=\"99\" r=\"10\" fill=\"#075f9d\"/><text x=\"157\" y=\"106\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"156\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"156\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><text x=\"180\" y=\"260\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Q &lt; 0</text></svg>",
                "sourceIds": [
                  "op-nand-hole-erase",
                  "op-pat-nand-gidl"
                ]
              },
              {
                "id": "op-nand-erase-gidl-hole-2-en",
                "title": "Establish the Required Field",
                "caption": "A positive terminal above the select gate separates electron–hole pairs and supplies channel holes.",
                "state": "Q < 0",
                "stimulus": "V_BL/SL > V_GIDL; WL = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-gidl-hole-2-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-gidl-hole-2-en-title\">GIDL Assist: Hole Supply/Trap Neutralization — Establish the Required Field. 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stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"129\" y=\"165\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"232\" y=\"165\" width=\"15\" height=\"26\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"144\" y=\"165\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"226\" y=\"165\" width=\"6\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"165\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"204\" y=\"165\" width=\"22\" height=\"26\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"165\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"165\" width=\"4\" height=\"26\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"50\" width=\"15\" height=\"18\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"50\" width=\"4\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"157\" y=\"216\" width=\"15\" height=\"18\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"172\" y=\"216\" width=\"4\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M188 28V50\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M188 234V241\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"188\" y=\"22\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">BL +V_E</text><text x=\"188\" y=\"264\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">SL +V_E</text><text x=\"26\" y=\"102\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><text x=\"26\" y=\"143\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><text x=\"26\" y=\"185\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL=0</text><path d=\"M111 93H129M111 135H129M111 177H129\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"274\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_GIDL</text><text x=\"275\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_GIDL</text><circle data-charge=\"mobile\" cx=\"188\" cy=\"58\" r=\"10\" fill=\"#b52f43\"/><text x=\"188\" y=\"65\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><path d=\"M188 73V117\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-gidl-hole-2-en-hole)\"/><path d=\"M195 59V34\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-gidl-hole-2-en-electron)\"/><text x=\"287\" y=\"103\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">GIDL</text></svg>",
                "sourceIds": [
                  "op-nand-hole-erase",
                  "op-pat-nand-gidl"
                ]
              },
              {
                "id": "op-nand-erase-gidl-hole-3-en",
                "title": "Hole Supply and Neutralization",
                "caption": "Holes enter the trap layer and reduce net stored negative charge.",
                "state": "Q → 0",
                "stimulus": "V_BL/SL > V_GIDL; WL = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-gidl-hole-3-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-gidl-hole-3-en-title\">GIDL Assist: Hole Supply/Trap Neutralization — Hole Supply and Neutralization. Holes enter the trap layer and reduce net stored negative charge.</title><defs><marker id=\"op-nand-erase-gidl-hole-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><rect x=\"38\" y=\"53\" width=\"65\" height=\"152\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"103\" y=\"53\" width=\"31\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"134\" y=\"53\" width=\"48\" height=\"152\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"182\" y=\"53\" width=\"30\" height=\"152\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"212\" y=\"53\" width=\"49\" height=\"152\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"261\" y=\"53\" width=\"57\" height=\"152\" fill=\"#eef2f5\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"71\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">WL</text><text x=\"158\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CTL</text><text x=\"237\" y=\"43\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">CH</text><text x=\"71\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Gate</text><text x=\"198\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Tunnel</text><text x=\"292\" y=\"230\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Core</text><circle data-charge=\"stored\" cx=\"157\" cy=\"99\" r=\"10\" fill=\"#075f9d\"/><text x=\"157\" y=\"106\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"156\" cy=\"163\" r=\"10\" fill=\"#075f9d\"/><text x=\"156\" y=\"170\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">−</text><path d=\"M239 129H154\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-gidl-hole-3-en-hole)\"/><circle data-charge=\"mobile\" cx=\"220\" cy=\"129\" r=\"10\" fill=\"#b52f43\"/><text x=\"220\" y=\"136\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"20\" font-weight=\"600\">+</text><text x=\"180\" y=\"261\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">h+ + e− → |Q| ↓</text></svg>",
                "sourceIds": [
                  "op-nand-hole-erase",
                  "op-pat-nand-gidl"
                ]
              },
              {
                "id": "op-nand-erase-gidl-hole-4-en",
                "title": "Remove High Field and Verify",
                "caption": "The state shifts toward its target window; residual charge and defects are not assumed absent.",
                "state": "Vₜ ↓",
                "stimulus": "Low-field read verification",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-erase-gidl-hole-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-erase-gidl-hole-4-en-title\">GIDL Assist: Hole Supply/Trap Neutralization — Remove High Field and Verify. The state shifts toward its target window; residual charge and defects are not assumed absent.</title><defs><marker id=\"op-nand-erase-gidl-hole-4-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-4-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-4-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"op-nand-erase-gidl-hole-4-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><path d=\"M49 32V220H327\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"31\" y=\"40\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I</text><text x=\"320\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_G</text><path d=\"M66 213Q114 213 138 173T183 53\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M120 216Q198 214 220 174T266 62\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184 35V220\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><text x=\"184\" y=\"25\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">V_R</text><text x=\"112\" y=\"88\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| small</text><text x=\"276\" y=\"193\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">|Q| large</text><path d=\"M270 237H204\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#op-nand-erase-gidl-hole-4-en-field)\"/><text x=\"108\" y=\"250\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">Vₜ ↓</text></svg>",
                "sourceIds": [
                  "op-nand-hole-erase",
                  "op-pat-nand-gidl"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "h+",
                "meaning": "Red plus signs are holes; red arrows show hole motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "op-nand-hole-erase",
                "label": "KIOXIA: Schottky Source Contact and Hole Supply",
                "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-88.html",
                "kind": "Manufacturer Research",
                "date": "2025-09-18; 2026-09-10 accessed",
                "locator": "Figures 1 and 4; GIDL hole supply from an N+ silicon source and the Schottky-contact alternative",
                "limit": "Supports carrier supply and a named study; this diagram uses the conventional GIDL branch without merging in a Schottky source."
              },
              {
                "id": "op-pat-nand-gidl",
                "label": "SanDisk: GIDL-Assisted 3D NAND Erase",
                "url": "https://patents.google.com/patent/US10923196B1/en",
                "kind": "Public Patent",
                "date": "2021; 2026-09-10 accessed",
                "locator": "Figure 8 and GIDL erase description; terminal/select-gate bias difference, hole supply, and charge neutralization",
                "limit": "Uses its own BL/SL and select-gate biases; do not substitute the floating-terminal erase conditions of US7696559B2."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "nand",
        "operationId": "read",
        "title": "Read: Pass Unselected Cells and Sense the Selected Threshold",
        "summary": "When one cell is read, the other storage cells still experience pass bias, so the absence of a program command does not mean zero read disturb. String resistance, wordline/bitline loading, and threshold-voltage distributions jointly affect readout. In US7696559B2, the selected 0 V condition belongs only to that early example; one fixed potential cannot distinguish all multilevel states.",
        "sources": [
          {
            "id": "ch-pat-nand-vertical",
            "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
            "url": "https://patents.google.com/patent/US7696559B2/en",
            "kind": "Patent",
            "date": "Granted 2010-04-13; reviewed 2026-09-10",
            "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
            "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
          },
          {
            "id": "ch-tech-nand",
            "label": "Kioxia: NAND Flash Memory Fundamentals",
            "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
            "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
          },
          {
            "id": "ch-tech-multilevel",
            "label": "Kioxia: Increasing Flash Capacity with Multilevel Cells",
            "url": "https://www.kioxia.com/en-jp/rd/technology/multi-level-cell.html",
            "kind": "Manufacturer Fundamentals Explanation",
            "date": "No publication date stated; reviewed 2026-09-10",
            "locator": "Figure 5 and adjacent text; bits per cell, threshold-voltage states, and speed/lifetime tradeoffs",
            "limit": "Supports the requirement for 2 to the Nth power distinguishable states to store N bits and the qualitative tradeoffs. It does not provide universal endurance or speed ratios between TLC/QLC generations."
          },
          {
            "id": "ch-tech-retention",
            "label": "Kioxia: Data Retention in the Managed Flash Endurance and Reliability Series",
            "url": "https://americas.kioxia.com/content/dam/kioxia/en-us/business/memory/mlc-nand/asset/KIOXIA_NAND_Flash_Data_Retention_Technical_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2024-03; reviewed 2026-09-10",
            "locator": "Pages 1–2; P/E cycling, temperature, and data retention",
            "limit": "Supports evaluating NAND reliability under combined conditions. NAND values must not be transferred directly to EEPROM, SONOS, or OTP specifications."
          },
          {
            "id": "ch-tech-ecc",
            "label": "Kioxia: NAND Error-Correction Code Technical Brief",
            "url": "https://www.kioxia.com/content/dam/kioxia/shared/business/memory/mlc-nand/asset/productbrief/KIOXIA_Understanding_ECC_Tech_Brief.pdf",
            "kind": "Manufacturer Technical Brief",
            "date": "2022-05; reviewed 2026-09-10",
            "locator": "Page 1; raw NAND, managed NAND, and the role of ECC",
            "limit": "Supports including error management in system comparisons. It does not supply a universal ECC strength, decoding latency, or spare-capacity ratio that can be applied directly throughout this material."
          },
          {
            "id": "ch-tech-deepetch",
            "label": "Kioxia: Improving Memory-Hole Process Productivity with a New Etch Gas",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-62.html",
            "kind": "Manufacturer Process Research",
            "date": "2024-02-22; reviewed 2026-09-10",
            "locator": "Sections on memory-hole profile, etch rate, and high-aspect-ratio processing",
            "limit": "Describes a specific deep-hole etching study and process bottlenecks. Its improvement figures are not extrapolated to all equipment, stack heights, or production costs."
          },
          {
            "id": "ch-paper-3dvariation",
            "label": "Y. Luo et al.: Early Retention Loss and Process Variation in 3D NAND",
            "url": "https://arxiv.org/abs/1807.05140",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "2018; reviewed 2026-09-10",
            "locator": "Abstract: layer-to-layer process variation, early retention loss, and retention interference",
            "limit": "Only the abstract was reviewed to identify research questions. Unreviewed methods, sample counts, and quantitative improvements are not reused, and the distributions are not assumed to apply to all modern 3D NAND."
          },
          {
            "id": "ch-paper-readdisturb",
            "label": "Y. Cai et al.: Read-Disturb Errors in MLC NAND Flash",
            "url": "https://arxiv.org/abs/1805.03283",
            "kind": "Abstract of Original Chip-Measurement Research",
            "date": "Research account published 2018-05-08; corresponding DSN 2015 work; reviewed 2026-09-10",
            "locator": "Abstract: relationships among pass bias, accumulated cycling, and read disturb",
            "limit": "Only qualitative relationships are supported by the reviewed abstract. Unreviewed quantitative results are not reused, and 2Y nm MLC samples are not treated as equivalent to modern 3D QLC."
          },
          {
            "id": "ch-maturity-bics",
            "label": "Kioxia: BiCS FLASH Principles and Commercial Generations",
            "url": "https://www.kioxia.com/en-jp/rd/technology/bics-flash.html",
            "kind": "Manufacturer Fundamentals and Commercial History",
            "date": "Page includes technical descriptions through 2023; reviewed 2026-09-10",
            "locator": "Commercial-generation section; stacked electrodes, memory holes, and charge-storage film in Figures 4–5",
            "limit": "48 layers / 2015, 96 layers / 2018, 112 layers / 2020, and 162 layers / 2022 are the manufacturer's listed commercial history. This page is not treated as the latest 2026 layer-count ranking or a complete specification for each generation."
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        ],
        "variants": [
          {
            "id": "vertical-electron",
            "title": "US7696559B2: Vertical String/Electron Tunneling",
            "summary": "A string topology with an unfolded local film section. Erase follows source-line raising and electron release, not an asserted GIDL hole mechanism.",
            "mechanism": "FN",
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                "title": "Apply Low-Field Read Bias",
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                "state": "Charge remains in storage",
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                "title": "Conduction Response",
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                "sourceIds": [
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              {
                "id": "op-nand-read-vertical-electron-4-en",
                "title": "Compare Sense Results",
                "caption": "Comparison branch: a high-threshold selected cell blocks the string; reading did not change its charge.",
                "state": "Distinguishable read window",
                "stimulus": "V_R = const.",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-nand-read-vertical-electron-4-en-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"op-nand-read-vertical-electron-4-en-title\">US7696559B2: Vertical String/Electron Tunneling — Compare Sense Results. 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font-weight=\"600\">−</text><circle cx=\"188\" cy=\"137\" r=\"15\" fill=\"white\" stroke=\"#b52f43\" stroke-width=\"3\"/><path d=\"M178.25 146.75l19.5 -19.5\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"299\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"20\" font-weight=\"600\">I_R ↓</text></svg>",
                "sourceIds": [
                  "ch-pat-nand-vertical",
                  "ch-tech-nand"
                ]
              }
            ],
            "legend": [
              {
                "symbol": "e−",
                "meaning": "Blue minus signs are electrons; blue arrows show electron motion."
              },
              {
                "symbol": "E / I",
                "meaning": "Orange E is electric field; green I is conventional current, opposite to electron motion."
              },
              {
                "symbol": "V_P / V_E / V_R",
                "meaning": "Symbolic program, erase, and read biases; these are not numerical operating specifications."
              },
              {
                "symbol": "FLT / 0",
                "meaning": "FLT means floating; 0 is the reference potential chosen for the diagram."
              },
              {
                "symbol": "CTL / Vₜ",
                "meaning": "CTL is the insulating charge-trap layer; Vₜ is read threshold. Yellow layers are dielectrics."
              }
            ],
            "sources": [
              {
                "id": "ch-pat-nand-vertical",
                "label": "Toshiba: Columnar-Semiconductor Vertical NAND Patent US7696559B2",
                "url": "https://patents.google.com/patent/US7696559B2/en",
                "kind": "Patent",
                "date": "Granted 2010-04-13; reviewed 2026-09-10",
                "locator": "Figures 2 and 5–9; programming, erase, and bitline-discharge descriptions; claim 1",
                "limit": "A specific early columnar-sidewall embodiment. It is not a substitute for every modern gate-all-around cross-section and is not a complete patent history of planar NAND."
              },
              {
                "id": "ch-tech-nand",
                "label": "Kioxia: NAND Flash Memory Fundamentals",
                "url": "https://www.kioxia.com/en-jp/rd/technology/nand-flash.html",
                "kind": "Manufacturer Fundamentals Explanation",
                "date": "No publication date stated; reviewed 2026-09-10",
                "locator": "Figures 2–5; floating-gate and charge-trap storage; threshold voltage and series-string reading",
                "limit": "An introductory teaching source, not a complete operating specification for a particular chip. Generic illustrations do not establish the materials and biases of all planar or 3D NAND."
              }
            ],
            "caveat": "A principle drawing redrawn from public sources, not a process cross-section to scale. Arrows represent the stated carrier or field; numerical design requires device-specific specifications."
          }
        ]
      },
      {
        "topicId": "toggle",
        "operationId": "write",
        "title": "Toggle MRAM · Write / SET",
        "summary": "Compare data before following H1, overlapping H1/H2, H2, and field removal; reading senses junction resistance.",
        "sources": [
          {
            "id": "EMG-P-TOGGLE",
            "label": "Motorola: Toggle Writing Patent US6545906B1",
            "url": "https://patents.google.com/patent/US6545906B1/en",
            "kind": "Published patent",
            "date": "2003-04-08",
            "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
            "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
          }
        ],
        "variants": [
          {
            "title": "Nearly balanced two-layer SAF; ordered-field teaching model",
            "summary": "Compare data before following H1, overlapping H1/H2, H2, and field removal; reading senses junction resistance.",
            "variant": "Nearly balanced two-layer SAF; ordered-field teaching model",
            "frames": [
              {
                "id": "toggle-write-1-en",
                "title": "Read and Confirm a Toggle Is Needed",
                "caption": "M1 starts parallel at low R to REF. A read/compare decision precedes toggling.",
                "state": "Initial state retained",
                "stimulus": "H1 = H2 = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-write-1-en-title op-toggle-write-1-en-desc\" data-topic=\"toggle\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-toggle-write-1-en-title\">Read and Confirm a Toggle Is Needed</title><desc id=\"op-toggle-write-1-en-desc\">M1 starts parallel at low R to REF. A read/compare decision precedes toggling.</desc><style>#op-toggle-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-write-1-en path,#op-toggle-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M121.58400076889279 128.4159992311072L194.4159992311072 55.58400076889281\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M192.32994892670953 63.307238051763406L194.4159992311072 55.58400076889281L186.6927619482366 57.67005107329048\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M188.05203820042829 69.94796179957173L127.94796179957171 130.05203820042826\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M130.0340121039694 122.32880091755766L127.94796179957171 130.05203820042826L135.6711990824423 127.96598789603058\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M81 164L81 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"81\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t0</text></svg>"
              },
              {
                "id": "toggle-write-2-en",
                "title": "H1 Rises: Rotation Starts",
                "caption": "H1 alone starts spin-flop rotation of the SAF moments while they remain largely antiparallel.",
                "state": "Coupled moments rotating",
                "stimulus": "H1 only",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-write-2-en-title op-toggle-write-2-en-desc\" data-topic=\"toggle\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-toggle-write-2-en-title\">H1 Rises: Rotation Starts</title><desc id=\"op-toggle-write-2-en-desc\">H1 alone starts spin-flop rotation of the SAF moments while they remain largely antiparallel.</desc><style>#op-toggle-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-write-2-en path,#op-toggle-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M149.05711885015307 142.71759928012872L166.94288114984693 41.28240071987128\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M169.66395569631234 48.80541562830912L166.94288114984693 41.28240071987128L161.81288484069995 47.42106000901076\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M150.61995244915548 58.145670496981154L165.38004755084452 141.85432950301885\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160.25005124169755 135.71567021387938L165.38004755084452 141.85432950301885L168.10112209730994 134.33131459458102\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M141 164L141 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"141\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t1</text></svg>"
              },
              {
                "id": "toggle-write-3-en",
                "title": "H1 and H2 Overlap",
                "caption": "H2 rises before H1 ends. The resultant field changes direction and both moments continue along the same rotational sense.",
                "state": "Coupled moments rotating",
                "stimulus": "H1 and H2 overlap",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-write-3-en-title op-toggle-write-3-en-desc\" data-topic=\"toggle\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-toggle-write-3-en-title\">H1 and H2 Overlap</title><desc id=\"op-toggle-write-3-en-desc\">H2 rises before H1 ends. The resultant field changes direction and both moments continue along the same rotational sense.</desc><style>#op-toggle-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-write-3-en path,#op-toggle-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M187.53918647207885 134.18633028088308L128.46081352792115 49.81366971911691\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M135.70447864856484 53.20915431192099L128.46081352792115 49.81366971911691L129.17404596100567 57.78181250752101\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M123.18603811771786 75.62300145508053L192.81396188228214 124.37699854491947\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184.84581909387805 123.66376611183493L192.81396188228214 124.37699854491947L189.41847728947806 117.13333342427578\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M204 164L204 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"204\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t2</text></svg>"
              },
              {
                "id": "toggle-write-4-en",
                "title": "Remove H1; Retain H2",
                "caption": "H1 falls first. H2 continues driving the moments beyond the hard-axis instability.",
                "state": "Coupled moments rotating",
                "stimulus": "H2 only",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-write-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-write-4-en-title op-toggle-write-4-en-desc\" data-topic=\"toggle\" data-operation=\"write\" data-frame=\"4\" data-language=\"en\"><title id=\"op-toggle-write-4-en-title\">Remove H1; Retain H2</title><desc id=\"op-toggle-write-4-en-desc\">H1 falls first. H2 continues driving the moments beyond the hard-axis instability.</desc><style>#op-toggle-write-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-write-4-en path,#op-toggle-write-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M208.71759928012872 100.94288114984691L107.28240071987128 83.05711885015309\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M114.80541562830912 80.33604430368766L107.28240071987128 83.05711885015309L113.42106000901076 88.18711515930006\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M116.14567049698115 107.38004755084452L199.85432950301885 92.61995244915548\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M193.71567021387938 97.74994875830245L199.85432950301885 92.61995244915548L192.33131459458102 89.89887790269005\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269 164L269 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"269\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t3</text></svg>"
              },
              {
                "id": "toggle-write-5-en",
                "title": "Remove H2; Settle in the Opposite State",
                "caption": "After H2 falls, the moments return to the easy axis. M1 has reversed about 180°, reaching antiparallel high R.",
                "state": "Opposite state retained",
                "stimulus": "H1 = H2 = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-write-5-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-write-5-en-title op-toggle-write-5-en-desc\" data-topic=\"toggle\" data-operation=\"write\" data-frame=\"5\" data-language=\"en\"><title id=\"op-toggle-write-5-en-title\">Remove H2; Settle in the Opposite State</title><desc id=\"op-toggle-write-5-en-desc\">After H2 falls, the moments return to the easy axis. M1 has reversed about 180°, reaching antiparallel high R.</desc><style>#op-toggle-write-5-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-write-5-en path,#op-toggle-write-5-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M194.4159992311072 55.58400076889281L121.58400076889279 128.4159992311072\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M123.67005107329047 120.69276194823661L121.58400076889279 128.4159992311072L129.3072380517634 126.32994892670953\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M127.94796179957169 130.05203820042823L188.0520382004283 69.94796179957177\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M185.96598789603064 77.67119908244237L188.0520382004283 69.94796179957177L180.32880091755771 72.03401210396943\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M320 164L320 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"320\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t4</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "M1 / M2",
                "meaning": "Two coupled free moments in the SAF"
              },
              {
                "symbol": "H1 / H2",
                "meaning": "Two field components generated by orthogonal lines"
              },
              {
                "symbol": "REF; P / AP",
                "meaning": "Pinned reference moment; parallel low R / antiparallel high R"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-TOGGLE",
                "label": "Motorola: Toggle Writing Patent US6545906B1",
                "url": "https://patents.google.com/patent/US6545906B1/en",
                "kind": "Published patent",
                "date": "2003-04-08",
                "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
                "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
              }
            ],
            "caveat": "M1 is the free sublayer next to the barrier; its angle to REF determines P/AP. Intermediate angles and pulse heights are not measured. Rewriting the opposite data uses another toggle sequence, with no block erase.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "toggle",
        "operationId": "erase",
        "title": "Toggle MRAM · Reverse Rewrite / RESET",
        "summary": "Compare data before following H1, overlapping H1/H2, H2, and field removal; reading senses junction resistance.",
        "sources": [
          {
            "id": "EMG-P-TOGGLE",
            "label": "Motorola: Toggle Writing Patent US6545906B1",
            "url": "https://patents.google.com/patent/US6545906B1/en",
            "kind": "Published patent",
            "date": "2003-04-08",
            "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
            "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
          }
        ],
        "variants": [
          {
            "title": "Nearly balanced two-layer SAF; ordered-field teaching model",
            "summary": "Compare data before following H1, overlapping H1/H2, H2, and field removal; reading senses junction resistance.",
            "variant": "Nearly balanced two-layer SAF; ordered-field teaching model",
            "frames": [
              {
                "id": "toggle-erase-1-en",
                "title": "Read and Confirm a Toggle Is Needed",
                "caption": "M1 starts antiparallel at high R to REF. A read/compare decision precedes toggling.",
                "state": "Initial state retained",
                "stimulus": "H1 = H2 = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-erase-1-en-title op-toggle-erase-1-en-desc\" data-topic=\"toggle\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-toggle-erase-1-en-title\">Read and Confirm a Toggle Is Needed</title><desc id=\"op-toggle-erase-1-en-desc\">M1 starts antiparallel at high R to REF. A read/compare decision precedes toggling.</desc><style>#op-toggle-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-erase-1-en path,#op-toggle-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M194.4159992311072 55.58400076889281L121.58400076889279 128.4159992311072\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M123.67005107329047 120.69276194823661L121.58400076889279 128.4159992311072L129.3072380517634 126.32994892670953\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M127.94796179957173 130.05203820042826L188.05203820042829 69.94796179957173\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M185.9659878960306 77.67119908244233L188.05203820042829 69.94796179957173L180.3288009175577 72.0340121039694\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M81 164L81 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"81\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t0</text></svg>"
              },
              {
                "id": "toggle-erase-2-en",
                "title": "H1 Rises: Rotation Starts",
                "caption": "H1 alone starts spin-flop rotation of the SAF moments while they remain largely antiparallel.",
                "state": "Coupled moments rotating",
                "stimulus": "H1 only",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-erase-2-en-title op-toggle-erase-2-en-desc\" data-topic=\"toggle\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-toggle-erase-2-en-title\">H1 Rises: Rotation Starts</title><desc id=\"op-toggle-erase-2-en-desc\">H1 alone starts spin-flop rotation of the SAF moments while they remain largely antiparallel.</desc><style>#op-toggle-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-erase-2-en path,#op-toggle-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M149.0571188501531 41.28240071987128L166.9428811498469 142.71759928012872\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M161.81288484069992 136.57893999098926L166.9428811498469 142.71759928012872L169.6639556963123 135.1945843716909\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M150.61995244915545 141.85432950301885L165.38004755084455 58.14567049698116\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M168.10112209730997 65.668685405419L165.38004755084455 58.14567049698116L160.25005124169758 64.28432978612064\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M141 164L141 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"141\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t1</text></svg>"
              },
              {
                "id": "toggle-erase-3-en",
                "title": "H1 and H2 Overlap",
                "caption": "H2 rises before H1 ends. The resultant field changes direction and both moments continue along the same rotational sense.",
                "state": "Coupled moments rotating",
                "stimulus": "H1 and H2 overlap",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-erase-3-en-title op-toggle-erase-3-en-desc\" data-topic=\"toggle\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-toggle-erase-3-en-title\">H1 and H2 Overlap</title><desc id=\"op-toggle-erase-3-en-desc\">H2 rises before H1 ends. The resultant field changes direction and both moments continue along the same rotational sense.</desc><style>#op-toggle-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-erase-3-en path,#op-toggle-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M115.81366971911693 62.460813527921104L200.18633028088306 121.5391864720789\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M192.21818749247896 120.82595403899435L200.18633028088306 121.5391864720789L196.79084568807897 114.2955213514352\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M182.37699854491945 134.81396188228217L133.62300145508055 65.18603811771784\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140.86666657572425 68.58152271052192L133.62300145508055 65.18603811771784L134.33623388816508 73.15418090612195\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M204 164L204 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"204\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t2</text></svg>"
              },
              {
                "id": "toggle-erase-4-en",
                "title": "Remove H1; Retain H2",
                "caption": "H1 falls first. H2 continues driving the moments beyond the hard-axis instability.",
                "state": "Coupled moments rotating",
                "stimulus": "H2 only",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-erase-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-erase-4-en-title op-toggle-erase-4-en-desc\" data-topic=\"toggle\" data-operation=\"erase\" data-frame=\"4\" data-language=\"en\"><title id=\"op-toggle-erase-4-en-title\">Remove H1; Retain H2</title><desc id=\"op-toggle-erase-4-en-desc\">H1 falls first. H2 continues driving the moments beyond the hard-axis instability.</desc><style>#op-toggle-erase-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-erase-4-en path,#op-toggle-erase-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M107.28240071987128 100.9428811498469L208.71759928012872 83.0571188501531\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M202.57893999098926 88.18711515930008L208.71759928012872 83.0571188501531L201.1945843716909 80.33604430368767\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M199.85432950301885 107.38004755084454L116.14567049698115 92.61995244915546\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M123.668685405419 89.89887790269003L116.14567049698115 92.61995244915546L122.28432978612064 97.74994875830244\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269 164L269 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"269\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t3</text></svg>"
              },
              {
                "id": "toggle-erase-5-en",
                "title": "Remove H2; Settle in the Opposite State",
                "caption": "After H2 falls, the moments return to the easy axis. M1 has reversed about 180°, reaching parallel low R.",
                "state": "Opposite state retained",
                "stimulus": "H1 = H2 = 0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-erase-5-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-erase-5-en-title op-toggle-erase-5-en-desc\" data-topic=\"toggle\" data-operation=\"erase\" data-frame=\"5\" data-language=\"en\"><title id=\"op-toggle-erase-5-en-title\">Remove H2; Settle in the Opposite State</title><desc id=\"op-toggle-erase-5-en-desc\">After H2 falls, the moments return to the easy axis. M1 has reversed about 180°, reaching parallel low R.</desc><style>#op-toggle-erase-5-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-erase-5-en path,#op-toggle-erase-5-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"160\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SAF</text><text x=\"93\" y=\"26\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >M1</text><text x=\"219\" y=\"26\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >M2</text><text x=\"287\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >REF</text><ellipse cx=\"158\" cy=\"96\" rx=\"67\" ry=\"58\" fill=\"#eef4f7\" stroke=\"#678393\" stroke-width=\"1.5\"/><path d=\"M109 145L207 47\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><path d=\"M121.58400076889276 128.41599923110715L194.41599923110724 55.58400076889284\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M192.32994892670956 63.307238051763434L194.41599923110724 55.58400076889284L186.69276194823664 57.67005107329051\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M188.05203820042829 69.94796179957173L127.94796179957171 130.05203820042826\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M130.0340121039694 122.32880091755766L127.94796179957171 130.05203820042826L135.6711990824423 127.96598789603058\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"158\" cy=\"96\" r=\"4\" fill=\"#163449\" /><rect x=\"253\" y=\"58\" width=\"69\" height=\"72\" fill=\"#edf0f7\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M270.3829906421161 110.61700935788386L303.6170093578839 77.38299064211614\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.5309590534862 85.10622792498674L303.6170093578839 77.38299064211614L295.8937720750133 79.4690409465138\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"27\" y=\"48\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H2</text><path d=\"M27 117L27 62\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30.98609313929471 68.93621377156641L27 62L23.01390686070529 68.93621377156641\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"153\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >H1</text><path d=\"M16 132L77 132\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.06378622843359 135.9860931392947L77 132L70.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#c7d2da\" stroke-width=\"2.8\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"10\" y=\"193\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H1</text><text x=\"10\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H2</text><path d=\"M65 196H113V176H246V196H330\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 240H175V220H298V240H330\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M320 164L320 244\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 5\"/><circle cx=\"320\" cy=\"254\" r=\"4\" fill=\"#163449\" /><text x=\"180\" y=\"262\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t4</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "M1 / M2",
                "meaning": "Two coupled free moments in the SAF"
              },
              {
                "symbol": "H1 / H2",
                "meaning": "Two field components generated by orthogonal lines"
              },
              {
                "symbol": "REF; P / AP",
                "meaning": "Pinned reference moment; parallel low R / antiparallel high R"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-TOGGLE",
                "label": "Motorola: Toggle Writing Patent US6545906B1",
                "url": "https://patents.google.com/patent/US6545906B1/en",
                "kind": "Published patent",
                "date": "2003-04-08",
                "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
                "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
              }
            ],
            "caveat": "M1 is the free sublayer next to the barrier; its angle to REF determines P/AP. Intermediate angles and pulse heights are not measured. Rewriting the opposite data uses another toggle sequence, with no block erase.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "toggle",
        "operationId": "read",
        "title": "Toggle MRAM · Read",
        "summary": "Compare retained P/AP states at the same small bias, latch the current difference, then remove bias while retaining each alignment.",
        "sources": [
          {
            "id": "EMG-P-TOGGLE",
            "label": "Motorola: Toggle Writing Patent US6545906B1",
            "url": "https://patents.google.com/patent/US6545906B1/en",
            "kind": "Published patent",
            "date": "2003-04-08",
            "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
            "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
          }
        ],
        "variants": [
          {
            "title": "Nearly balanced two-layer SAF: resistance sensing from M1/REF alignment",
            "summary": "Compare retained P/AP states at the same small bias, latch the current difference, then remove bias while retaining each alignment.",
            "variant": "Nearly balanced two-layer SAF: resistance sensing from M1/REF alignment",
            "frames": [
              {
                "id": "toggle-read-1-en",
                "title": "Initial: Retained P and AP",
                "caption": "The two diagrams represent possible P and AP states. Their access paths are open and carry no read current.",
                "state": "P and AP alignments remain retained",
                "stimulus": "Write fields and write currents are zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-read-1-en-title op-toggle-read-1-en-desc\" data-topic=\"toggle\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-toggle-read-1-en-title\">Initial: Retained P and AP</title><desc id=\"op-toggle-read-1-en-desc\">The two diagrams represent possible P and AP states. Their access paths are open and carry no read current.</desc><style>#op-toggle-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-read-1-en path,#op-toggle-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M65 45L227 45\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 45L65 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227 45L227 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M88.80761184457488 107.19238815542512L107.19238815542512 88.80761184457488\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 96.53084912744548L107.19238815542512 88.80761184457488L99.46915087255452 90.89366214897255\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88.80761184457488 162.1923881554251L107.19238815542512 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 151.5308491274455L107.19238815542512 143.8076118445749L99.46915087255452 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 173L98 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 180L98 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"98\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"98\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M98 209L98 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 187L87 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 219L98 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88 225L108 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M92 230L104 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M96 235L100 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"260\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M269.19238815542514 88.80761184457488L250.8076118445749 107.19238815542512\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M252.89366214897257 99.46915087255452L250.8076118445749 107.19238815542512L258.5308491274455 105.10633785102745\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250.8076118445749 162.1923881554251L269.19238815542514 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.10633785102743 151.5308491274455L269.19238815542514 143.8076118445749L261.46915087255456 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L249 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Paths isolated</text></svg>"
              },
              {
                "id": "toggle-read-2-en",
                "title": "Select: Establish Small Read Currents",
                "caption": "Close the access paths at the same small bias. P carries more current and AP less current.",
                "state": "Magnetic states unchanged; read nodes carry current",
                "stimulus": "Small read bias; access paths enabled",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-read-2-en-title op-toggle-read-2-en-desc\" data-topic=\"toggle\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-toggle-read-2-en-title\">Select: Establish Small Read Currents</title><desc id=\"op-toggle-read-2-en-desc\">Close the access paths at the same small bias. P carries more current and AP less current.</desc><style>#op-toggle-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-read-2-en path,#op-toggle-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Vread</text><path d=\"M65 45L227 45\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 45L65 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227 45L227 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M88.80761184457488 107.19238815542512L107.19238815542512 88.80761184457488\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 96.53084912744548L107.19238815542512 88.80761184457488L99.46915087255452 90.89366214897255\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88.80761184457488 162.1923881554251L107.19238815542512 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 151.5308491274455L107.19238815542512 143.8076118445749L99.46915087255452 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 173L98 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 180L98 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"98\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"98\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M98 209L98 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 187L98 209\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 219L98 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88 225L108 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M92 230L104 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M96 235L100 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M47 81L47 163\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M43.01390686070529 156.06378622843357L47 163L50.98609313929471 156.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"147\" cy=\"91\" r=\"6\" fill=\"#196daf\" /><path d=\"M144 91L150 91\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"147\" cy=\"117\" r=\"6\" fill=\"#196daf\" /><path d=\"M144 117L150 117\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"147\" cy=\"143\" r=\"6\" fill=\"#196daf\" /><path d=\"M144 143L150 143\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"260\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M269.19238815542514 88.80761184457488L250.8076118445749 107.19238815542512\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M252.89366214897257 99.46915087255452L250.8076118445749 107.19238815542512L258.5308491274455 105.10633785102745\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250.8076118445749 162.1923881554251L269.19238815542514 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.10633785102743 151.5308491274455L269.19238815542514 143.8076118445749L261.46915087255456 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L260 209\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M209 81L209 163\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M205.0139068607053 156.06378622843357L209 163L212.9860931392947 156.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"309\" cy=\"91\" r=\"6\" fill=\"#196daf\" /><path d=\"M306 91L312 91\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IP &gt; IAP</text></svg>"
              },
              {
                "id": "toggle-read-3-en",
                "title": "Latch: Isolate and Retain Magnetization",
                "caption": "The sense circuit latches the current difference and removes read bias. Each magnetic alignment is retained.",
                "state": "P and AP alignments remain retained",
                "stimulus": "Write fields and write currents are zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-toggle-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-toggle-read-3-en-title op-toggle-read-3-en-desc\" data-topic=\"toggle\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-toggle-read-3-en-title\">Latch: Isolate and Retain Magnetization</title><desc id=\"op-toggle-read-3-en-desc\">The sense circuit latches the current difference and removes read bias. Each magnetic alignment is retained.</desc><style>#op-toggle-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-toggle-read-3-en path,#op-toggle-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA latched</text><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M88.80761184457488 107.19238815542512L107.19238815542512 88.80761184457488\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 96.53084912744548L107.19238815542512 88.80761184457488L99.46915087255452 90.89366214897255\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88.80761184457488 162.1923881554251L107.19238815542512 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.10633785102745 151.5308491274455L107.19238815542512 143.8076118445749L99.46915087255452 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 173L98 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 180L98 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"98\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"98\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M98 209L98 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 187L87 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 219L98 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88 225L108 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M92 230L104 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M96 235L100 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"54\" y=\"184\" width=\"88\" height=\"32\" fill=\"#e4edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"98\" y=\"207\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IP</text><text x=\"260\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M269.19238815542514 88.80761184457488L250.8076118445749 107.19238815542512\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M252.89366214897257 99.46915087255452L250.8076118445749 107.19238815542512L258.5308491274455 105.10633785102745\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250.8076118445749 162.1923881554251L269.19238815542514 143.8076118445749\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.10633785102743 151.5308491274455L269.19238815542514 143.8076118445749L261.46915087255456 145.89366214897257\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L249 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"216\" y=\"184\" width=\"88\" height=\"32\" fill=\"#e4edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"260\" y=\"207\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IAP</text><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >States retained</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "M1 / M2",
                "meaning": "Two coupled free moments in the SAF"
              },
              {
                "symbol": "H1 / H2",
                "meaning": "Two field components generated by orthogonal lines"
              },
              {
                "symbol": "REF; P / AP",
                "meaning": "Pinned reference moment; parallel low R / antiparallel high R"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-TOGGLE",
                "label": "Motorola: Toggle Writing Patent US6545906B1",
                "url": "https://patents.google.com/patent/US6545906B1/en",
                "kind": "Published patent",
                "date": "2003-04-08",
                "locator": "Figures 4–6; SAF free layer, t0–t4 pulse sequence, and read-before-toggle description",
                "limit": "Applies to the nearly balanced SAF toggle embodiment; drawn intermediate angles are illustrative."
              }
            ],
            "caveat": "M1 is the free sublayer next to the barrier; its angle to REF determines P/AP. Intermediate angles and pulse heights are not measured. Rewriting the opposite data uses another toggle sequence, with no block erase.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "stt",
        "operationId": "write",
        "title": "STT-MRAM · Write / SET",
        "summary": "Separate conventional current from electron flow, then follow spin torque, free-layer reversal, and low-bias sensing.",
        "sources": [
          {
            "id": "EMG-P-STT",
            "label": "IBM: Spin-Torque Structure Patent US5695864A",
            "url": "https://patents.google.com/patent/US5695864A/en",
            "kind": "Published patent",
            "date": "1997-12-09",
            "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
            "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
          },
          {
            "id": "op-stt-katine-2000",
            "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
            "url": "https://arxiv.org/abs/cond-mat/9908231",
            "kind": "Original research paper",
            "date": "2000",
            "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
            "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
          }
        ],
        "variants": [
          {
            "title": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "summary": "Separate conventional current from electron flow, then follow spin torque, free-layer reversal, and low-bias sensing.",
            "variant": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "frames": [
              {
                "id": "stt-write-1-en",
                "title": "Initial: Access Transistor Off",
                "caption": "mF starts parallel to REF; no current crosses the junction.",
                "state": "Initial stable magnetization",
                "stimulus": "Write current is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-write-1-en-title op-stt-write-1-en-desc\" data-topic=\"stt\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-stt-write-1-en-title\">Initial: Access Transistor Off</title><desc id=\"op-stt-write-1-en-desc\">mF starts parallel to REF; no current crosses the junction.</desc><style>#op-stt-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-write-1-en path,#op-stt-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 121L180 83\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 89.93621377156641L180 83L176.0139068607053 89.93621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L169 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=0</text><text x=\"44\" y=\"120\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >Ic=0</text><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P · R↓</text></svg>"
              },
              {
                "id": "stt-write-2-en",
                "title": "Pulse: Spin Torque Deflects the Free Layer",
                "caption": "Enable WL. Electrons flow from upper free layer to lower REF. Orange Ic points oppositely while the free moment deflects.",
                "state": "Free layer precessing/reversing",
                "stimulus": "WL enabled; write pulse through the MTJ",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-write-2-en-title op-stt-write-2-en-desc\" data-topic=\"stt\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-stt-write-2-en-title\">Pulse: Spin Torque Deflects the Free Layer</title><desc id=\"op-stt-write-2-en-desc\">Enable WL. Electrons flow from upper free layer to lower REF. Orange Ic points oppositely while the free moment deflects.</desc><style>#op-stt-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-write-2-en path,#op-stt-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M162.14584020506774 108.4983827231877L197.85415979493226 95.5016172768123\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M192.69957504440873 101.6196444138615L197.85415979493226 95.5016172768123L189.97292675078666 94.12823979634035\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L180 239\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=1</text><text x=\"58\" y=\"51\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ic</text><text x=\"302\" y=\"51\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >e−</text><path d=\"M58 194L58 80\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M61.98609313929471 86.93621377156641L58 80L54.01390686070529 86.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M310 80L310 194\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 4\"/><path d=\"M306.0139068607053 187.06378622843357L310 194L313.9860931392947 187.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M156 89C147 72 174 61 188 77\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180.48796323038857 74.24876326500137L188 77L186.59501222861135 69.12434070301106\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"97\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 97L94 97\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"132\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 132L94 132\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"168\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 168L94 168\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Spin torque</text></svg>"
              },
              {
                "id": "stt-write-3-en",
                "title": "Pulse Removed: Opposite Magnetization Retained",
                "caption": "After current stops, mF settles in AP at high R while REF retains its direction.",
                "state": "Opposite stable magnetization",
                "stimulus": "Write current is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-write-3-en-title op-stt-write-3-en-desc\" data-topic=\"stt\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-stt-write-3-en-title\">Pulse Removed: Opposite Magnetization Retained</title><desc id=\"op-stt-write-3-en-desc\">After current stops, mF settles in AP at high R while REF retains its direction.</desc><style>#op-stt-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-write-3-en path,#op-stt-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 83L180 121\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 114.06378622843359L180 121L183.9860931392947 114.06378622843359\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L169 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=0</text><text x=\"44\" y=\"120\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >Ic=0</text><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP · R↑</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ic",
                "meaning": "Conventional current, opposite to electron flow"
              },
              {
                "symbol": "e−",
                "meaning": "Electron-flow direction, not a magnetization arrow"
              },
              {
                "symbol": "mF / REF",
                "meaning": "Free-layer / pinned-reference magnetization"
              },
              {
                "symbol": "P / AP",
                "meaning": "Parallel low R / antiparallel high R; no logic encoding assigned"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-STT",
                "label": "IBM: Spin-Torque Structure Patent US5695864A",
                "url": "https://patents.google.com/patent/US5695864A/en",
                "kind": "Published patent",
                "date": "1997-12-09",
                "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
                "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
              },
              {
                "id": "op-stt-katine-2000",
                "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
                "url": "https://arxiv.org/abs/cond-mat/9908231",
                "kind": "Original research paper",
                "date": "2000",
                "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
                "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
              }
            ],
            "caveat": "Here positive conventional current is upward and electron flow is free-to-reference, illustrating P→AP; reverse flow illustrates AP→P. Verify polarity for the actual stack. Switching probability and read disturbance are not quantified.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "stt",
        "operationId": "erase",
        "title": "STT-MRAM · Reverse Rewrite / RESET",
        "summary": "Separate conventional current from electron flow, then follow spin torque, free-layer reversal, and low-bias sensing.",
        "sources": [
          {
            "id": "EMG-P-STT",
            "label": "IBM: Spin-Torque Structure Patent US5695864A",
            "url": "https://patents.google.com/patent/US5695864A/en",
            "kind": "Published patent",
            "date": "1997-12-09",
            "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
            "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
          },
          {
            "id": "op-stt-katine-2000",
            "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
            "url": "https://arxiv.org/abs/cond-mat/9908231",
            "kind": "Original research paper",
            "date": "2000",
            "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
            "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
          }
        ],
        "variants": [
          {
            "title": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "summary": "Separate conventional current from electron flow, then follow spin torque, free-layer reversal, and low-bias sensing.",
            "variant": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "frames": [
              {
                "id": "stt-erase-1-en",
                "title": "Initial: Access Transistor Off",
                "caption": "mF starts antiparallel to REF; no current crosses the junction.",
                "state": "Initial stable magnetization",
                "stimulus": "Write current is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-erase-1-en-title op-stt-erase-1-en-desc\" data-topic=\"stt\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-stt-erase-1-en-title\">Initial: Access Transistor Off</title><desc id=\"op-stt-erase-1-en-desc\">mF starts antiparallel to REF; no current crosses the junction.</desc><style>#op-stt-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-erase-1-en path,#op-stt-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 83L180 121\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 114.06378622843359L180 121L183.9860931392947 114.06378622843359\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L169 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=0</text><text x=\"44\" y=\"120\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >Ic=0</text><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP · R↑</text></svg>"
              },
              {
                "id": "stt-erase-2-en",
                "title": "Pulse: Spin Torque Deflects the Free Layer",
                "caption": "Enable WL. Electrons flow from lower REF to upper free layer. Orange Ic points oppositely while the free moment deflects.",
                "state": "Free layer precessing/reversing",
                "stimulus": "WL enabled; write pulse through the MTJ",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-erase-2-en-title op-stt-erase-2-en-desc\" data-topic=\"stt\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-stt-erase-2-en-title\">Pulse: Spin Torque Deflects the Free Layer</title><desc id=\"op-stt-erase-2-en-desc\">Enable WL. Electrons flow from lower REF to upper free layer. Orange Ic points oppositely while the free moment deflects.</desc><style>#op-stt-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-erase-2-en path,#op-stt-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M197.85415979493226 95.5016172768123L162.14584020506774 108.4983827231877\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M167.30042495559127 102.3803555861385L162.14584020506774 108.4983827231877L170.02707324921334 109.87176020365966\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L180 239\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=1</text><text x=\"58\" y=\"51\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ic</text><text x=\"302\" y=\"51\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >e−</text><path d=\"M58 80L58 194\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M54.01390686070529 187.06378622843357L58 194L61.98609313929471 187.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M310 194L310 80\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 4\"/><path d=\"M313.9860931392947 86.93621377156641L310 80L306.0139068607053 86.93621377156641\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M156 89C147 72 174 61 188 77\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180.48796323038857 74.24876326500137L188 77L186.59501222861135 69.12434070301106\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"97\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 97L94 97\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"132\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 132L94 132\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"91\" cy=\"168\" r=\"6\" fill=\"#196daf\" /><path d=\"M88 168L94 168\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Spin torque</text></svg>"
              },
              {
                "id": "stt-erase-3-en",
                "title": "Pulse Removed: Opposite Magnetization Retained",
                "caption": "After current stops, mF settles in P at low R while REF retains its direction.",
                "state": "Opposite stable magnetization",
                "stimulus": "Write current is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-erase-3-en-title op-stt-erase-3-en-desc\" data-topic=\"stt\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-stt-erase-3-en-title\">Pulse Removed: Opposite Magnetization Retained</title><desc id=\"op-stt-erase-3-en-desc\">After current stops, mF settles in P at low R while REF retains its direction.</desc><style>#op-stt-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-erase-3-en path,#op-stt-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"29\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL</text><path d=\"M180 37L180 74\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"128\" y=\"74\" width=\"104\" height=\"56\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"133\" width=\"104\" height=\"12\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"128\" y=\"148\" width=\"104\" height=\"50\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 121L180 83\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 89.93621377156641L180 83L176.0139068607053 89.93621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 190L180 156\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 162.93621377156643L180 156L176.0139068607053 162.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"242\" y=\"110\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><text x=\"242\" y=\"149\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >MgO</text><text x=\"242\" y=\"185\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><path d=\"M180 198L180 210\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 210L180 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 239L180 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 217L169 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"213\" y=\"237\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >WL=0</text><text x=\"44\" y=\"120\" text-anchor=\"middle\" fill=\"#536b7d\" font-size=\"20\" >Ic=0</text><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P · R↓</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ic",
                "meaning": "Conventional current, opposite to electron flow"
              },
              {
                "symbol": "e−",
                "meaning": "Electron-flow direction, not a magnetization arrow"
              },
              {
                "symbol": "mF / REF",
                "meaning": "Free-layer / pinned-reference magnetization"
              },
              {
                "symbol": "P / AP",
                "meaning": "Parallel low R / antiparallel high R; no logic encoding assigned"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-STT",
                "label": "IBM: Spin-Torque Structure Patent US5695864A",
                "url": "https://patents.google.com/patent/US5695864A/en",
                "kind": "Published patent",
                "date": "1997-12-09",
                "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
                "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
              },
              {
                "id": "op-stt-katine-2000",
                "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
                "url": "https://arxiv.org/abs/cond-mat/9908231",
                "kind": "Original research paper",
                "date": "2000",
                "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
                "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
              }
            ],
            "caveat": "Here positive conventional current is upward and electron flow is free-to-reference, illustrating P→AP; reverse flow illustrates AP→P. Verify polarity for the actual stack. Switching probability and read disturbance are not quantified.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "stt",
        "operationId": "read",
        "title": "STT-MRAM · Read",
        "summary": "Enable low-bias sensing, compare P/AP junction currents, then latch and isolate the paths while retaining free-layer magnetization.",
        "sources": [
          {
            "id": "EMG-P-STT",
            "label": "IBM: Spin-Torque Structure Patent US5695864A",
            "url": "https://patents.google.com/patent/US5695864A/en",
            "kind": "Published patent",
            "date": "1997-12-09",
            "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
            "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
          },
          {
            "id": "op-stt-katine-2000",
            "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
            "url": "https://arxiv.org/abs/cond-mat/9908231",
            "kind": "Original research paper",
            "date": "2000",
            "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
            "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
          }
        ],
        "variants": [
          {
            "title": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "summary": "Enable low-bias sensing, compare P/AP junction currents, then latch and isolate the paths while retaining free-layer magnetization.",
            "variant": "Perpendicular MTJ: upper free layer / MgO / lower reference",
            "frames": [
              {
                "id": "stt-read-1-en",
                "title": "Initial: Retained P and AP",
                "caption": "The two diagrams represent possible P and AP states. Their access paths are open and carry no read current.",
                "state": "P and AP alignments remain retained",
                "stimulus": "Write fields and write currents are zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-read-1-en-title op-stt-read-1-en-desc\" data-topic=\"stt\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-stt-read-1-en-title\">Initial: Retained P and AP</title><desc id=\"op-stt-read-1-en-desc\">The two diagrams represent possible P and AP states. Their access paths are open and carry no read current.</desc><style>#op-stt-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-read-1-en path,#op-stt-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M65 45L227 45\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 45L65 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227 45L227 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M98 111L98 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.98609313929471 91.93621377156641L98 85L94.01390686070529 91.93621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 166L98 140\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.98609313929471 146.93621377156643L98 140L94.01390686070529 146.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 173L98 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 180L98 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"98\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"98\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M98 209L98 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 187L87 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 219L98 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88 225L108 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M92 230L104 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M96 235L100 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"260\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M260 85L260 111\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256.0139068607053 104.06378622843359L260 111L263.9860931392947 104.06378622843359\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 166L260 140\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M263.9860931392947 146.93621377156643L260 140L256.0139068607053 146.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L249 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Paths isolated</text></svg>"
              },
              {
                "id": "stt-read-2-en",
                "title": "Select: Establish Small Read Currents",
                "caption": "Close the access paths at the same small bias. P carries more current and AP less current.",
                "state": "Magnetic states unchanged; read nodes carry current",
                "stimulus": "Small read bias; access paths enabled",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-read-2-en-title op-stt-read-2-en-desc\" data-topic=\"stt\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-stt-read-2-en-title\">Select: Establish Small Read Currents</title><desc id=\"op-stt-read-2-en-desc\">Close the access paths at the same small bias. P carries more current and AP less current.</desc><style>#op-stt-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-read-2-en path,#op-stt-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Vread</text><path d=\"M65 45L227 45\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65 45L65 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227 45L227 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect 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y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M260 85L260 111\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256.0139068607053 104.06378622843359L260 111L263.9860931392947 104.06378622843359\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 166L260 140\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M263.9860931392947 146.93621377156643L260 140L256.0139068607053 146.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L260 209\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M209 81L209 163\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M205.0139068607053 156.06378622843357L209 163L212.9860931392947 156.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"309\" cy=\"91\" r=\"6\" fill=\"#196daf\" /><path d=\"M306 91L312 91\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IP &gt; IAP</text></svg>"
              },
              {
                "id": "stt-read-3-en",
                "title": "Latch: Isolate and Retain Magnetization",
                "caption": "The sense circuit latches the current difference and removes read bias. Each magnetic alignment is retained.",
                "state": "P and AP alignments remain retained",
                "stimulus": "Write fields and write currents are zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-stt-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-stt-read-3-en-title op-stt-read-3-en-desc\" data-topic=\"stt\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-stt-read-3-en-title\">Latch: Isolate and Retain Magnetization</title><desc id=\"op-stt-read-3-en-desc\">The sense circuit latches the current difference and removes read bias. Each magnetic alignment is retained.</desc><style>#op-stt-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-stt-read-3-en path,#op-stt-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"28\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA latched</text><text x=\"98\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >P</text><rect x=\"65\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"65\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M98 111L98 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.98609313929471 91.93621377156641L98 85L94.01390686070529 91.93621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 166L98 140\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.98609313929471 146.93621377156643L98 140L94.01390686070529 146.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 173L98 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 180L98 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"98\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"98\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M98 209L98 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 187L87 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M98 219L98 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M88 225L108 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M92 230L104 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M96 235L100 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"54\" y=\"184\" width=\"88\" height=\"32\" fill=\"#e4edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"98\" y=\"207\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IP</text><text x=\"260\" y=\"64\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >AP</text><rect x=\"227\" y=\"77\" width=\"66\" height=\"41\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"120\" width=\"66\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"227\" y=\"132\" width=\"66\" height=\"41\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M260 85L260 111\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256.0139068607053 104.06378622843359L260 111L263.9860931392947 104.06378622843359\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 166L260 140\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M263.9860931392947 146.93621377156643L260 140L256.0139068607053 146.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 173L260 180\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 180L260 187\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"187\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"260\" cy=\"209\" r=\"2.5\" fill=\"#163449\" /><path d=\"M260 209L260 216\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 187L249 209\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260 219L260 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 225L270 225\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 230L266 230\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258 235L262 235\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"216\" y=\"184\" width=\"88\" height=\"32\" fill=\"#e4edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"260\" y=\"207\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >IAP</text><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >States retained</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ic",
                "meaning": "Conventional current, opposite to electron flow"
              },
              {
                "symbol": "e−",
                "meaning": "Electron-flow direction, not a magnetization arrow"
              },
              {
                "symbol": "mF / REF",
                "meaning": "Free-layer / pinned-reference magnetization"
              },
              {
                "symbol": "P / AP",
                "meaning": "Parallel low R / antiparallel high R; no logic encoding assigned"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-STT",
                "label": "IBM: Spin-Torque Structure Patent US5695864A",
                "url": "https://patents.google.com/patent/US5695864A/en",
                "kind": "Published patent",
                "date": "1997-12-09",
                "locator": "Abstract and claim 1: fixed and variable moments and current through the stack",
                "limit": "An early magnetic structure, not a complete disclosure of modern perpendicular MgO MTJ processing."
              },
              {
                "id": "op-stt-katine-2000",
                "label": "Katine et al.: Current-Driven Reversal in Co/Cu/Co Pillars",
                "url": "https://arxiv.org/abs/cond-mat/9908231",
                "kind": "Original research paper",
                "date": "2000",
                "locator": "Abstract: electron flow from thin to thick layer favors AP; reverse flow favors P",
                "limit": "Used for the current/electron-flow convention; not product data for an MgO MTJ."
              }
            ],
            "caveat": "Here positive conventional current is upward and electron flow is free-to-reference, illustrating P→AP; reverse flow illustrates AP→P. Verify polarity for the actual stack. Switching probability and read disturbance are not quantified.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "sot",
        "operationId": "write",
        "title": "SOT-MRAM · Write / SET",
        "summary": "A lateral write line supplies spin injection; an independent upper terminal and MTJ branch provide sensing.",
        "sources": [
          {
            "id": "EMG-SOT24",
            "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
            "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
            "kind": "Research institute technical article",
            "date": "2024-12-16",
            "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
            "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
          }
        ],
        "variants": [
          {
            "title": "Three-terminal SOT/MTJ teaching structure with an assist field",
            "summary": "A lateral write line supplies spin injection; an independent upper terminal and MTJ branch provide sensing.",
            "variant": "Three-terminal SOT/MTJ teaching structure with an assist field",
            "frames": [
              {
                "id": "sot-write-1-en",
                "title": "Initial: Upper MTJ Terminal Isolated",
                "caption": "The free layer retains its initial state. R is isolated, so write current need not cross the barrier.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-write-1-en-title op-sot-write-1-en-desc\" data-topic=\"sot\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-sot-write-1-en-title\">Initial: Upper MTJ Terminal Isolated</title><desc id=\"op-sot-write-1-en-desc\">The free layer retains its initial state. R is isolated, so write current need not cross the barrier.</desc><style>#op-sot-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-write-1-en path,#op-sot-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 164L180 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 142.93621377156643L180 136L176.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              },
              {
                "id": "sot-write-2-en",
                "title": "Lateral Pulse and Spin Injection",
                "caption": "A calibrated W1/W2 pulse injects Js into the free layer. Explicit Hassist supplies symmetry breaking for this example.",
                "state": "Free layer deflecting",
                "stimulus": "Lateral W1/W2 pulse and Hassist",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-write-2-en-title op-sot-write-2-en-desc\" data-topic=\"sot\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-sot-write-2-en-title\">Lateral Pulse and Spin Injection</title><desc id=\"op-sot-write-2-en-desc\">A calibrated W1/W2 pulse injects Js into the free layer. Explicit Hassist supplies symmetry breaking for this example.</desc><style>#op-sot-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-write-2-en path,#op-sot-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M167.87564434701787 157L192.12435565298213 143\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M188.1104648903735 149.9201648062633L192.12435565298213 143L184.1243717510788 143.01604896530313\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><path d=\"M67 194L290 194\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M283.06378622843357 197.9860931392947L290 194L283.06378622843357 190.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"239\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >I+</text><path d=\"M112 179L112 141\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M115.98609313929471 147.93621377156643L112 141L108.01390686070529 147.93621377156643\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"78\" y=\"157\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >Js</text><text x=\"49\" y=\"111\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >σ</text><circle cx=\"82\" cy=\"103\" r=\"8\" fill=\"#ffffff\" stroke=\"#147e82\" stroke-width=\"2.2\"/><circle cx=\"82\" cy=\"103\" r=\"3\" fill=\"#147e82\" /><path d=\"M272 63L324 63\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M317.06378622843357 66.98609313929471L324 63L317.06378622843357 59.01390686070529\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"274\" y=\"47\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Hassist</text></svg>"
              },
              {
                "id": "sot-write-3-en",
                "title": "Relaxation after Pulse Removal",
                "caption": "Turn off the lateral pulse. The free moment relaxes toward the target equilibrium under effective fields and damping.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-write-3-en-title op-sot-write-3-en-desc\" data-topic=\"sot\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-sot-write-3-en-title\">Relaxation after Pulse Removal</title><desc id=\"op-sot-write-3-en-desc\">Turn off the lateral pulse. The free moment relaxes toward the target equilibrium under effective fields and damping.</desc><style>#op-sot-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-write-3-en path,#op-sot-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184.78828200655937 136.8443033089973L175.21171799344063 163.1556966910027\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M173.8383405129687 155.2744636468571L175.21171799344063 163.1556966910027L181.32974513048984 158.00111194047918\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              },
              {
                "id": "sot-write-4-en",
                "title": "Final: Opposite Magnetization",
                "caption": "The free layer settles in the opposite state. The write line carries no current, and the MTJ can be read independently later.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-write-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-write-4-en-title op-sot-write-4-en-desc\" data-topic=\"sot\" data-operation=\"write\" data-frame=\"4\" data-language=\"en\"><title id=\"op-sot-write-4-en-title\">Final: Opposite Magnetization</title><desc id=\"op-sot-write-4-en-desc\">The free layer settles in the opposite state. The write line carries no current, and the MTJ can be read independently later.</desc><style>#op-sot-write-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-write-4-en path,#op-sot-write-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 136L180 164\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 157.06378622843357L180 164L183.9860931392947 157.06378622843357\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "W1 / W2",
                "meaning": "Two terminals of the lateral write line"
              },
              {
                "symbol": "R",
                "meaning": "Independent read terminal above the MTJ"
              },
              {
                "symbol": "Js",
                "meaning": "Spin-angular-momentum flux into the free layer"
              },
              {
                "symbol": "σ ⊙ / ⊗",
                "meaning": "Opposite spin polarization for the two write directions, out of / into the page"
              },
              {
                "symbol": "Hassist",
                "meaning": "Explicit symmetry-breaking assist field in this example"
              }
            ],
            "sources": [
              {
                "id": "EMG-SOT24",
                "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
                "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
                "kind": "Research institute technical article",
                "date": "2024-12-16",
                "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
                "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
              }
            ],
            "caveat": "Hassist is explicit; no deterministic field-free switching is assumed for a lone ideal line. I+/I− are opposite calibrated write directions; their state mapping depends on spin-Hall sign, stack orientation, and assist field.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "sot",
        "operationId": "erase",
        "title": "SOT-MRAM · Reverse Rewrite / RESET",
        "summary": "A lateral write line supplies spin injection; an independent upper terminal and MTJ branch provide sensing.",
        "sources": [
          {
            "id": "EMG-SOT24",
            "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
            "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
            "kind": "Research institute technical article",
            "date": "2024-12-16",
            "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
            "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
          }
        ],
        "variants": [
          {
            "title": "Three-terminal SOT/MTJ teaching structure with an assist field",
            "summary": "A lateral write line supplies spin injection; an independent upper terminal and MTJ branch provide sensing.",
            "variant": "Three-terminal SOT/MTJ teaching structure with an assist field",
            "frames": [
              {
                "id": "sot-erase-1-en",
                "title": "Initial: Upper MTJ Terminal Isolated",
                "caption": "The free layer retains its initial state. R is isolated, so write current need not cross the barrier.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-erase-1-en-title op-sot-erase-1-en-desc\" data-topic=\"sot\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-sot-erase-1-en-title\">Initial: Upper MTJ Terminal Isolated</title><desc id=\"op-sot-erase-1-en-desc\">The free layer retains its initial state. R is isolated, so write current need not cross the barrier.</desc><style>#op-sot-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-erase-1-en path,#op-sot-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 136L180 164\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 157.06378622843357L180 164L183.9860931392947 157.06378622843357\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              },
              {
                "id": "sot-erase-2-en",
                "title": "Lateral Pulse and Spin Injection",
                "caption": "A calibrated W1/W2 pulse injects Js into the free layer. Explicit Hassist supplies symmetry breaking for this example.",
                "state": "Free layer deflecting",
                "stimulus": "Lateral W1/W2 pulse and Hassist",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-erase-2-en-title op-sot-erase-2-en-desc\" data-topic=\"sot\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-sot-erase-2-en-title\">Lateral Pulse and Spin Injection</title><desc id=\"op-sot-erase-2-en-desc\">A calibrated W1/W2 pulse injects Js into the free layer. Explicit Hassist supplies symmetry breaking for this example.</desc><style>#op-sot-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-erase-2-en path,#op-sot-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M192.12435565298213 143L167.87564434701787 157\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M171.8895351096265 150.0798351937367L167.87564434701787 157L175.8756282489212 156.98395103469687\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><path d=\"M290 194L67 194\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M73.93621377156641 190.01390686070528L67 194L73.93621377156641 197.9860931392947\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"239\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >I−</text><path d=\"M112 179L112 141\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M115.98609313929471 147.93621377156643L112 141L108.01390686070529 147.93621377156643\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"78\" y=\"157\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >Js</text><text x=\"49\" y=\"111\" text-anchor=\"middle\" fill=\"#147e82\" font-size=\"20\" >σ</text><circle cx=\"82\" cy=\"103\" r=\"8\" fill=\"#ffffff\" stroke=\"#147e82\" stroke-width=\"2.2\"/><path d=\"M78 99L86 107\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M78 107L86 99\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272 63L324 63\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M317.06378622843357 66.98609313929471L324 63L317.06378622843357 59.01390686070529\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"274\" y=\"47\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Hassist</text></svg>"
              },
              {
                "id": "sot-erase-3-en",
                "title": "Relaxation after Pulse Removal",
                "caption": "Turn off the lateral pulse. The free moment relaxes toward the target equilibrium under effective fields and damping.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-erase-3-en-title op-sot-erase-3-en-desc\" data-topic=\"sot\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-sot-erase-3-en-title\">Relaxation after Pulse Removal</title><desc id=\"op-sot-erase-3-en-desc\">Turn off the lateral pulse. The free moment relaxes toward the target equilibrium under effective fields and damping.</desc><style>#op-sot-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-erase-3-en path,#op-sot-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M184.78828200655937 163.15569669100273L175.21171799344063 136.84430330899727\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181.32974513048984 141.9988880595208L175.21171799344063 136.84430330899727L173.83834051296867 144.72553635314287\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              },
              {
                "id": "sot-erase-4-en",
                "title": "Final: Opposite Magnetization",
                "caption": "The free layer settles in the opposite state. The write line carries no current, and the MTJ can be read independently later.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-erase-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-erase-4-en-title op-sot-erase-4-en-desc\" data-topic=\"sot\" data-operation=\"erase\" data-frame=\"4\" data-language=\"en\"><title id=\"op-sot-erase-4-en-title\">Final: Opposite Magnetization</title><desc id=\"op-sot-erase-4-en-desc\">The free layer settles in the opposite state. The write line carries no current, and the MTJ can be read independently later.</desc><style>#op-sot-erase-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-erase-4-en path,#op-sot-erase-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 164L180 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 142.93621377156643L180 136L176.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "W1 / W2",
                "meaning": "Two terminals of the lateral write line"
              },
              {
                "symbol": "R",
                "meaning": "Independent read terminal above the MTJ"
              },
              {
                "symbol": "Js",
                "meaning": "Spin-angular-momentum flux into the free layer"
              },
              {
                "symbol": "σ ⊙ / ⊗",
                "meaning": "Opposite spin polarization for the two write directions, out of / into the page"
              },
              {
                "symbol": "Hassist",
                "meaning": "Explicit symmetry-breaking assist field in this example"
              }
            ],
            "sources": [
              {
                "id": "EMG-SOT24",
                "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
                "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
                "kind": "Research institute technical article",
                "date": "2024-12-16",
                "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
                "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
              }
            ],
            "caveat": "Hassist is explicit; no deterministic field-free switching is assumed for a lone ideal line. I+/I− are opposite calibrated write directions; their state mapping depends on spin-Hall sign, stack orientation, and assist field.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "sot",
        "operationId": "read",
        "title": "SOT-MRAM · Read",
        "summary": "Sense from R through the MTJ and return via W2 while W1 stays isolated; latch and remove read current while retaining magnetization.",
        "sources": [
          {
            "id": "EMG-SOT24",
            "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
            "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
            "kind": "Research institute technical article",
            "date": "2024-12-16",
            "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
            "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
          }
        ],
        "variants": [
          {
            "title": "Three-terminal SOT/MTJ: R→W2 sensing path with W1 isolated",
            "summary": "Sense from R through the MTJ and return via W2 while W1 stays isolated; latch and remove read current while retaining magnetization.",
            "variant": "Three-terminal SOT/MTJ: R→W2 sensing path with W1 isolated",
            "frames": [
              {
                "id": "sot-read-1-en",
                "title": "Retain: Write and Read Paths Isolated",
                "caption": "The illustrated P state is retained with R and W1 isolated; no holding current is required.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-read-1-en-title op-sot-read-1-en-desc\" data-topic=\"sot\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-sot-read-1-en-title\">Retain: Write and Read Paths Isolated</title><desc id=\"op-sot-read-1-en-desc\">The illustrated P state is retained with R and W1 isolated; no holding current is required.</desc><style>#op-sot-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-read-1-en path,#op-sot-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 164L180 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 142.93621377156643L180 136L176.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text></svg>"
              },
              {
                "id": "sot-read-2-en",
                "title": "Read: Enable Only the MTJ Branch",
                "caption": "Read current passes from R through REF/barrier/free layer and returns via W2. W1 is isolated, so no W1→W2 write drive is applied.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Only the R→W2 read branch",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-read-2-en-title op-sot-read-2-en-desc\" data-topic=\"sot\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-sot-read-2-en-title\">Read: Enable Only the MTJ Branch</title><desc id=\"op-sot-read-2-en-desc\">Read current passes from R through REF/barrier/free layer and returns via W2. W1 is isolated, so no W1→W2 write drive is applied.</desc><style>#op-sot-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-read-2-en path,#op-sot-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L180 62\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 164L180 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 142.93621377156643L180 136L176.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><path d=\"M180 40L180 72\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 65.06378622843359L180 72L183.9860931392947 65.06378622843359\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 172L180 195\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M176.0139068607053 188.06378622843357L180 195L183.9860931392947 188.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M181 195L308 195\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M301.06378622843357 198.9860931392947L308 195L301.06378622843357 191.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"53\" y=\"72\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Iread</text><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >W1 isolated</text></svg>"
              },
              {
                "id": "sot-read-3-en",
                "title": "Latch: Read Current Removed",
                "caption": "After latching the sensed value, open the R branch and stop read current; the free-layer direction is retained.",
                "state": "Magnetization retained or relaxing to equilibrium",
                "stimulus": "Read/write excitation off",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-sot-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-sot-read-3-en-title op-sot-read-3-en-desc\" data-topic=\"sot\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-sot-read-3-en-title\">Latch: Read Current Removed</title><desc id=\"op-sot-read-3-en-desc\">After latching the sensed value, open the R branch and stop read current; the free-layer direction is retained.</desc><style>#op-sot-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-sot-read-3-en path,#op-sot-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >R</text><path d=\"M180 33L180 40\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"40\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"180\" cy=\"62\" r=\"2.5\" fill=\"#163449\" /><path d=\"M180 62L180 69\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 40L169 62\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 69L180 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"133\" y=\"77\" width=\"94\" height=\"37\" fill=\"#435b89\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"117\" width=\"94\" height=\"11\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"133\" y=\"131\" width=\"94\" height=\"39\" fill=\"#147e82\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 108.5L180 81.5\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 88.43621377156641L180 81.5L176.0139068607053 88.43621377156641\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 164L180 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183.9860931392947 142.93621377156643L180 136L176.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"239\" y=\"103\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >REF</text><text x=\"239\" y=\"158\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >mF</text><rect x=\"37\" y=\"175\" width=\"286\" height=\"37\" fill=\"#7e99b0\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"37\" cy=\"193\" r=\"4\" fill=\"#163449\" /><circle cx=\"323\" cy=\"193\" r=\"4\" fill=\"#163449\" /><text x=\"34\" y=\"239\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >W1</text><text x=\"322\" y=\"239\" text-anchor=\"end\" fill=\"#163449\" font-size=\"20\" >W2</text><text x=\"180\" y=\"256\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Write-line current = 0</text><rect x=\"29\" y=\"67\" width=\"66\" height=\"30\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"62\" y=\"90\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "W1 / W2",
                "meaning": "Two terminals of the lateral write line"
              },
              {
                "symbol": "R",
                "meaning": "Independent read terminal above the MTJ"
              },
              {
                "symbol": "Js",
                "meaning": "Spin-angular-momentum flux into the free layer"
              },
              {
                "symbol": "σ ⊙ / ⊗",
                "meaning": "Opposite spin polarization for the two write directions, out of / into the page"
              },
              {
                "symbol": "Hassist",
                "meaning": "Explicit symmetry-breaking assist field in this example"
              }
            ],
            "sources": [
              {
                "id": "EMG-SOT24",
                "label": "imec: Functional SOT-MRAM Arrays and Cache Research",
                "url": "https://www.imec-int.com/en/articles/bringing-sot-mram-technology-closer-last-level-cache-memory-specifications",
                "kind": "Research institute technical article",
                "date": "2024-12-16",
                "locator": "Three-terminal SOT structure, separate read/write paths, and magnetic-field requirements",
                "limit": "A research mechanism, not SOT volume production; the diagram explicitly includes an assist field and makes no field-free claim."
              }
            ],
            "caveat": "This sequence illustrates low-bias sensing of retained P; AP can be sensed through the same path. Set actual read bias and duration according to the MTJ stack and read-disturb constraints.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "vcm",
        "operationId": "write",
        "title": "VCM ReRAM · Write / SET",
        "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
        "sources": [
          {
            "id": "op-vcm-reservoir-2026",
            "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
            "url": "https://www.nature.com/articles/s43246-026-01143-8",
            "kind": "Original research paper",
            "date": "2026-04-06",
            "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
            "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
          },
          {
            "id": "EMG-P-VCM",
            "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
            "url": "https://patents.google.com/patent/US8331131B2/en",
            "kind": "Published patent",
            "date": "2012-12-11",
            "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
            "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
          }
        ],
        "variants": [
          {
            "title": "Bipolar oxide model with an oxygen-exchange upper interface",
            "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
            "variant": "Bipolar oxide model with an oxygen-exchange upper interface",
            "frames": [
              {
                "id": "vcm-write-1-en",
                "title": "High-R Initial State: Gap in the Path",
                "caption": "The plate begins in a formed, RESET high-R state. A locally oxidized gap interrupts the oxygen-deficient path.",
                "state": "Gapped oxygen-deficient path",
                "stimulus": "TE and BE are equipotential",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-write-1-en-title op-vcm-write-1-en-desc\" data-topic=\"vcm\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-vcm-write-1-en-title\">High-R Initial State: Gap in the Path</title><desc id=\"op-vcm-write-1-en-desc\">The plate begins in a formed, RESET high-R state. A locally oxidized gap interrupts the oxygen-deficient path.</desc><style>#op-vcm-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-write-1-en path,#op-vcm-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V160M180 131V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "vcm-write-2-en",
                "title": "SET Bias: Oxygen Migrates Upward",
                "caption": "With the selected positive TE bias, O²− moves toward the upper exchange interface, leaving oxygen-deficient sites along the path.",
                "state": "Gapped oxygen-deficient path",
                "stimulus": "Positive TE bias; BE at zero; current compliance enabled",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-write-2-en-title op-vcm-write-2-en-desc\" data-topic=\"vcm\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-vcm-write-2-en-title\">SET Bias: Oxygen Migrates Upward</title><desc id=\"op-vcm-write-2-en-desc\">With the selected positive TE bias, O²− moves toward the upper exchange interface, leaving oxygen-deficient sites along the path.</desc><style>#op-vcm-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-write-2-en path,#op-vcm-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >TE + / BE 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V160M180 131V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"200\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"208\" cy=\"140\" r=\"7\" fill=\"#257fa2\" /><path d=\"M208 174L208 94\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M211.9860931392947 100.93621377156641L208 94L204.0139068607053 100.93621377156641\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M67 91L67 177\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M63.01390686070529 170.06378622843357L67 177L70.98609313929471 170.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"54\" y=\"157\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"299\" y=\"173\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ilim</text><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "vcm-write-3-en",
                "title": "Oxygen-Vacancy Path Connects",
                "caption": "The local vacancy-rich path connects and resistance falls. Ilim limits excessive path growth and Joule heating.",
                "state": "Connected oxygen-deficient low-R path",
                "stimulus": "Positive TE bias; BE at zero; current compliance enabled",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-write-3-en-title op-vcm-write-3-en-desc\" data-topic=\"vcm\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-vcm-write-3-en-title\">Oxygen-Vacancy Path Connects</title><desc id=\"op-vcm-write-3-en-desc\">The local vacancy-rich path connects and resistance falls. Ilim limits excessive path growth and Joule heating.</desc><style>#op-vcm-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-write-3-en path,#op-vcm-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >TE + / BE 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"200\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"223\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"208\" cy=\"105\" r=\"7\" fill=\"#257fa2\" /><path d=\"M208 174L208 94\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M211.9860931392947 100.93621377156641L208 94L204.0139068607053 100.93621377156641\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M67 91L67 177\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M63.01390686070529 170.06378622843357L67 177L70.98609313929471 170.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"54\" y=\"157\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"299\" y=\"173\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ilim</text><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "vcm-write-4-en",
                "title": "Bias Removed: Low Resistance Retained",
                "caption": "After SET bias is removed, the oxygen-deficient path remains connected without a holding voltage.",
                "state": "Connected oxygen-deficient low-R path",
                "stimulus": "TE and BE are equipotential",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-write-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-write-4-en-title op-vcm-write-4-en-desc\" data-topic=\"vcm\" data-operation=\"write\" data-frame=\"4\" data-language=\"en\"><title id=\"op-vcm-write-4-en-title\">Bias Removed: Low Resistance Retained</title><desc id=\"op-vcm-write-4-en-desc\">After SET bias is removed, the oxygen-deficient path remains connected without a holding voltage.</desc><style>#op-vcm-write-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-write-4-en path,#op-vcm-write-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"200\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"223\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "O²−",
                "meaning": "Mobile oxygen ions, filled blue circles"
              },
              {
                "symbol": "VO",
                "meaning": "Oxygen-deficient sites, open circles; not metal particles"
              },
              {
                "symbol": "TE / BE",
                "meaning": "Upper / lower electrode; TE voltage referenced to BE"
              },
              {
                "symbol": "Ilim",
                "meaning": "SET current compliance, limiting path overgrowth"
              }
            ],
            "sources": [
              {
                "id": "op-vcm-reservoir-2026",
                "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
                "url": "https://www.nature.com/articles/s43246-026-01143-8",
                "kind": "Original research paper",
                "date": "2026-04-06",
                "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
                "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
              },
              {
                "id": "EMG-P-VCM",
                "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
                "url": "https://patents.google.com/patent/US8331131B2/en",
                "kind": "Published patent",
                "date": "2012-12-11",
                "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
                "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
              }
            ],
            "caveat": "Positive upper-electrode bias drives O²− toward the upper interface in this selected convention. Vacancies are not metal ions; actual VCM can switch at interfaces or broader channels. Forming is distinct from recurring SET.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "vcm",
        "operationId": "erase",
        "title": "VCM ReRAM · Reverse Rewrite / RESET",
        "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
        "sources": [
          {
            "id": "op-vcm-reservoir-2026",
            "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
            "url": "https://www.nature.com/articles/s43246-026-01143-8",
            "kind": "Original research paper",
            "date": "2026-04-06",
            "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
            "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
          },
          {
            "id": "EMG-P-VCM",
            "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
            "url": "https://patents.google.com/patent/US8331131B2/en",
            "kind": "Published patent",
            "date": "2012-12-11",
            "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
            "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
          }
        ],
        "variants": [
          {
            "title": "Bipolar oxide model with an oxygen-exchange upper interface",
            "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
            "variant": "Bipolar oxide model with an oxygen-exchange upper interface",
            "frames": [
              {
                "id": "vcm-erase-1-en",
                "title": "Low-R Initial State: Vacancy Path Connected",
                "caption": "After SET, an oxygen-deficient region connects the electrodes and retains low resistance without bias.",
                "state": "Low-R path with returning oxygen",
                "stimulus": "TE and BE are equipotential",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-erase-1-en-title op-vcm-erase-1-en-desc\" data-topic=\"vcm\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-vcm-erase-1-en-title\">Low-R Initial State: Vacancy Path Connected</title><desc id=\"op-vcm-erase-1-en-desc\">After SET, an oxygen-deficient region connects the electrodes and retains low resistance without bias.</desc><style>#op-vcm-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-erase-1-en path,#op-vcm-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"200\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"223\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "vcm-erase-2-en",
                "title": "Reverse Bias: Oxygen Ions Return",
                "caption": "Reversing TE bias in this model returns O²− from the exchange region toward the local path; arrows indicate oxygen-ion motion.",
                "state": "Low-R path with returning oxygen",
                "stimulus": "Negative TE bias; BE at zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-erase-2-en-title op-vcm-erase-2-en-desc\" data-topic=\"vcm\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-vcm-erase-2-en-title\">Reverse Bias: Oxygen Ions Return</title><desc id=\"op-vcm-erase-2-en-desc\">Reversing TE bias in this model returns O²− from the exchange region toward the local path; arrows indicate oxygen-ion motion.</desc><style>#op-vcm-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-erase-2-en path,#op-vcm-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >TE − / BE 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"200\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"208\" cy=\"111\" r=\"7\" fill=\"#257fa2\" /><path d=\"M208 95L208 169\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M204.0139068607053 162.06378622843357L208 169L211.9860931392947 162.06378622843357\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M67 177L67 91\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.98609313929471 97.93621377156641L67 91L63.01390686070529 97.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"54\" y=\"157\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M162 128H197V158H162Z\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 3\"/><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "vcm-erase-3-en",
                "title": "Neck Reoxidation: A Gap Opens",
                "caption": "Oxygen reincorporation interrupts the narrowest path segment. The entire pre-existing path need not disappear.",
                "state": "High-R state with a local gap",
                "stimulus": "Negative TE bias; BE at zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-erase-3-en-title op-vcm-erase-3-en-desc\" data-topic=\"vcm\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-vcm-erase-3-en-title\">Neck Reoxidation: A Gap Opens</title><desc id=\"op-vcm-erase-3-en-desc\">Oxygen reincorporation interrupts the narrowest path segment. The entire pre-existing path need not disappear.</desc><style>#op-vcm-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-erase-3-en path,#op-vcm-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >TE − / BE 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V160M180 131V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"208\" cy=\"143\" r=\"7\" fill=\"#257fa2\" /><path d=\"M208 95L208 169\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M204.0139068607053 162.06378622843357L208 169L211.9860931392947 162.06378622843357\" fill=\"none\" stroke=\"#257fa2\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M67 177L67 91\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M70.98609313929471 97.93621377156641L67 91L63.01390686070529 97.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"54\" y=\"157\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M162 128H197V158H162Z\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 3\"/><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "vcm-erase-4-en",
                "title": "Bias Removed: High Resistance Retained",
                "caption": "After RESET bias is removed, the local gap and residual oxygen-deficient regions remain for a later high-R read.",
                "state": "High-R state with a local gap",
                "stimulus": "TE and BE are equipotential",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-erase-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-erase-4-en-title op-vcm-erase-4-en-desc\" data-topic=\"vcm\" data-operation=\"erase\" data-frame=\"4\" data-language=\"en\"><title id=\"op-vcm-erase-4-en-title\">Bias Removed: High Resistance Retained</title><desc id=\"op-vcm-erase-4-en-desc\">After RESET bias is removed, the local gap and residual oxygen-deficient regions remain for a later high-R read.</desc><style>#op-vcm-erase-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-erase-4-en path,#op-vcm-erase-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"100\" y=\"62\" width=\"158\" height=\"26\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"91\" width=\"158\" height=\"111\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"100\" y=\"205\" width=\"158\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"278\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"278\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"19\" y=\"130\" text-anchor=\"start\" fill=\"#257fa2\" font-size=\"20\" >O²−</text><text x=\"19\" y=\"190\" text-anchor=\"start\" fill=\"#aa5d1d\" font-size=\"20\" >VO</text><circle cx=\"117\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"113\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"135\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"157\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"132\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"217\" cy=\"179\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"117\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"229\" cy=\"195\" r=\"5\" fill=\"#257fa2\" /><path d=\"M180 201V160M180 131V92\" fill=\"none\" stroke=\"#e1c29f\" stroke-width=\"15\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"101\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"135\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"152\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"180\" cy=\"169\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"186\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"180\" cy=\"199\" r=\"6\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"131\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"154\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><circle cx=\"177\" cy=\"74\" r=\"5\" fill=\"#257fa2\" /><text x=\"180\" y=\"259\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "O²−",
                "meaning": "Mobile oxygen ions, filled blue circles"
              },
              {
                "symbol": "VO",
                "meaning": "Oxygen-deficient sites, open circles; not metal particles"
              },
              {
                "symbol": "TE / BE",
                "meaning": "Upper / lower electrode; TE voltage referenced to BE"
              },
              {
                "symbol": "Ilim",
                "meaning": "SET current compliance, limiting path overgrowth"
              }
            ],
            "sources": [
              {
                "id": "op-vcm-reservoir-2026",
                "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
                "url": "https://www.nature.com/articles/s43246-026-01143-8",
                "kind": "Original research paper",
                "date": "2026-04-06",
                "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
                "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
              },
              {
                "id": "EMG-P-VCM",
                "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
                "url": "https://patents.google.com/patent/US8331131B2/en",
                "kind": "Published patent",
                "date": "2012-12-11",
                "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
                "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
              }
            ],
            "caveat": "Positive upper-electrode bias drives O²− toward the upper interface in this selected convention. Vacancies are not metal ions; actual VCM can switch at interfaces or broader channels. Forming is distinct from recurring SET.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "vcm",
        "operationId": "read",
        "title": "VCM ReRAM · Read",
        "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
        "sources": [
          {
            "id": "op-vcm-reservoir-2026",
            "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
            "url": "https://www.nature.com/articles/s43246-026-01143-8",
            "kind": "Original research paper",
            "date": "2026-04-06",
            "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
            "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
          },
          {
            "id": "EMG-P-VCM",
            "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
            "url": "https://patents.google.com/patent/US8331131B2/en",
            "kind": "Published patent",
            "date": "2012-12-11",
            "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
            "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
          }
        ],
        "variants": [
          {
            "title": "Bipolar oxide model with an oxygen-exchange upper interface",
            "summary": "Follow oxygen-ion exchange, oxygen-vacancy distribution, and a local gap through SET, RESET, and low-bias read.",
            "variant": "Bipolar oxide model with an oxygen-exchange upper interface",
            "frames": [
              {
                "id": "vcm-read-1-en",
                "title": "Initial: Two Possible Resistance States",
                "caption": "Left and right are the low- and high-resistance alternatives for one cell. Read bias has not yet been applied.",
                "state": "Low-R and high-R structures retained",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-read-1-en-title op-vcm-read-1-en-desc\" data-topic=\"vcm\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-vcm-read-1-en-title\">Initial: Two Possible Resistance States</title><desc id=\"op-vcm-read-1-en-desc\">Left and right are the low- and high-resistance alternatives for one cell. Read bias has not yet been applied.</desc><style>#op-vcm-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-read-1-en path,#op-vcm-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M55 41L229 41\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M55 41L55 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M229 41L229 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M93 189V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"150\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><path d=\"M93 205L93 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"93\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M93 234L93 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 212L82 234\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M267 189V158M267 135V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"150\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"267\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><path d=\"M267 205L267 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"267\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M267 234L267 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 212L256 234\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Paths isolated</text></svg>"
              },
              {
                "id": "vcm-read-2-en",
                "title": "Small Bias: Compare Electronic Current",
                "caption": "Compare currents at the same small read bias, chosen to avoid appreciable ionic redistribution.",
                "state": "Electronic sensing; ionic state approximately unchanged",
                "stimulus": "Small read bias; no SET or RESET pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-read-2-en-title op-vcm-read-2-en-desc\" data-topic=\"vcm\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-vcm-read-2-en-title\">Small Bias: Compare Electronic Current</title><desc id=\"op-vcm-read-2-en-desc\">Compare currents at the same small read bias, chosen to avoid appreciable ionic redistribution.</desc><style>#op-vcm-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-read-2-en path,#op-vcm-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vread</text><path d=\"M55 41L229 41\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M55 41L55 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M229 41L229 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M93 189V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"150\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><path d=\"M42 112L42 183\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M38.01390686070529 176.06378622843357L42 183L45.98609313929471 176.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 205L93 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"93\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M93 234L93 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 212L93 234\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M267 189V158M267 135V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"150\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"267\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><path d=\"M216 112L216 183\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M212.0139068607053 176.06378622843357L216 183L219.9860931392947 176.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 205L267 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"267\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M267 234L267 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 212L267 234\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >ILRS &gt; IHRS</text></svg>"
              },
              {
                "id": "vcm-read-3-en",
                "title": "After Latching: Remove Bias and Retain Structure",
                "caption": "After the sense circuit latches the difference, current stops. The connected low-R path and local high-R gap remain retained.",
                "state": "Low-R and high-R structures retained",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-vcm-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-vcm-read-3-en-title op-vcm-read-3-en-desc\" data-topic=\"vcm\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-vcm-read-3-en-title\">After Latching: Remove Bias and Retain Structure</title><desc id=\"op-vcm-read-3-en-desc\">After the sense circuit latches the difference, current stops. The connected low-R path and local high-R gap remain retained.</desc><style>#op-vcm-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-vcm-read-3-en path,#op-vcm-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M93 189V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"150\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"93\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><rect x=\"42\" y=\"219\" width=\"102\" height=\"30\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"93\" y=\"241\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I large</text><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M267 189V158M267 135V108\" fill=\"none\" stroke=\"#aa5d1d\" stroke-width=\"9\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"118\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"134\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"150\" r=\"6\" fill=\"#257fa2\" /><circle cx=\"267\" cy=\"166\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><circle cx=\"267\" cy=\"182\" r=\"5\" fill=\"#ffffff\" stroke=\"#aa5d1d\" stroke-width=\"2.2\"/><rect x=\"216\" y=\"219\" width=\"102\" height=\"30\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"267\" y=\"241\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I small</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ion positions retained</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "O²−",
                "meaning": "Mobile oxygen ions, filled blue circles"
              },
              {
                "symbol": "VO",
                "meaning": "Oxygen-deficient sites, open circles; not metal particles"
              },
              {
                "symbol": "TE / BE",
                "meaning": "Upper / lower electrode; TE voltage referenced to BE"
              },
              {
                "symbol": "Ilim",
                "meaning": "SET current compliance, limiting path overgrowth"
              }
            ],
            "sources": [
              {
                "id": "op-vcm-reservoir-2026",
                "label": "Yuan et al.: Controlled Oxygen-Reservoir Electrodes for WO₃ Memory",
                "url": "https://www.nature.com/articles/s43246-026-01143-8",
                "kind": "Original research paper",
                "date": "2026-04-06",
                "locator": "Figures 1b/4h and Discussion: positive-bias SET, reverse RESET, and oxygen-exchange model in ITO/WO₃/TiN",
                "limit": "A simplified teaching model. The paper supports the mechanism electrically and spectroscopically but does not directly track operando ion trajectories; these drawings are not in situ measurements."
              },
              {
                "id": "EMG-P-VCM",
                "label": "HP: Multilayer Oxide Switching Patent US8331131B2",
                "url": "https://patents.google.com/patent/US8331131B2/en",
                "kind": "Published patent",
                "date": "2012-12-11",
                "locator": "Figures 3 and 5; ionic/defect redistribution and pulse conditions",
                "limit": "The patent-specific multilayer and two-stage pulse are not mandatory for every VCM."
              }
            ],
            "caveat": "Positive upper-electrode bias drives O²− toward the upper interface in this selected convention. Vacancies are not metal ions; actual VCM can switch at interfaces or broader channels. Forming is distinct from recurring SET.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ecm",
        "operationId": "write",
        "title": "ECM / CBRAM · Write / SET",
        "summary": "The active Ag electrode releases Ag+ by oxidation; ions drift to the cathode for reduction and nucleation, then the growing bridge connects before bias removal.",
        "sources": [
          {
            "id": "EMG-P-ECM",
            "label": "Axon: Programmable Metallization Cell Patent US5761115A",
            "url": "https://patents.google.com/patent/US5761115A/en",
            "kind": "Published patent",
            "date": "1998-06-02",
            "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
            "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
          }
        ],
        "variants": [
          {
            "title": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "summary": "The active Ag electrode releases Ag+ by oxidation; ions drift to the cathode for reduction and nucleation, then the growing bridge connects before bias removal.",
            "variant": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "frames": [
              {
                "id": "ecm-write-1-en",
                "title": "High-R Initial State: No Metal Bridge",
                "caption": "Upper Ag is the oxidizable metal source and lower BE is inert. Initially no metallic bridge spans the medium.",
                "state": "Unconnected state",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-write-1-en-title op-ecm-write-1-en-desc\" data-topic=\"ecm\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ecm-write-1-en-title\">High-R Initial State: No Metal Bridge</title><desc id=\"op-ecm-write-1-en-desc\">Upper Ag is the oxidizable metal source and lower BE is inert. Initially no metallic bridge spans the medium.</desc><style>#op-ecm-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-write-1-en path,#op-ecm-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><circle cx=\"132\" cy=\"127\" r=\"6\" fill=\"#b76730\" /><path d=\"M129 127L135 127\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M132 124L132 130\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"230\" cy=\"174\" r=\"6\" fill=\"#b76730\" /><path d=\"M227 174L233 174\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M230 171L230 177\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "ecm-write-2-en",
                "title": "Ag Oxidation, Ion Drift, and Nucleation",
                "caption": "The Ag anode releases Ag+ and electrons. Ag+ drifts toward the cathode, where electrons reduce ions and initiate nucleation.",
                "state": "Cathodic nucleation and metal growth",
                "stimulus": "Positive bias at upper Ag; SET current compliance",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-write-2-en-title op-ecm-write-2-en-desc\" data-topic=\"ecm\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ecm-write-2-en-title\">Ag Oxidation, Ion Drift, and Nucleation</title><desc id=\"op-ecm-write-2-en-desc\">The Ag anode releases Ag+ and electrons. Ag+ drifts toward the cathode, where electrons reduce ions and initiate nucleation.</desc><style>#op-ecm-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-write-2-en path,#op-ecm-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ag + / BE 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L175 188L184 180\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"160\" cy=\"108\" r=\"6\" fill=\"#b76730\" /><path d=\"M157 108L163 108\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M160 105L160 111\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"210\" cy=\"133\" r=\"6\" fill=\"#b76730\" /><path d=\"M207 133L213 133\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M210 130L210 136\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"196\" cy=\"167\" r=\"6\" fill=\"#b76730\" /><path d=\"M193 167L199 167\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196 164L196 170\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 93L66 178\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62.01390686070529 171.06378622843357L66 178L69.98609313929471 171.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"50\" y=\"155\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M237 103L237 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M233.0139068607053 167.06378622843357L237 174L240.9860931392947 167.06378622843357\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"289\" y=\"173\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ilim</text><circle cx=\"145\" cy=\"194\" r=\"6\" fill=\"#196daf\" /><path d=\"M142 194L148 194\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M157 194L172 185\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M168.10307376055778 191.9866992123854L172 185L164.00141775874596 185.15060587603236\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#b76730\" font-size=\"20\" >Ag → Ag+ + e−</text></svg>"
              },
              {
                "id": "ecm-write-3-en",
                "title": "Cathodic Reduction: Metal Grows Upward",
                "caption": "Cathodic metal deposition extends toward the Ag electrode. This selected growth direction is not universal across ECM.",
                "state": "Cathodic nucleation and metal growth",
                "stimulus": "Positive bias at upper Ag; SET current compliance",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-write-3-en-title op-ecm-write-3-en-desc\" data-topic=\"ecm\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ecm-write-3-en-title\">Cathodic Reduction: Metal Grows Upward</title><desc id=\"op-ecm-write-3-en-desc\">Cathodic metal deposition extends toward the Ag electrode. This selected growth direction is not universal across ECM.</desc><style>#op-ecm-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-write-3-en path,#op-ecm-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ag + / BE 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L175 181L184 161L177 139L183 124\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"175\" cy=\"105\" r=\"6\" fill=\"#b76730\" /><path d=\"M172 105L178 105\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M175 102L175 108\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"213\" cy=\"126\" r=\"6\" fill=\"#b76730\" /><path d=\"M210 126L216 126\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M213 123L213 129\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"208\" cy=\"157\" r=\"6\" fill=\"#b76730\" /><path d=\"M205 157L211 157\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M208 154L208 160\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 93L66 178\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62.01390686070529 171.06378622843357L66 178L69.98609313929471 171.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"50\" y=\"155\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M237 103L237 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M233.0139068607053 167.06378622843357L237 174L240.9860931392947 167.06378622843357\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"289\" y=\"173\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Ilim</text><circle cx=\"145\" cy=\"194\" r=\"6\" fill=\"#196daf\" /><path d=\"M142 194L148 194\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M157 194L172 185\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M168.10307376055778 191.9866992123854L172 185L164.00141775874596 185.15060587603236\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#b76730\" font-size=\"20\" >Ag+ + e− → Ag</text></svg>"
              },
              {
                "id": "ecm-write-4-en",
                "title": "After Connection: Remove Bias and Retain the Bridge",
                "caption": "Current compliance limits bridge thickening. After connection and bias removal, the retained bridge supplies a low-R electronic path.",
                "state": "Continuous silver bridge",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-write-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-write-4-en-title op-ecm-write-4-en-desc\" data-topic=\"ecm\" data-operation=\"write\" data-frame=\"4\" data-language=\"en\"><title id=\"op-ecm-write-4-en-title\">After Connection: Remove Bias and Retain the Bridge</title><desc id=\"op-ecm-write-4-en-desc\">Current compliance limits bridge thickening. After connection and bias removal, the retained bridge supplies a low-R electronic path.</desc><style>#op-ecm-write-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-write-4-en path,#op-ecm-write-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L175 181L184 161L177 139L182 116L179 89\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"129\" cy=\"116\" r=\"6\" fill=\"#b76730\" /><path d=\"M126 116L132 116\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M129 113L129 119\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"157\" r=\"6\" fill=\"#b76730\" /><path d=\"M228 157L234 157\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 154L231 160\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ag / Ag+",
                "meaning": "Metallic silver / silver ions; distinct from VCM vacancies"
              },
              {
                "symbol": "Ag → Ag+ + e−",
                "meaning": "Oxidation at the active electrode"
              },
              {
                "symbol": "Ag+ + e− → Ag",
                "meaning": "Reduction and metal deposition near the cathode"
              },
              {
                "symbol": "Ilim",
                "meaning": "Current compliance limiting bridge thickening"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-ECM",
                "label": "Axon: Programmable Metallization Cell Patent US5761115A",
                "url": "https://patents.google.com/patent/US5761115A/en",
                "kind": "Published patent",
                "date": "1998-06-02",
                "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
                "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
              }
            ],
            "caveat": "A representative cathode-nucleated embodiment is selected; other media and kinetics can change growth direction. RESET interrupts a critical path and does not remove all metal.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ecm",
        "operationId": "erase",
        "title": "ECM / CBRAM · Reverse Rewrite / RESET",
        "summary": "Apply reverse bias to a connected silver bridge, oxidize and dissolve its neck locally, then remove bias while retaining a high-R gap and residual metal.",
        "sources": [
          {
            "id": "EMG-P-ECM",
            "label": "Axon: Programmable Metallization Cell Patent US5761115A",
            "url": "https://patents.google.com/patent/US5761115A/en",
            "kind": "Published patent",
            "date": "1998-06-02",
            "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
            "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
          }
        ],
        "variants": [
          {
            "title": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "summary": "Apply reverse bias to a connected silver bridge, oxidize and dissolve its neck locally, then remove bias while retaining a high-R gap and residual metal.",
            "variant": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "frames": [
              {
                "id": "ecm-erase-1-en",
                "title": "Low-R Initial State: Silver Bridge Connected",
                "caption": "A continuous silver bridge forms a low-R electronic path. Ionic transport and electronic conduction are distinct.",
                "state": "Connected or locally dissolving metal bridge",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-erase-1-en-title op-ecm-erase-1-en-desc\" data-topic=\"ecm\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ecm-erase-1-en-title\">Low-R Initial State: Silver Bridge Connected</title><desc id=\"op-ecm-erase-1-en-desc\">A continuous silver bridge forms a low-R electronic path. Ionic transport and electronic conduction are distinct.</desc><style>#op-ecm-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-erase-1-en path,#op-ecm-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L176 176L185 154L177 132L179 89\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"128\" cy=\"115\" r=\"6\" fill=\"#b76730\" /><path d=\"M125 115L131 115\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M128 112L128 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"234\" cy=\"168\" r=\"6\" fill=\"#b76730\" /><path d=\"M231 168L237 168\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M234 165L234 171\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "ecm-erase-2-en",
                "title": "Reverse Bias: Neck Oxidizes and Dissolves",
                "caption": "Reverse bias oxidizes Ag at the bridge neck into Ag+. Released cations move toward the active electrode, now cathodic.",
                "state": "Connected or locally dissolving metal bridge",
                "stimulus": "Negative bias at the upper Ag electrode",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-erase-2-en-title op-ecm-erase-2-en-desc\" data-topic=\"ecm\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ecm-erase-2-en-title\">Reverse Bias: Neck Oxidizes and Dissolves</title><desc id=\"op-ecm-erase-2-en-desc\">Reverse bias oxidizes Ag at the bridge neck into Ag+. Released cations move toward the active electrode, now cathodic.</desc><style>#op-ecm-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-erase-2-en path,#op-ecm-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ag − / BE 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L176 176L185 154L177 132L179 89\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"130\" cy=\"120\" r=\"6\" fill=\"#b76730\" /><path d=\"M127 120L133 120\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M130 117L130 123\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"204\" cy=\"141\" r=\"6\" fill=\"#b76730\" /><path d=\"M201 141L207 141\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M204 138L204 144\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"234\" cy=\"168\" r=\"6\" fill=\"#b76730\" /><path d=\"M231 168L237 168\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M234 165L234 171\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 178L66 94\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M69.98609313929471 100.93621377156641L66 94L62.01390686070529 100.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"50\" y=\"155\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M237 174L237 104\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240.9860931392947 110.93621377156641L237 104L233.0139068607053 110.93621377156641\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M161 129H203V156H161Z\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 3\"/><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#b76730\" font-size=\"20\" >Ag → Ag+ + e−</text></svg>"
              },
              {
                "id": "ecm-erase-3-en",
                "title": "Bridge Interrupted: Residual Metal Remains",
                "caption": "A critical neck gap interrupts the metallic connection between electrodes while residual deposits can remain.",
                "state": "High-R gap with residual metal",
                "stimulus": "Negative bias at the upper Ag electrode",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-erase-3-en-title op-ecm-erase-3-en-desc\" data-topic=\"ecm\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ecm-erase-3-en-title\">Bridge Interrupted: Residual Metal Remains</title><desc id=\"op-ecm-erase-3-en-desc\">A critical neck gap interrupts the metallic connection between electrodes while residual deposits can remain.</desc><style>#op-ecm-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-erase-3-en path,#op-ecm-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ag − / BE 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L176 176L185 156M181 126L179 89\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"130\" cy=\"113\" r=\"6\" fill=\"#b76730\" /><path d=\"M127 113L133 113\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M130 110L130 116\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"195\" cy=\"132\" r=\"6\" fill=\"#b76730\" /><path d=\"M192 132L198 132\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M195 129L195 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"219\" cy=\"145\" r=\"6\" fill=\"#b76730\" /><path d=\"M216 145L222 145\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 142L219 148\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 178L66 94\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M69.98609313929471 100.93621377156641L66 94L62.01390686070529 100.93621377156641\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"50\" y=\"155\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M237 174L237 104\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240.9860931392947 110.93621377156641L237 104L233.0139068607053 110.93621377156641\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M161 129H203V156H161Z\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 3\"/><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#b76730\" font-size=\"20\" >Ag → Ag+ + e−</text></svg>"
              },
              {
                "id": "ecm-erase-4-en",
                "title": "Bias Removed: High-R Gap Retained",
                "caption": "After bias removal, the high-R gap remains. A later SET can use residual nucleation sites.",
                "state": "High-R gap with residual metal",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-erase-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-erase-4-en-title op-ecm-erase-4-en-desc\" data-topic=\"ecm\" data-operation=\"erase\" data-frame=\"4\" data-language=\"en\"><title id=\"op-ecm-erase-4-en-title\">Bias Removed: High-R Gap Retained</title><desc id=\"op-ecm-erase-4-en-desc\">After bias removal, the high-R gap remains. A later SET can use residual nucleation sites.</desc><style>#op-ecm-erase-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-erase-4-en path,#op-ecm-erase-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"93\" y=\"61\" width=\"174\" height=\"25\" fill=\"#c39a70\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"89\" width=\"174\" height=\"113\" fill=\"#ecedf5\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"93\" y=\"205\" width=\"174\" height=\"23\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"282\" y=\"81\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Ag</text><text x=\"282\" y=\"224\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >BE</text><text x=\"15\" y=\"122\" text-anchor=\"start\" fill=\"#b76730\" font-size=\"20\" >Ag+</text><path d=\"M180 202L176 176L185 156M181 126L179 89\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"11\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M180 200L160 184M181 181L197 174\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"130\" cy=\"113\" r=\"6\" fill=\"#b76730\" /><path d=\"M127 113L133 113\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M130 110L130 116\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"195\" cy=\"132\" r=\"6\" fill=\"#b76730\" /><path d=\"M192 132L198 132\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M195 129L195 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"219\" cy=\"145\" r=\"6\" fill=\"#b76730\" /><path d=\"M216 145L222 145\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 142L219 148\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"258\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ag / Ag+",
                "meaning": "Metallic silver / silver ions; distinct from VCM vacancies"
              },
              {
                "symbol": "Ag → Ag+ + e−",
                "meaning": "Oxidation at the active electrode"
              },
              {
                "symbol": "Ag+ + e− → Ag",
                "meaning": "Reduction and metal deposition near the cathode"
              },
              {
                "symbol": "Ilim",
                "meaning": "Current compliance limiting bridge thickening"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-ECM",
                "label": "Axon: Programmable Metallization Cell Patent US5761115A",
                "url": "https://patents.google.com/patent/US5761115A/en",
                "kind": "Published patent",
                "date": "1998-06-02",
                "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
                "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
              }
            ],
            "caveat": "A representative cathode-nucleated embodiment is selected; other media and kinetics can change growth direction. RESET interrupts a critical path and does not remove all metal.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ecm",
        "operationId": "read",
        "title": "ECM / CBRAM · Read",
        "summary": "Compare low-bias currents for a retained metal bridge and a local gap; latch and remove read bias with the ionic structure approximately unchanged.",
        "sources": [
          {
            "id": "EMG-P-ECM",
            "label": "Axon: Programmable Metallization Cell Patent US5761115A",
            "url": "https://patents.google.com/patent/US5761115A/en",
            "kind": "Published patent",
            "date": "1998-06-02",
            "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
            "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
          }
        ],
        "variants": [
          {
            "title": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "summary": "Compare low-bias currents for a retained metal bridge and a local gap; latch and remove read bias with the ionic structure approximately unchanged.",
            "variant": "Active Ag upper electrode / solid ion conductor / inert lower electrode",
            "frames": [
              {
                "id": "ecm-read-1-en",
                "title": "Initial: Two Possible Resistance States",
                "caption": "Left and right are the low- and high-resistance alternatives for one cell. Read bias has not yet been applied.",
                "state": "Low-R and high-R structures retained",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-read-1-en-title op-ecm-read-1-en-desc\" data-topic=\"ecm\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ecm-read-1-en-title\">Initial: Two Possible Resistance States</title><desc id=\"op-ecm-read-1-en-desc\">Left and right are the low- and high-resistance alternatives for one cell. Read bias has not yet been applied.</desc><style>#op-ecm-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-read-1-en path,#op-ecm-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M55 41L229 41\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M55 41L55 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M229 41L229 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M89 189L94 160L92 136L95 108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"96\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"96\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"89\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><path d=\"M93 205L93 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"93\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M93 234L93 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 212L82 234\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M263 189V157M269 133V108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"270\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"270\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"263\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><path d=\"M267 205L267 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"267\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M267 234L267 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 212L256 234\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Paths isolated</text></svg>"
              },
              {
                "id": "ecm-read-2-en",
                "title": "Small Bias: Compare Electronic Current",
                "caption": "Compare currents at the same small read bias, chosen to avoid appreciable ionic redistribution.",
                "state": "Electronic sensing; ionic state approximately unchanged",
                "stimulus": "Small read bias; no SET or RESET pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-read-2-en-title op-ecm-read-2-en-desc\" data-topic=\"ecm\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ecm-read-2-en-title\">Small Bias: Compare Electronic Current</title><desc id=\"op-ecm-read-2-en-desc\">Compare currents at the same small read bias, chosen to avoid appreciable ionic redistribution.</desc><style>#op-ecm-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-read-2-en path,#op-ecm-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vread</text><path d=\"M55 41L229 41\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M55 41L55 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M229 41L229 91\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M89 189L94 160L92 136L95 108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"96\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"96\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"89\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><path d=\"M42 112L42 183\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M38.01390686070529 176.06378622843357L42 183L45.98609313929471 176.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 205L93 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"93\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"93\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M93 234L93 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M93 212L93 234\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M263 189V157M269 133V108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"270\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"270\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"263\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><path d=\"M216 112L216 183\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M212.0139068607053 176.06378622843357L216 183L219.9860931392947 176.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 205L267 212\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"267\" cy=\"212\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"267\" cy=\"234\" r=\"2.5\" fill=\"#163449\" /><path d=\"M267 234L267 241\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267 212L267 234\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >ILRS &gt; IHRS</text></svg>"
              },
              {
                "id": "ecm-read-3-en",
                "title": "After Latching: Remove Bias and Retain Structure",
                "caption": "After the sense circuit latches the difference, current stops. The connected low-R path and local high-R gap remain retained.",
                "state": "Low-R and high-R structures retained",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ecm-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ecm-read-3-en-title op-ecm-read-3-en-desc\" data-topic=\"ecm\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ecm-read-3-en-title\">After Latching: Remove Bias and Retain Structure</title><desc id=\"op-ecm-read-3-en-desc\">After the sense circuit latches the difference, current stops. The connected low-R path and local high-R gap remain retained.</desc><style>#op-ecm-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ecm-read-3-en path,#op-ecm-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text><text x=\"93\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"55\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"55\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M89 189L94 160L92 136L95 108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"96\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"96\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"89\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><rect x=\"42\" y=\"219\" width=\"102\" height=\"30\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"93\" y=\"241\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I large</text><text x=\"267\" y=\"79\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><rect x=\"229\" y=\"91\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"108\" width=\"76\" height=\"81\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"229\" y=\"191\" width=\"76\" height=\"15\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M263 189V157M269 133V108\" fill=\"none\" stroke=\"#b76730\" stroke-width=\"10\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"270\" cy=\"117\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"270\" cy=\"173\" r=\"5\" fill=\"#d1a67d\" /><circle cx=\"263\" cy=\"184\" r=\"5\" fill=\"#d1a67d\" /><rect x=\"216\" y=\"219\" width=\"102\" height=\"30\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"267\" y=\"241\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I small</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Ion positions retained</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "Ag / Ag+",
                "meaning": "Metallic silver / silver ions; distinct from VCM vacancies"
              },
              {
                "symbol": "Ag → Ag+ + e−",
                "meaning": "Oxidation at the active electrode"
              },
              {
                "symbol": "Ag+ + e− → Ag",
                "meaning": "Reduction and metal deposition near the cathode"
              },
              {
                "symbol": "Ilim",
                "meaning": "Current compliance limiting bridge thickening"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-ECM",
                "label": "Axon: Programmable Metallization Cell Patent US5761115A",
                "url": "https://patents.google.com/patent/US5761115A/en",
                "kind": "Published patent",
                "date": "1998-06-02",
                "locator": "Vertical embodiment, Figures 4A/4B; metal source, cathode nucleation, and reverse-bias retraction",
                "limit": "The diagram selects an active Ag upper electrode and inert lower electrode; different kinetics can alter nucleation sites."
              }
            ],
            "caveat": "A representative cathode-nucleated embodiment is selected; other media and kinetics can change growth direction. RESET interrupts a critical path and does not remove all metal.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "pcm",
        "operationId": "write",
        "title": "Phase-Change Memory · Write / SET",
        "summary": "Heat the amorphous cap into a crystallization-favorable region below Tm, dwell for nucleation and growth, then cool into a retained crystalline low-R state.",
        "sources": [
          {
            "id": "op-pcm-ibm-thermal-2016",
            "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
            "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
            "kind": "Author-institution original paper record",
            "date": "2016-10-25",
            "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
            "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
          },
          {
            "id": "EMG-PCMDRIFT",
            "label": "IBM: Temporal Resistance Evolution in Projected PCM",
            "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
            "kind": "Author-institution original paper record",
            "date": "2020-05-19",
            "locator": "Abstract: state-dependent resistance and temporal drift",
            "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
          }
        ],
        "variants": [
          {
            "title": "Locally heated mushroom-type PCM principle cross-section",
            "summary": "Heat the amorphous cap into a crystallization-favorable region below Tm, dwell for nucleation and growth, then cool into a retained crystalline low-R state.",
            "variant": "Locally heated mushroom-type PCM principle cross-section",
            "frames": [
              {
                "id": "pcm-write-1-en",
                "title": "SET Start: Amorphous High Resistance",
                "caption": "The RESET-created amorphous cap A sits above the heater and increases cell resistance.",
                "state": "Amorphous high R",
                "stimulus": "No heating pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-write-1-en-title op-pcm-write-1-en-desc\" data-topic=\"pcm\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-pcm-write-1-en-title\">SET Start: Amorphous High Resistance</title><desc id=\"op-pcm-write-1-en-desc\">The RESET-created amorphous cap A sits above the heater and increases cell resistance.</desc><style>#op-pcm-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-write-1-en path,#op-pcm-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><path d=\"M131 134C130 95 145 81 180 82C215 81 230 95 229 134Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"145\" cy=\"116\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"160\" cy=\"101\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"174\" cy=\"122\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"187\" cy=\"97\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"201\" cy=\"118\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"216\" cy=\"105\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"198\" cy=\"133\" r=\"3\" fill=\"#667a8d\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H100L132 207H238L275 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M81 175L81 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"81\" cy=\"249\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-write-2-en",
                "title": "Heat into the Crystallization Region and Dwell",
                "caption": "SET raises the local temperature into a crystallization-favorable region below Tm and maintains sufficient dwell time.",
                "state": "Crystallization-temperature region",
                "stimulus": "SET dwell; Tx < T < Tm",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-write-2-en-title op-pcm-write-2-en-desc\" data-topic=\"pcm\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-pcm-write-2-en-title\">Heat into the Crystallization Region and Dwell</title><desc id=\"op-pcm-write-2-en-desc\">SET raises the local temperature into a crystallization-favorable region below Tm and maintains sufficient dwell time.</desc><style>#op-pcm-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-write-2-en path,#op-pcm-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" 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stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text><path d=\"M149 154L149 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M152.9860931392947 123.93621377156641L149 117L145.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M214 154L214 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M217.9860931392947 123.93621377156641L214 117L210.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H100L132 207H238L275 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M150 175L150 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"150\" cy=\"207\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-write-3-en",
                "title": "Nuclei Grow: Amorphous Volume Crystallizes",
                "caption": "Thermally activated nucleation and grain growth reduce amorphous volume, governed by material and the temperature-time history.",
                "state": "Nucleation and growth",
                "stimulus": "SET dwell; Tx < T < Tm",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-write-3-en-title op-pcm-write-3-en-desc\" data-topic=\"pcm\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-pcm-write-3-en-title\">Nuclei Grow: Amorphous Volume Crystallizes</title><desc id=\"op-pcm-write-3-en-desc\">Thermally activated nucleation and grain growth reduce amorphous volume, governed by material and the temperature-time history.</desc><style>#op-pcm-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-write-3-en path,#op-pcm-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A → C</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" 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stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"178\" y=\"98\" width=\"10\" height=\"10\" fill=\"#4a9f8e\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"202\" y=\"117\" width=\"10\" height=\"10\" fill=\"#4a9f8e\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#dc793d\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text><path d=\"M149 154L149 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M152.9860931392947 123.93621377156641L149 117L145.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M214 154L214 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M217.9860931392947 123.93621377156641L214 117L210.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H100L132 207H238L275 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M218 175L218 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"218\" cy=\"207\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-write-4-en",
                "title": "Cooled Final State: Crystalline Low Resistance",
                "caption": "Cooling leaves continuous crystalline material C and lower resistance. This thermal history differs from melt-quench RESET.",
                "state": "Crystalline low R",
                "stimulus": "No heating pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-write-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-write-4-en-title op-pcm-write-4-en-desc\" data-topic=\"pcm\" data-operation=\"write\" data-frame=\"4\" data-language=\"en\"><title id=\"op-pcm-write-4-en-title\">Cooled Final State: Crystalline Low Resistance</title><desc id=\"op-pcm-write-4-en-desc\">Cooling leaves continuous crystalline material C and lower resistance. This thermal history differs from melt-quench RESET.</desc><style>#op-pcm-write-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-write-4-en path,#op-pcm-write-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >C</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H100L132 207H238L275 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M305 175L305 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"305\" cy=\"249\" r=\"5\" fill=\"#d55c25\" /></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "A / C / L",
                "meaning": "Amorphous / crystalline / liquid"
              },
              {
                "symbol": "Tx / Tm",
                "meaning": "Crystallization-temperature region / melting point; symbolic only"
              },
              {
                "symbol": "T(t)",
                "meaning": "Local thermal history, not oscilloscope or thermometry data"
              },
              {
                "symbol": "H",
                "meaning": "Local heater contact"
              }
            ],
            "sources": [
              {
                "id": "op-pcm-ibm-thermal-2016",
                "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
                "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
                "kind": "Author-institution original paper record",
                "date": "2016-10-25",
                "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
                "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
              },
              {
                "id": "EMG-PCMDRIFT",
                "label": "IBM: Temporal Resistance Evolution in Projected PCM",
                "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
                "kind": "Author-institution original paper record",
                "date": "2020-05-19",
                "locator": "Abstract: state-dependent resistance and temporal drift",
                "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
              }
            ],
            "caveat": "Tx denotes a qualitative crystallization region and Tm the melting point; curves and geometry are not measurements. Crystallization depends on temperature, time, and material; ordinary reads require neither melting nor restore.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "pcm",
        "operationId": "erase",
        "title": "Phase-Change Memory · Reverse Rewrite / RESET",
        "summary": "A short strong pulse melts a local crystalline volume above Tm; a steep pulse fall rapidly quenches it into a retained amorphous cap and high resistance.",
        "sources": [
          {
            "id": "op-pcm-ibm-thermal-2016",
            "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
            "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
            "kind": "Author-institution original paper record",
            "date": "2016-10-25",
            "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
            "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
          },
          {
            "id": "EMG-PCMDRIFT",
            "label": "IBM: Temporal Resistance Evolution in Projected PCM",
            "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
            "kind": "Author-institution original paper record",
            "date": "2020-05-19",
            "locator": "Abstract: state-dependent resistance and temporal drift",
            "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
          }
        ],
        "variants": [
          {
            "title": "Locally heated mushroom-type PCM principle cross-section",
            "summary": "A short strong pulse melts a local crystalline volume above Tm; a steep pulse fall rapidly quenches it into a retained amorphous cap and high resistance.",
            "variant": "Locally heated mushroom-type PCM principle cross-section",
            "frames": [
              {
                "id": "pcm-erase-1-en",
                "title": "RESET Start: Crystalline Low Resistance",
                "caption": "The initial local phase-change volume is crystalline, with conduction through material above the heater.",
                "state": "Crystalline low R",
                "stimulus": "No heating pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-erase-1-en-title op-pcm-erase-1-en-desc\" data-topic=\"pcm\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-pcm-erase-1-en-title\">RESET Start: Crystalline Low Resistance</title><desc id=\"op-pcm-erase-1-en-desc\">The initial local phase-change volume is crystalline, with conduction through material above the heater.</desc><style>#op-pcm-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-erase-1-en path,#op-pcm-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >C</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H109L137 179H165L187 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M86 175L86 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"86\" cy=\"249\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-erase-2-en",
                "title": "Strong Short Pulse: Local Temperature Exceeds Melting",
                "caption": "A short strong RESET pulse produces Joule heat, taking a local volume above Tm into liquid state L.",
                "state": "Local liquid",
                "stimulus": "Short strong RESET pulse; T > Tm",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-erase-2-en-title op-pcm-erase-2-en-desc\" data-topic=\"pcm\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-pcm-erase-2-en-title\">Strong Short Pulse: Local Temperature Exceeds Melting</title><desc id=\"op-pcm-erase-2-en-desc\">A short strong RESET pulse produces Joule heat, taking a local volume above Tm into liquid state L.</desc><style>#op-pcm-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-erase-2-en path,#op-pcm-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >L</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><path d=\"M131 134C130 95 145 81 180 82C215 81 230 95 229 134Z\" fill=\"#ec9d72\" stroke=\"#d55c25\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M144 116q7 -9 14 0\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M164 99q7 -9 14 0\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M195 114q7 -9 14 0\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#dc793d\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text><path d=\"M149 154L149 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M152.9860931392947 123.93621377156641L149 117L145.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M214 154L214 117\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M217.9860931392947 123.93621377156641L214 117L210.0139068607053 123.93621377156641\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H109L137 179H165L187 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M145 175L145 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"145\" cy=\"179\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-erase-3-en",
                "title": "Rapid Cooling: Prevent Full Crystallization",
                "caption": "A steep pulse fall rapidly quenches the molten volume. Insufficient time for crystal growth produces an amorphous cap.",
                "state": "Rapid quench forming amorphous material",
                "stimulus": "Steep pulse fall; rapid quench",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-erase-3-en-title op-pcm-erase-3-en-desc\" data-topic=\"pcm\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-pcm-erase-3-en-title\">Rapid Cooling: Prevent Full Crystallization</title><desc id=\"op-pcm-erase-3-en-desc\">A steep pulse fall rapidly quenches the molten volume. Insufficient time for crystal growth produces an amorphous cap.</desc><style>#op-pcm-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-erase-3-en path,#op-pcm-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><path d=\"M131 134C130 95 145 81 180 82C215 81 230 95 229 134Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"145\" cy=\"116\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"160\" cy=\"101\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"174\" cy=\"122\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"187\" cy=\"97\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"201\" cy=\"118\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"216\" cy=\"105\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"198\" cy=\"133\" r=\"3\" fill=\"#667a8d\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H109L137 179H165L187 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M183 175L183 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"183\" cy=\"236\" r=\"5\" fill=\"#d55c25\" /></svg>"
              },
              {
                "id": "pcm-erase-4-en",
                "title": "Cooled Final State: Amorphous High Resistance",
                "caption": "The amorphous cap A interrupts the low-R crystalline path and retains high resistance after cooling; no material is removed.",
                "state": "Amorphous high R",
                "stimulus": "No heating pulse",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-erase-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-erase-4-en-title op-pcm-erase-4-en-desc\" data-topic=\"pcm\" data-operation=\"erase\" data-frame=\"4\" data-language=\"en\"><title id=\"op-pcm-erase-4-en-title\">Cooled Final State: Amorphous High Resistance</title><desc id=\"op-pcm-erase-4-en-desc\">The amorphous cap A interrupts the low-R crystalline path and retains high resistance after cooling; no material is removed.</desc><style>#op-pcm-erase-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-erase-4-en path,#op-pcm-erase-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><g transform=\"translate(0,0) scale(1,1)\"><rect x=\"88\" y=\"52\" width=\"184\" height=\"19\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"88\" y=\"74\" width=\"184\" height=\"61\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"102\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"85\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"105\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"127\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"152\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"177\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"202\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"227\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><circle cx=\"252\" cy=\"125\" r=\"3\" fill=\"#67a399\" /><path d=\"M131 134C130 95 145 81 180 82C215 81 230 95 229 134Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"145\" cy=\"116\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"160\" cy=\"101\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"174\" cy=\"122\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"187\" cy=\"97\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"201\" cy=\"118\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"216\" cy=\"105\" r=\"3\" fill=\"#667a8d\" /><circle cx=\"198\" cy=\"133\" r=\"3\" fill=\"#667a8d\" /><rect x=\"164\" y=\"135\" width=\"32\" height=\"27\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M180 162L180 174\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"70\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >TE</text><text x=\"208\" y=\"164\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >H</text></g><path d=\"M59 174L59 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 250L333 250\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M59 190L332 190\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M59 221L332 221\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"10\" y=\"196\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tm</text><text x=\"10\" y=\"227\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >Tx</text><text x=\"344\" y=\"257\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >t</text><path d=\"M61 249H109L137 179H165L187 249H329\" fill=\"none\" stroke=\"#d55c25\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M305 175L305 254\" fill=\"none\" stroke=\"#163449\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><circle cx=\"305\" cy=\"249\" r=\"5\" fill=\"#d55c25\" /></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "A / C / L",
                "meaning": "Amorphous / crystalline / liquid"
              },
              {
                "symbol": "Tx / Tm",
                "meaning": "Crystallization-temperature region / melting point; symbolic only"
              },
              {
                "symbol": "T(t)",
                "meaning": "Local thermal history, not oscilloscope or thermometry data"
              },
              {
                "symbol": "H",
                "meaning": "Local heater contact"
              }
            ],
            "sources": [
              {
                "id": "op-pcm-ibm-thermal-2016",
                "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
                "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
                "kind": "Author-institution original paper record",
                "date": "2016-10-25",
                "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
                "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
              },
              {
                "id": "EMG-PCMDRIFT",
                "label": "IBM: Temporal Resistance Evolution in Projected PCM",
                "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
                "kind": "Author-institution original paper record",
                "date": "2020-05-19",
                "locator": "Abstract: state-dependent resistance and temporal drift",
                "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
              }
            ],
            "caveat": "Tx denotes a qualitative crystallization region and Tm the melting point; curves and geometry are not measurements. Crystallization depends on temperature, time, and material; ordinary reads require neither melting nor restore.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "pcm",
        "operationId": "read",
        "title": "Phase-Change Memory · Read",
        "summary": "Compare crystalline and amorphous currents at a small read bias, then latch and remove bias while retaining phase; read temperature stays below the crystallization region.",
        "sources": [
          {
            "id": "op-pcm-ibm-thermal-2016",
            "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
            "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
            "kind": "Author-institution original paper record",
            "date": "2016-10-25",
            "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
            "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
          },
          {
            "id": "EMG-PCMDRIFT",
            "label": "IBM: Temporal Resistance Evolution in Projected PCM",
            "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
            "kind": "Author-institution original paper record",
            "date": "2020-05-19",
            "locator": "Abstract: state-dependent resistance and temporal drift",
            "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
          }
        ],
        "variants": [
          {
            "title": "Locally heated mushroom-type PCM principle cross-section",
            "summary": "Compare crystalline and amorphous currents at a small read bias, then latch and remove bias while retaining phase; read temperature stays below the crystallization region.",
            "variant": "Locally heated mushroom-type PCM principle cross-section",
            "frames": [
              {
                "id": "pcm-read-1-en",
                "title": "Initial: Crystalline and Amorphous Alternatives",
                "caption": "C and A are alternative stored states of one cell. The local amorphous cap increases resistance.",
                "state": "Crystalline and amorphous alternatives retained",
                "stimulus": "Zero bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-read-1-en-title op-pcm-read-1-en-desc\" data-topic=\"pcm\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-pcm-read-1-en-title\">Initial: Crystalline and Amorphous Alternatives</title><desc id=\"op-pcm-read-1-en-desc\">C and A are alternative stored states of one cell. The local amorphous cap increases resistance.</desc><style>#op-pcm-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-read-1-en path,#op-pcm-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><rect x=\"38\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"38\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"54\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><rect x=\"79\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"90\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >C · LRS</text><path d=\"M90 210L90 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"90\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"90\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M90 239L90 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M90 217L79 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"218\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"218\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"234\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><path d=\"M234 147C232 91 308 91 306 147Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"259\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"270\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A · HRS</text><path d=\"M270 210L270 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"270\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"270\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M270 239L270 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M270 217L259 239\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"264\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >No heating pulse</text></svg>"
              },
              {
                "id": "pcm-read-2-en",
                "title": "Low-Energy Read: Below the Crystallization Region",
                "caption": "At a small read bias, the crystalline state carries greater current. Read energy is chosen to avoid appreciable crystallization or melting.",
                "state": "Crystalline and amorphous alternatives retained",
                "stimulus": "Small read bias; Tread below Tx",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-read-2-en-title op-pcm-read-2-en-desc\" data-topic=\"pcm\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-pcm-read-2-en-title\">Low-Energy Read: Below the Crystallization Region</title><desc id=\"op-pcm-read-2-en-desc\">At a small read bias, the crystalline state carries greater current. Read energy is chosen to avoid appreciable crystallization or melting.</desc><style>#op-pcm-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-read-2-en path,#op-pcm-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vread</text><rect x=\"38\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"38\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"54\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><rect x=\"79\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"90\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >C · LRS</text><path d=\"M90 37L90 55\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M86.01390686070529 48.06378622843358L90 55L93.98609313929471 48.06378622843358\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M90 173L90 181\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M86.01390686070529 174.06378622843357L90 181L93.98609313929471 174.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M90 210L90 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"90\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"90\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M90 239L90 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M90 217L90 239\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"218\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"218\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"234\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><path d=\"M234 147C232 91 308 91 306 147Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"259\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"270\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A · HRS</text><path d=\"M270 37L270 55\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M266.0139068607053 48.06378622843358L270 55L273.9860931392947 48.06378622843358\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M270 173L270 181\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M266.0139068607053 174.06378622843357L270 181L273.9860931392947 174.06378622843357\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M270 210L270 217\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"270\" cy=\"217\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"270\" cy=\"239\" r=\"2.5\" fill=\"#163449\" /><path d=\"M270 239L270 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M270 217L270 239\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"180\" y=\"264\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Tread &lt; Tx</text></svg>"
              },
              {
                "id": "pcm-read-3-en",
                "title": "Current Latched: Original Phase Retained",
                "caption": "After latching the current difference, remove bias and retain each phase. Resistance can still drift with time, requiring sense margin.",
                "state": "Crystalline and amorphous alternatives retained",
                "stimulus": "Zero bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-pcm-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-pcm-read-3-en-title op-pcm-read-3-en-desc\" data-topic=\"pcm\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-pcm-read-3-en-title\">Current Latched: Original Phase Retained</title><desc id=\"op-pcm-read-3-en-desc\">After latching the current difference, remove bias and retain each phase. Resistance can still drift with time, requiring sense margin.</desc><style>#op-pcm-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-pcm-read-3-en path,#op-pcm-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text><rect x=\"38\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"38\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"54\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"54\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"78\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"102\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"126\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><rect x=\"79\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"90\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >C · LRS</text><rect x=\"35\" y=\"214\" width=\"110\" height=\"29\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"90\" y=\"236\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I large</text><rect x=\"218\" y=\"60\" width=\"104\" height=\"17\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"218\" y=\"80\" width=\"104\" height=\"68\" fill=\"#dce8e8\" stroke=\"#678393\" stroke-width=\"1.4\" /><circle cx=\"234\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"92\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"112\" r=\"3\" fill=\"#67a399\" /><circle cx=\"234\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"258\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"282\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><circle cx=\"306\" cy=\"132\" r=\"3\" fill=\"#67a399\" /><path d=\"M234 147C232 91 308 91 306 147Z\" fill=\"#aebcc9\" stroke=\"#678393\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"259\" y=\"149\" width=\"22\" height=\"24\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"270\" y=\"199\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A · HRS</text><rect x=\"215\" y=\"214\" width=\"110\" height=\"29\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"270\" y=\"236\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >I small</text><text x=\"180\" y=\"264\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Phases retained</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "A / C / L",
                "meaning": "Amorphous / crystalline / liquid"
              },
              {
                "symbol": "Tx / Tm",
                "meaning": "Crystallization-temperature region / melting point; symbolic only"
              },
              {
                "symbol": "T(t)",
                "meaning": "Local thermal history, not oscilloscope or thermometry data"
              },
              {
                "symbol": "H",
                "meaning": "Local heater contact"
              }
            ],
            "sources": [
              {
                "id": "op-pcm-ibm-thermal-2016",
                "label": "Bakan et al.: Temperature Distribution during PCM Crystallization",
                "url": "https://research.ibm.com/publications/extracting-the-temperature-distribution-on-a-phase-change-memory-cell-during-crystallization",
                "kind": "Author-institution original paper record",
                "date": "2016-10-25",
                "locator": "Abstract: melt-quench amorphization and temperature/time-dependent crystallization",
                "limit": "Tx, Tm, and curves are qualitative symbols; no measured product temperature or pulse duration is asserted."
              },
              {
                "id": "EMG-PCMDRIFT",
                "label": "IBM: Temporal Resistance Evolution in Projected PCM",
                "url": "https://research.ibm.com/publications/state-dependence-and-temporal-evolution-of-resistance-in-projected-phase-change-memory",
                "kind": "Author-institution original paper record",
                "date": "2020-05-19",
                "locator": "Abstract: state-dependent resistance and temporal drift",
                "limit": "Supports the read-drift caveat only; a projection branch is not drawn as mandatory for general PCM."
              }
            ],
            "caveat": "Tx denotes a qualitative crystallization region and Tm the melting point; curves and geometry are not measurements. Crystallization depends on temperature, time, and material; ordinary reads require neither melting nor restore.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "feram",
        "operationId": "write",
        "title": "Capacitor FeRAM · Write P↑",
        "summary": "Enable WL and raise PL above BL to switch domains with an upward field; remove capacitor bias and isolate the cell to retain P↑.",
        "sources": [
          {
            "id": "EMG-P-FERAM",
            "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
            "url": "https://patents.google.com/patent/US4873664A/en",
            "kind": "Published patent",
            "date": "1989-10-10",
            "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
            "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
          }
        ],
        "variants": [
          {
            "title": "1T1C: A PL-above-BL pulse writes P↑",
            "summary": "Enable WL and raise PL above BL to switch domains with an upward field; remove capacitor bias and isolate the cell to retain P↑.",
            "variant": "1T1C: A PL-above-BL pulse writes P↑",
            "frames": [
              {
                "id": "feram-write-1-en",
                "title": "Initial: Opposite Remanent Polarization",
                "caption": "The starting remanent polarization represents opposite data, with no voltage across the capacitor.",
                "state": "Remanent polarization retained",
                "stimulus": "Capacitor terminals equipotential; WL=0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-write-1-en-title op-feram-write-1-en-desc\" data-topic=\"feram\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-feram-write-1-en-title\">Initial: Opposite Remanent Polarization</title><desc id=\"op-feram-write-1-en-desc\">The starting remanent polarization represents opposite data, with no voltage across the capacitor.</desc><style>#op-feram-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-write-1-en path,#op-feram-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L159 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M150 136L150 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.0139068607053 155.06378622843357L150 162L153.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 136L170 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M166.0139068607053 155.06378622843357L170 162L173.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 136L190 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M186.0139068607053 155.06378622843357L190 162L193.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↓</text></svg>"
              },
              {
                "id": "feram-write-2-en",
                "title": "Apply a Capacitor Pulse: Domains Switch",
                "caption": "Enable access and set PL above BL. A pulse meeting the effective switching condition drives domains upward.",
                "state": "Domains switching",
                "stimulus": "BL=0; PL=V; WL=1",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-write-2-en-title op-feram-write-2-en-desc\" data-topic=\"feram\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-feram-write-2-en-title\">Apply a Capacitor Pulse: Domains Switch</title><desc id=\"op-feram-write-2-en-desc\">Enable access and set PL above BL. A pulse meeting the effective switching condition drives domains upward.</desc><style>#op-feram-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-write-2-en path,#op-feram-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 1</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L170 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL V</text><path d=\"M150 162L150 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.9860931392947 142.93621377156643L150 136L146.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 136L170 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M166.0139068607053 155.06378622843357L170 162L173.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 162L190 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M193.9860931392947 142.93621377156643L190 136L186.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M216 170L216 128\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219.9860931392947 134.93621377156643L216 128L212.0139068607053 134.93621377156643\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"223\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Domains switching</text></svg>"
              },
              {
                "id": "feram-write-3-en",
                "title": "Remove the Field: Target Polarization Retained",
                "caption": "Remove capacitor voltage and isolate the cell. Remanent polarization is retained; opposite data is directly rewritten without a block erase.",
                "state": "Remanent polarization retained",
                "stimulus": "Capacitor terminals equipotential; WL=0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-write-3-en-title op-feram-write-3-en-desc\" data-topic=\"feram\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-feram-write-3-en-title\">Remove the Field: Target Polarization Retained</title><desc id=\"op-feram-write-3-en-desc\">Remove capacitor voltage and isolate the cell. Remanent polarization is retained; opposite data is directly rewritten without a block erase.</desc><style>#op-feram-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-write-3-en path,#op-feram-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L159 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M150 162L150 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.9860931392947 142.93621377156643L150 136L146.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 162L170 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M173.9860931392947 142.93621377156643L170 136L166.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 162L190 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M193.9860931392947 142.93621377156643L190 136L186.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↑</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "WL / BL / PL",
                "meaning": "Word line / bit line / capacitor plate line"
              },
              {
                "symbol": "P↑ / P↓",
                "meaning": "Two remanent polarization directions; no universal 0/1 mapping"
              },
              {
                "symbol": "Qns / Qsw",
                "meaning": "Non-switching background charge / additional switching charge"
              },
              {
                "symbol": "SA",
                "meaning": "Sense/restore amplifier, compared with an external reference"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-FERAM",
                "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
                "url": "https://patents.google.com/patent/US4873664A/en",
                "kind": "Published patent",
                "date": "1989-10-10",
                "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
                "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
              }
            ],
            "caveat": "P↑/P↓ have no fixed 0/1 mapping. Field direction follows the relative PL/BL voltage; choose actual pulses for the ferroelectric material, stack, and effective switching condition. Opposite data is directly rewritten without block erase.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "feram",
        "operationId": "erase",
        "title": "Capacitor FeRAM · Reverse Rewrite P↓",
        "summary": "Enable WL and raise BL above PL so a downward field rewrites P↑ as P↓; remove bias and isolate the cell to retain the opposite data.",
        "sources": [
          {
            "id": "EMG-P-FERAM",
            "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
            "url": "https://patents.google.com/patent/US4873664A/en",
            "kind": "Published patent",
            "date": "1989-10-10",
            "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
            "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
          }
        ],
        "variants": [
          {
            "title": "1T1C: A BL-above-PL pulse rewrites P↓",
            "summary": "Enable WL and raise BL above PL so a downward field rewrites P↑ as P↓; remove bias and isolate the cell to retain the opposite data.",
            "variant": "1T1C: A BL-above-PL pulse rewrites P↓",
            "frames": [
              {
                "id": "feram-erase-1-en",
                "title": "Initial: Opposite Remanent Polarization",
                "caption": "The starting remanent polarization represents opposite data, with no voltage across the capacitor.",
                "state": "Remanent polarization retained",
                "stimulus": "Capacitor terminals equipotential; WL=0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-erase-1-en-title op-feram-erase-1-en-desc\" data-topic=\"feram\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-feram-erase-1-en-title\">Initial: Opposite Remanent Polarization</title><desc id=\"op-feram-erase-1-en-desc\">The starting remanent polarization represents opposite data, with no voltage across the capacitor.</desc><style>#op-feram-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-erase-1-en path,#op-feram-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L159 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M150 162L150 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.9860931392947 142.93621377156643L150 136L146.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 162L170 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M173.9860931392947 142.93621377156643L170 136L166.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 162L190 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M193.9860931392947 142.93621377156643L190 136L186.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↑</text></svg>"
              },
              {
                "id": "feram-erase-2-en",
                "title": "Apply a Capacitor Pulse: Domains Switch",
                "caption": "Enable access and set BL above PL. A pulse meeting the effective switching condition drives domains downward.",
                "state": "Domains switching",
                "stimulus": "BL=V; PL=0; WL=1",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-erase-2-en-title op-feram-erase-2-en-desc\" data-topic=\"feram\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-feram-erase-2-en-title\">Apply a Capacitor Pulse: Domains Switch</title><desc id=\"op-feram-erase-2-en-desc\">Enable access and set BL above PL. A pulse meeting the effective switching condition drives domains downward.</desc><style>#op-feram-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-erase-2-en path,#op-feram-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 1</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL V</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L170 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M150 136L150 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.0139068607053 155.06378622843357L150 162L153.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 162L170 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M173.9860931392947 142.93621377156643L170 136L166.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 136L190 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M186.0139068607053 155.06378622843357L190 162L193.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M216 128L216 170\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M212.0139068607053 163.06378622843357L216 170L219.9860931392947 163.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"223\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Domains switching</text></svg>"
              },
              {
                "id": "feram-erase-3-en",
                "title": "Remove the Field: Target Polarization Retained",
                "caption": "Remove capacitor voltage and isolate the cell. Remanent polarization is retained; opposite data is directly rewritten without a block erase.",
                "state": "Remanent polarization retained",
                "stimulus": "Capacitor terminals equipotential; WL=0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-erase-3-en-title op-feram-erase-3-en-desc\" data-topic=\"feram\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-feram-erase-3-en-title\">Remove the Field: Target Polarization Retained</title><desc id=\"op-feram-erase-3-en-desc\">Remove capacitor voltage and isolate the cell. Remanent polarization is retained; opposite data is directly rewritten without a block erase.</desc><style>#op-feram-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-erase-3-en path,#op-feram-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"180\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"170\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M170 64L170 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 70L170 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"170\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"170\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M170 99L170 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 77L159 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 106L170 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M138 122L202 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"138\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M138 176L202 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 177L170 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M150 136L150 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.0139068607053 155.06378622843357L150 162L153.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M170 136L170 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M166.0139068607053 155.06378622843357L170 162L173.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M190 136L190 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M186.0139068607053 155.06378622843357L190 162L193.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"170\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↓</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "WL / BL / PL",
                "meaning": "Word line / bit line / capacitor plate line"
              },
              {
                "symbol": "P↑ / P↓",
                "meaning": "Two remanent polarization directions; no universal 0/1 mapping"
              },
              {
                "symbol": "Qns / Qsw",
                "meaning": "Non-switching background charge / additional switching charge"
              },
              {
                "symbol": "SA",
                "meaning": "Sense/restore amplifier, compared with an external reference"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-FERAM",
                "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
                "url": "https://patents.google.com/patent/US4873664A/en",
                "kind": "Published patent",
                "date": "1989-10-10",
                "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
                "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
              }
            ],
            "caveat": "This reverse operation directly rewrites polarization, without block erase. P↑/P↓ have no fixed 0/1 mapping; choose actual pulses for the ferroelectric material, stack, and effective switching condition.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "feram",
        "operationId": "read",
        "title": "Capacitor FeRAM · Read and Restore",
        "summary": "Distinguish switching and non-switching charge, latch the read value, then restore polarization as PL falls while WL stays enabled.",
        "sources": [
          {
            "id": "EMG-P-FERAM",
            "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
            "url": "https://patents.google.com/patent/US4873664A/en",
            "kind": "Published patent",
            "date": "1989-10-10",
            "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
            "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
          }
        ],
        "variants": [
          {
            "title": "1T1C with external reference: two alternative initial-state branches",
            "summary": "Distinguish switching and non-switching charge, latch the read value, then restore polarization as PL falls while WL stays enabled.",
            "variant": "1T1C with external reference: two alternative initial-state branches",
            "frames": [
              {
                "id": "feram-read-1-en",
                "title": "Before Read: Two Possible Remanent Polarizations",
                "caption": "A and B represent two possible initial states of one 1T1C cell: P↑ or P↓. BL and PL are zero and WL is off.",
                "state": "Two original polarization alternatives",
                "stimulus": "BL=PL=0; WL=0",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-read-1-en-title op-feram-read-1-en-desc\" data-topic=\"feram\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-feram-read-1-en-title\">Before Read: Two Possible Remanent Polarizations</title><desc id=\"op-feram-read-1-en-desc\">A and B represent two possible initial states of one 1T1C cell: P↑ or P↓. BL and PL are zero and WL is off.</desc><style>#op-feram-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-read-1-en path,#op-feram-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"82\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><text x=\"251\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >B</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"82\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M82 64L82 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 70L82 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"82\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"82\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M82 99L82 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 77L71 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 106L82 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 122L114 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"50\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M50 176L114 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 177L82 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M62 162L62 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65.98609313929471 142.93621377156643L62 136L58.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 162L82 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M85.98609313929471 142.93621377156643L82 136L78.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M102 162L102 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.98609313929471 142.93621377156643L102 136L98.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M251 64L251 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 70L251 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"251\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"251\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M251 99L251 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 77L240 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 106L251 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 122L283 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"219\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M219 176L283 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 177L251 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M231 136L231 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227.0139068607053 155.06378622843357L231 162L234.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 136L251 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M247.0139068607053 155.06378622843357L251 162L254.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M271 136L271 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.0139068607053 155.06378622843357L271 162L274.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>"
              },
              {
                "id": "feram-read-2-en",
                "title": "PL Rises: Separate Switching and Non-Switching Charge",
                "caption": "Enable WL and raise PL to create an upward field. A contributes Qns without switching; B switches and adds Qsw, creating distinct BL signals.",
                "state": "B switches; unequal charge signals",
                "stimulus": "PL rises to V; WL=1",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-read-2-en-title op-feram-read-2-en-desc\" data-topic=\"feram\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-feram-read-2-en-title\">PL Rises: Separate Switching and Non-Switching Charge</title><desc id=\"op-feram-read-2-en-desc\">Enable WL and raise PL to create an upward field. A contributes Qns without switching; B switches and adds Qsw, creating distinct BL signals.</desc><style>#op-feram-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-read-2-en path,#op-feram-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"82\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><text x=\"251\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >B</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 1</text><text x=\"82\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL δA</text><path d=\"M82 64L82 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 70L82 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"82\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"82\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M82 99L82 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 77L82 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 106L82 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 122L114 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"50\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M50 176L114 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 177L82 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL V</text><path d=\"M62 162L62 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65.98609313929471 142.93621377156643L62 136L58.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 162L82 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M85.98609313929471 142.93621377156643L82 136L78.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M102 162L102 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.98609313929471 142.93621377156643L102 136L98.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M128 170L128 128\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M131.9860931392947 134.93621377156643L128 128L124.01390686070529 134.93621377156643\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"135\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"82\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Qns</text><text x=\"251\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL δB</text><path d=\"M251 64L251 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 70L251 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"251\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"251\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M251 99L251 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 77L251 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 106L251 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 122L283 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"219\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M219 176L283 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 177L251 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL V</text><path d=\"M231 162L231 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M234.9860931392947 142.93621377156643L231 136L227.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 162L251 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254.9860931392947 142.93621377156643L251 136L247.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M271 162L271 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M274.9860931392947 142.93621377156643L271 136L267.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M297 170L297 128\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M300.9860931392947 134.93621377156643L297 128L293.0139068607053 134.93621377156643\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"304\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"251\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Qns+Qsw</text></svg>"
              },
              {
                "id": "feram-read-3-en",
                "title": "Sense and Latch: Preserve the Original Data Decision",
                "caption": "The sense amplifier compares against an external reference and latches. In this convention A drives BL to zero and B to V; both presently have P↑.",
                "state": "Original data latched; B requires restore",
                "stimulus": "SA drives BL; PL=V; WL=1",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-read-3-en-title op-feram-read-3-en-desc\" data-topic=\"feram\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-feram-read-3-en-title\">Sense and Latch: Preserve the Original Data Decision</title><desc id=\"op-feram-read-3-en-desc\">The sense amplifier compares against an external reference and latches. In this convention A drives BL to zero and B to V; both presently have P↑.</desc><style>#op-feram-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-read-3-en path,#op-feram-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"82\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><text x=\"251\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >B</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 1</text><text x=\"82\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M82 64L82 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 70L82 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"82\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"82\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M82 99L82 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 77L82 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 106L82 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 122L114 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"50\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M50 176L114 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 177L82 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL V</text><path d=\"M62 162L62 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65.98609313929471 142.93621377156643L62 136L58.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 162L82 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M85.98609313929471 142.93621377156643L82 136L78.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M102 162L102 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.98609313929471 142.93621377156643L102 136L98.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M128 170L128 128\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M131.9860931392947 134.93621377156643L128 128L124.01390686070529 134.93621377156643\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"135\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"82\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >SA: A</text><text x=\"251\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL V</text><path d=\"M251 64L251 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 70L251 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"251\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"251\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M251 99L251 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 77L251 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 106L251 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 122L283 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"219\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M219 176L283 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 177L251 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL V</text><path d=\"M231 162L231 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M234.9860931392947 142.93621377156643L231 136L227.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 162L251 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254.9860931392947 142.93621377156643L251 136L247.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M271 162L271 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M274.9860931392947 142.93621377156643L271 136L267.0139068607053 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >SA: B</text><rect x=\"118\" y=\"1\" width=\"124\" height=\"32\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"180\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA ↔ REF</text></svg>"
              },
              {
                "id": "feram-read-4-en",
                "title": "PL Falls with WL Enabled: Restore B",
                "caption": "Keep WL enabled while PL falls to zero. A sees no reverse field; B retains BL at V, creating a downward field that restores its original P↓.",
                "state": "B restores under downward field",
                "stimulus": "PL falls to zero; WL=1",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-read-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-read-4-en-title op-feram-read-4-en-desc\" data-topic=\"feram\" data-operation=\"read\" data-frame=\"4\" data-language=\"en\"><title id=\"op-feram-read-4-en-title\">PL Falls with WL Enabled: Restore B</title><desc id=\"op-feram-read-4-en-desc\">Keep WL enabled while PL falls to zero. A sees no reverse field; B retains BL at V, creating a downward field that restores its original P↓.</desc><style>#op-feram-read-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-read-4-en path,#op-feram-read-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"82\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><text x=\"251\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >B</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 1</text><text x=\"82\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M82 64L82 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 70L82 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"82\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"82\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M82 99L82 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 77L82 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 106L82 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 122L114 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"50\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M50 176L114 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 177L82 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M62 162L62 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65.98609313929471 142.93621377156643L62 136L58.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 162L82 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M85.98609313929471 142.93621377156643L82 136L78.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M102 162L102 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.98609313929471 142.93621377156643L102 136L98.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL V</text><path d=\"M251 64L251 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 70L251 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"251\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"251\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M251 99L251 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 77L251 99\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 106L251 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 122L283 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"219\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M219 176L283 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 177L251 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M231 136L231 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227.0139068607053 155.06378622843357L231 162L234.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 136L251 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M247.0139068607053 155.06378622843357L251 162L254.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M271 136L271 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.0139068607053 155.06378622843357L271 162L274.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M297 128L297 170\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M293.0139068607053 163.06378622843357L297 170L300.9860931392947 163.06378622843357\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"304\" y=\"156\" text-anchor=\"start\" fill=\"#b96521\" font-size=\"20\" >E</text><text x=\"251\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↓</text><path d=\"M222 142C213 132 228 121 240 132\" fill=\"none\" stroke=\"#836197\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M232.2767627171294 129.91394969560233L240 132L237.91394969560233 124.2767627171294\" fill=\"none\" stroke=\"#836197\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>"
              },
              {
                "id": "feram-read-5-en",
                "title": "Isolate and Precharge: Original Polarization Retained",
                "caption": "After restore, turn WL off and precharge BL to zero. A and B retain their respective pre-read polarization; sensing plus restore completes the read.",
                "state": "Both original polarizations retained",
                "stimulus": "WL=0, then BL precharge",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-feram-read-5-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-feram-read-5-en-title op-feram-read-5-en-desc\" data-topic=\"feram\" data-operation=\"read\" data-frame=\"5\" data-language=\"en\"><title id=\"op-feram-read-5-en-title\">Isolate and Precharge: Original Polarization Retained</title><desc id=\"op-feram-read-5-en-desc\">After restore, turn WL off and precharge BL to zero. A and B retain their respective pre-read polarization; sensing plus restore completes the read.</desc><style>#op-feram-read-5-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-feram-read-5-en path,#op-feram-read-5-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"82\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >A</text><text x=\"251\" y=\"27\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >B</text><text x=\"180\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >WL 0</text><text x=\"82\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M82 64L82 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 70L82 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"82\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"82\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M82 99L82 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 77L71 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 106L82 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 122L114 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"50\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M50 176L114 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 177L82 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M62 162L62 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M65.98609313929471 142.93621377156643L62 136L58.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M82 162L82 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M85.98609313929471 142.93621377156643L82 136L78.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M102 162L102 136\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M105.98609313929471 142.93621377156643L102 136L98.01390686070529 142.93621377156643\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"82\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↑</text><text x=\"251\" y=\"56\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BL 0</text><path d=\"M251 64L251 70\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 70L251 77\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"251\" cy=\"77\" r=\"2.5\" fill=\"#163449\" /><circle cx=\"251\" cy=\"99\" r=\"2.5\" fill=\"#163449\" /><path d=\"M251 99L251 106\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 77L240 99\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 106L251 121\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M219 122L283 122\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"219\" y=\"127\" width=\"64\" height=\"44\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M219 176L283 176\" fill=\"none\" stroke=\"#829dad\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 177L251 193\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"219\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >PL 0</text><path d=\"M231 136L231 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M227.0139068607053 155.06378622843357L231 162L234.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M251 136L251 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M247.0139068607053 155.06378622843357L251 162L254.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M271 136L271 162\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M267.0139068607053 155.06378622843357L271 162L274.9860931392947 155.06378622843357\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"251\" y=\"247\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >P↓</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "WL / BL / PL",
                "meaning": "Word line / bit line / capacitor plate line"
              },
              {
                "symbol": "P↑ / P↓",
                "meaning": "Two remanent polarization directions; no universal 0/1 mapping"
              },
              {
                "symbol": "Qns / Qsw",
                "meaning": "Non-switching background charge / additional switching charge"
              },
              {
                "symbol": "SA",
                "meaning": "Sense/restore amplifier, compared with an external reference"
              }
            ],
            "sources": [
              {
                "id": "EMG-P-FERAM",
                "label": "Ramtron: Self-Restoring Ferroelectric Memory Patent US4873664A",
                "url": "https://patents.google.com/patent/US4873664A/en",
                "kind": "Published patent",
                "date": "1989-10-10",
                "locator": "Figure 3: 1T1C and reference branch; Figures 1/3 and read, latch, plate-line fall, and restore description",
                "limit": "The two drawn branches are alternative initial states of one cell, not a merged circuit from Figures 3 and 4."
              }
            ],
            "caveat": "A/B are alternative initial states of one cell, not two additional physical cells. PL rises during the illustrated read. Qsw is the polarization-switching component after dielectric/parasitic contributions, ideally about 2PrA.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "fefet",
        "operationId": "write",
        "title": "FeFET · Write / SET",
        "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
        "sources": [
          {
            "id": "EMG-KIOXIA",
            "label": "KIOXIA: FeFET Trapping and Polarization Stability",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
            "kind": "Manufacturer original research description",
            "date": "2024-04-09",
            "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
            "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
          }
        ],
        "variants": [
          {
            "title": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
            "variant": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "frames": [
              {
                "id": "fefet-write-1-en",
                "title": "Initial: Opposite Polarization and Threshold",
                "caption": "Initial P points away from the channel, corresponding to higher n-channel Vt.",
                "state": "Remanent polarization and Vt retained",
                "stimulus": "Read/write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-write-1-en-title op-fefet-write-1-en-desc\" data-topic=\"fefet\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-fefet-write-1-en-title\">Initial: Opposite Polarization and Threshold</title><desc id=\"op-fefet-write-1-en-desc\">Initial P points away from the channel, corresponding to higher n-channel Vt.</desc><style>#op-fefet-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-fefet-write-1-en path,#op-fefet-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"181\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >G = 0</text><path d=\"M180 33L180 43\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"113\" y=\"43\" width=\"134\" height=\"21\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"113\" y=\"67\" width=\"134\" height=\"40\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"113\" y=\"110\" width=\"134\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"64\" y=\"123\" width=\"232\" height=\"53\" fill=\"#dfe9f0\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M129 99.5L129 74.5\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M132.9860931392947 81.43621377156641L129 74.5L125.01390686070529 81.43621377156641\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M163 99.5L163 74.5\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M166.9860931392947 81.43621377156641L163 74.5L159.0139068607053 81.43621377156641\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M197 99.5L197 74.5\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M200.9860931392947 81.43621377156641L197 74.5L193.0139068607053 81.43621377156641\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 99.5L231 74.5\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M234.9860931392947 81.43621377156641L231 74.5L227.0139068607053 81.43621377156641\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"128\" cy=\"118\" r=\"6\" fill=\"#836197\" /><path d=\"M125 118L131 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"154\" cy=\"118\" r=\"6\" fill=\"#836197\" /><path d=\"M151 118L157 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"180\" cy=\"118\" r=\"6\" fill=\"#836197\" /><path d=\"M177 118L183 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"206\" cy=\"118\" r=\"6\" fill=\"#836197\" /><path d=\"M203 118L209 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"232\" cy=\"118\" r=\"6\" fill=\"#836197\" /><path d=\"M229 118L235 118\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"64\" y=\"123\" width=\"42\" height=\"28\" fill=\"#97b9ce\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"254\" y=\"123\" width=\"42\" height=\"28\" fill=\"#97b9ce\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"82\" y=\"118\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >S</text><text x=\"279\" y=\"118\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >D</text><text x=\"258\" y=\"62\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >G</text><text x=\"258\" y=\"94\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >FE</text><text x=\"180\" y=\"169\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >p-Si</text><path d=\"M62 260L62 190\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62 259L317 259\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"41\" y=\"205\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#a7c3c4\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              },
              {
                "id": "fefet-write-2-en",
                "title": "Gate Pulse: Polarization and Bound Charge Change",
                "caption": "The selected gate pulse drives P toward the channel, creating positive channel-side bound charge and lowering Vt.",
                "state": "Polarization switching and Vt shift",
                "stimulus": "Gate write pulse relative to the channel",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-write-2-en-title op-fefet-write-2-en-desc\" data-topic=\"fefet\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-fefet-write-2-en-title\">Gate Pulse: Polarization and Bound Charge Change</title><desc id=\"op-fefet-write-2-en-desc\">The selected gate pulse drives P toward the channel, creating positive channel-side bound charge and lowering Vt.</desc><style>#op-fefet-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-fefet-write-2-en path,#op-fefet-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"181\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >G +</text><path d=\"M180 33L180 43\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" 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x=\"258\" y=\"94\" text-anchor=\"start\" fill=\"#163449\" font-size=\"20\" >FE</text><text x=\"180\" y=\"169\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >p-Si</text><circle cx=\"124\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M121 135L127 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"149\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M146 135L152 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"176\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M173 135L179 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"203\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M200 135L206 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"232\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M229 135L235 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M44 65L44 113\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M40.01390686070529 106.06378622843359L44 113L47.98609313929471 106.06378622843359\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"29\" y=\"96\" text-anchor=\"end\" fill=\"#b96521\" font-size=\"20\" >E</text><path d=\"M62 260L62 190\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62 259L317 259\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"41\" y=\"205\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#b7bed0\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              },
              {
                "id": "fefet-write-3-en",
                "title": "Remanent Polarization: New Threshold Retained",
                "caption": "After the pulse, remanent polarization retains the Vt shift. Opposite data is directly rewritten; not every trap-related Vt shift is assigned to polarization.",
                "state": "Remanent polarization and Vt retained",
                "stimulus": "Read/write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-write-3-en-title op-fefet-write-3-en-desc\" data-topic=\"fefet\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-fefet-write-3-en-title\">Remanent Polarization: New Threshold Retained</title><desc id=\"op-fefet-write-3-en-desc\">After the pulse, remanent polarization retains the Vt shift. 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/><text x=\"41\" y=\"205\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#b7bed0\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P",
                "meaning": "Ferroelectric polarization vector"
              },
              {
                "symbol": "Vt,L / Vt,H",
                "meaning": "Low / high threshold voltage"
              },
              {
                "symbol": "Vg,r",
                "meaning": "Read gate voltage between the two thresholds"
              },
              {
                "symbol": "S / D / G",
                "meaning": "Source / drain / gate; read current flows in the channel"
              }
            ],
            "sources": [
              {
                "id": "EMG-KIOXIA",
                "label": "KIOXIA: FeFET Trapping and Polarization Stability",
                "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
                "kind": "Manufacturer original research description",
                "date": "2024-04-09",
                "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
                "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
              }
            ],
            "caveat": "Here P toward the channel creates positive bound charge and lowers n-channel Vt; verify pulse polarity for the actual stack. Trapped charge also shifts Vt, so hysteresis is not attributed solely to polarization.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "fefet",
        "operationId": "erase",
        "title": "FeFET · Reverse Rewrite / RESET",
        "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
        "sources": [
          {
            "id": "EMG-KIOXIA",
            "label": "KIOXIA: FeFET Trapping and Polarization Stability",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
            "kind": "Manufacturer original research description",
            "date": "2024-04-09",
            "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
            "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
          }
        ],
        "variants": [
          {
            "title": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
            "variant": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "frames": [
              {
                "id": "fefet-erase-1-en",
                "title": "Initial: Opposite Polarization and Threshold",
                "caption": "Initial P points toward the channel, corresponding to lower n-channel Vt.",
                "state": "Remanent polarization and Vt retained",
                "stimulus": "Read/write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-erase-1-en-title op-fefet-erase-1-en-desc\" data-topic=\"fefet\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-fefet-erase-1-en-title\">Initial: Opposite Polarization and Threshold</title><desc id=\"op-fefet-erase-1-en-desc\">Initial P points toward the channel, corresponding to lower n-channel Vt.</desc><style>#op-fefet-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-fefet-erase-1-en path,#op-fefet-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"181\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >G = 0</text><path d=\"M180 33L180 43\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect 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y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              },
              {
                "id": "fefet-erase-2-en",
                "title": "Gate Pulse: Polarization and Bound Charge Change",
                "caption": "The selected gate pulse drives P away from the channel, creating negative channel-side bound charge and raising Vt.",
                "state": "Polarization switching and Vt shift",
                "stimulus": "Gate write pulse relative to the channel",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-erase-2-en-title op-fefet-erase-2-en-desc\" data-topic=\"fefet\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-fefet-erase-2-en-title\">Gate Pulse: Polarization and Bound Charge Change</title><desc id=\"op-fefet-erase-2-en-desc\">The selected gate pulse drives P away from the channel, creating negative channel-side bound charge and raising Vt.</desc><style>#op-fefet-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-fefet-erase-2-en path,#op-fefet-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"181\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >G −</text><path d=\"M180 33L180 43\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" 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stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62 259L317 259\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"41\" y=\"205\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#a7c3c4\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              },
              {
                "id": "fefet-erase-3-en",
                "title": "Remanent Polarization: New Threshold Retained",
                "caption": "After the pulse, remanent polarization retains the Vt shift. Opposite data is directly rewritten; not every trap-related Vt shift is assigned to polarization.",
                "state": "Remanent polarization and Vt retained",
                "stimulus": "Read/write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-erase-3-en-title op-fefet-erase-3-en-desc\" data-topic=\"fefet\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-fefet-erase-3-en-title\">Remanent Polarization: New Threshold Retained</title><desc id=\"op-fefet-erase-3-en-desc\">After the pulse, remanent polarization retains the Vt shift. Opposite data is directly rewritten; not every trap-related Vt shift is assigned to polarization.</desc><style>#op-fefet-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-fefet-erase-3-en path,#op-fefet-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"181\" y=\"25\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >G = 0</text><path d=\"M180 33L180 43\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"113\" y=\"43\" width=\"134\" height=\"21\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"113\" y=\"67\" width=\"134\" height=\"40\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"113\" y=\"110\" width=\"134\" height=\"10\" fill=\"#e7eff4\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"64\" y=\"123\" width=\"232\" height=\"53\" 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fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P",
                "meaning": "Ferroelectric polarization vector"
              },
              {
                "symbol": "Vt,L / Vt,H",
                "meaning": "Low / high threshold voltage"
              },
              {
                "symbol": "Vg,r",
                "meaning": "Read gate voltage between the two thresholds"
              },
              {
                "symbol": "S / D / G",
                "meaning": "Source / drain / gate; read current flows in the channel"
              }
            ],
            "sources": [
              {
                "id": "EMG-KIOXIA",
                "label": "KIOXIA: FeFET Trapping and Polarization Stability",
                "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
                "kind": "Manufacturer original research description",
                "date": "2024-04-09",
                "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
                "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
              }
            ],
            "caveat": "Here P toward the channel creates positive bound charge and lowers n-channel Vt; verify pulse polarity for the actual stack. Trapped charge also shifts Vt, so hysteresis is not attributed solely to polarization.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "fefet",
        "operationId": "read",
        "title": "FeFET · Read",
        "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
        "sources": [
          {
            "id": "EMG-KIOXIA",
            "label": "KIOXIA: FeFET Trapping and Polarization Stability",
            "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
            "kind": "Manufacturer original research description",
            "date": "2024-04-09",
            "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
            "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
          }
        ],
        "variants": [
          {
            "title": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "summary": "Polarization changes channel-side bound charge and threshold voltage; sense channel current between the two Vt distributions.",
            "variant": "Simplified n-channel MFIS: gate / ferroelectric / interface layer / silicon",
            "frames": [
              {
                "id": "fefet-read-1-en",
                "title": "Before Read: Polarization Sets a Threshold Window",
                "caption": "The illustrated low-Vt state has polarization toward silicon and positive bound charge favoring an n-channel. The alternative high-Vt curve is also shown below.",
                "state": "Polarization and two-state Vt window",
                "stimulus": "Read/write bias removed",
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>Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#b7bed0\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text></svg>"
              },
              {
                "id": "fefet-read-2-en",
                "title": "Sense: Gate Bias between Two Thresholds",
                "caption": "Use a small drain bias and Vg,r between Vt,L and Vt,H. Low Vt gives larger Id and high Vt smaller Id, flowing through the source-drain channel.",
                "state": "Polarization and two-state Vt window",
                "stimulus": "Small Vd; Vt,L < Vg,r < Vt,H",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-read-2-en-title op-fefet-read-2-en-desc\" data-topic=\"fefet\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-fefet-read-2-en-title\">Sense: Gate Bias between Two Thresholds</title><desc id=\"op-fefet-read-2-en-desc\">Use a small drain bias and Vg,r between Vt,L and Vt,H. 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              },
              {
                "id": "fefet-read-3-en",
                "title": "Remove Read Bias: Polarization Remains",
                "caption": "Remove read bias after latching the decision. Polarization and the Vt window remain; actual read bias must control disturbance.",
                "state": "Polarization and two-state Vt window",
                "stimulus": "Read/write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-fefet-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-fefet-read-3-en-title op-fefet-read-3-en-desc\" data-topic=\"fefet\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-fefet-read-3-en-title\">Remove Read Bias: Polarization Remains</title><desc id=\"op-fefet-read-3-en-desc\">Remove read bias after latching the decision. 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135L152 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"176\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M173 135L179 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"203\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M200 135L206 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"232\" cy=\"135\" r=\"6\" fill=\"#196daf\" /><path d=\"M229 135L235 135\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62 260L62 190\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M62 259L317 259\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"41\" y=\"205\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Id</text><text x=\"337\" y=\"265\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vg</text><path d=\"M66 254H109C133 254 136 218 162 201Q177 190 192 190H313\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M66 255H214C239 255 232 225 278 197H313\" fill=\"none\" stroke=\"#b7bed0\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"137\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,L</text><text x=\"269\" y=\"240\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Vt,H</text><rect x=\"26\" y=\"57\" width=\"67\" height=\"31\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"60\" y=\"80\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P",
                "meaning": "Ferroelectric polarization vector"
              },
              {
                "symbol": "Vt,L / Vt,H",
                "meaning": "Low / high threshold voltage"
              },
              {
                "symbol": "Vg,r",
                "meaning": "Read gate voltage between the two thresholds"
              },
              {
                "symbol": "S / D / G",
                "meaning": "Source / drain / gate; read current flows in the channel"
              }
            ],
            "sources": [
              {
                "id": "EMG-KIOXIA",
                "label": "KIOXIA: FeFET Trapping and Polarization Stability",
                "url": "https://www.kioxia.com/en-jp/rd/technology/topics/topics-67.html",
                "kind": "Manufacturer original research description",
                "date": "2024-04-09",
                "locator": "Figures 1–3, IEDM 2023 reference; polarization, trapped charge, and memory window",
                "limit": "Uses a simplified n-channel MFIS electrostatic model, not a reproduction of the metal-doped TCIL process."
              }
            ],
            "caveat": "Here P toward the channel creates positive bound charge and lowers n-channel Vt; verify pulse polarity for the actual stack. Trapped charge also shifts Vt, so hysteresis is not attributed solely to polarization.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ftj",
        "operationId": "write",
        "title": "Ferroelectric Tunnel Junction · Write / SET",
        "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
        "sources": [
          {
            "id": "EMG-FTJ24",
            "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
            "url": "https://www.nature.com/articles/s41467-024-44927-7",
            "kind": "Original research paper",
            "date": "2024",
            "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
            "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
          }
        ],
        "variants": [
          {
            "title": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
            "variant": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "frames": [
              {
                "id": "ftj-write-1-en",
                "title": "Initial: Original Polarization Sets the Interface",
                "caption": "Initial P points toward Cr/Au, giving NSTO depletion and high R.",
                "state": "Remanent polarization and interface state",
                "stimulus": "Write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-write-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-write-1-en-title op-ftj-write-1-en-desc\" data-topic=\"ftj\" data-operation=\"write\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ftj-write-1-en-title\">Initial: Original Polarization Sets the Interface</title><desc id=\"op-ftj-write-1-en-desc\">Initial P points toward Cr/Au, giving NSTO depletion and high R.</desc><style>#op-ftj-write-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-write-1-en path,#op-ftj-write-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"44\" height=\"78\" fill=\"#f7e6cd\" stroke=\"#678393\" stroke-width=\"1.4\" stroke-dasharray=\"4 3\"/><path d=\"M203.5 64L146.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 60.01390686070529L146.5 64L153.43621377156643 67.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 83L146.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 79.01390686070529L146.5 83L153.43621377156643 86.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 103L146.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 99.01390686070529L146.5 103L153.43621377156643 106.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"254\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M251 82L257 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 79L254 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"272\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M269 82L275 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272 79L272 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V178L237 187Q261 192 287 232H335\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M241 257L285 257\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M241 253L241 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285 253L285 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "ftj-write-2-en",
                "title": "Write Field: Polarization Reverses and Screening Rearranges",
                "caption": "Write voltage is defined at Cr/Au relative to NSTO, driving P toward NSTO. Interfacial bound charge and electronic screening rearrange.",
                "state": "Polarization and screening switching",
                "stimulus": "Write pulse at Cr/Au relative to NSTO",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-write-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-write-2-en-title op-ftj-write-2-en-desc\" data-topic=\"ftj\" data-operation=\"write\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ftj-write-2-en-title\">Write Field: Polarization Reverses and Screening Rearranges</title><desc id=\"op-ftj-write-2-en-desc\">Write voltage is defined at Cr/Au relative to NSTO, driving P toward NSTO. Interfacial bound charge and electronic screening rearrange.</desc><style>#op-ftj-write-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-write-2-en path,#op-ftj-write-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M146.5 64L203.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 67.98609313929471L203.5 64L196.56378622843357 60.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 83L146.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 79.01390686070529L146.5 83L153.43621377156643 86.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 103L203.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 106.98609313929471L203.5 103L196.56378622843357 99.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Vwrite +</text><path d=\"M52 132L110 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M103.06378622843359 135.9860931392947L110 132L103.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "ftj-write-3-en",
                "title": "Final without Bias: Barrier Change Retained",
                "caption": "After write bias removal, remanent P retains interfacial accumulation and a smaller effective barrier. This polarization/resistance mapping is limited to the named research stack.",
                "state": "Remanent polarization and interface state",
                "stimulus": "Write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-write-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-write-3-en-title op-ftj-write-3-en-desc\" data-topic=\"ftj\" data-operation=\"write\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ftj-write-3-en-title\">Final without Bias: Barrier Change Retained</title><desc id=\"op-ftj-write-3-en-desc\">After write bias removal, remanent P retains interfacial accumulation and a smaller effective barrier. This polarization/resistance mapping is limited to the named research stack.</desc><style>#op-ftj-write-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-write-3-en path,#op-ftj-write-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M146.5 64L203.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 67.98609313929471L203.5 64L196.56378622843357 60.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 83L203.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 86.98609313929471L203.5 83L196.56378622843357 79.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 103L203.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 106.98609313929471L203.5 103L196.56378622843357 99.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P→ / P←",
                "meaning": "Polarization along or opposite the Cr/Au→NSTO coordinate"
              },
              {
                "symbol": "U(x)",
                "meaning": "Effective electronic barrier; qualitative curve"
              },
              {
                "symbol": "Wdep",
                "meaning": "Effective width of the depleted NSTO surface"
              },
              {
                "symbol": "LRS / HRS",
                "meaning": "Low / high resistance at the same low read bias"
              }
            ],
            "sources": [
              {
                "id": "EMG-FTJ24",
                "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
                "url": "https://www.nature.com/articles/s41467-024-44927-7",
                "kind": "Original research paper",
                "date": "2024",
                "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
                "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
              }
            ],
            "caveat": "The x axis runs from Cr/Au toward NSTO. P toward NSTO corresponds to LRS in this named stack; reverse P strengthens depletion and the HRS barrier. This mapping is not universal to FTJs; HRS transport can include thermal assistance.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ftj",
        "operationId": "erase",
        "title": "Ferroelectric Tunnel Junction · Reverse Rewrite / RESET",
        "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
        "sources": [
          {
            "id": "EMG-FTJ24",
            "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
            "url": "https://www.nature.com/articles/s41467-024-44927-7",
            "kind": "Original research paper",
            "date": "2024",
            "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
            "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
          }
        ],
        "variants": [
          {
            "title": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
            "variant": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "frames": [
              {
                "id": "ftj-erase-1-en",
                "title": "Initial: Original Polarization Sets the Interface",
                "caption": "Initial P points toward NSTO, giving electron accumulation and low R.",
                "state": "Remanent polarization and interface state",
                "stimulus": "Write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-erase-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-erase-1-en-title op-ftj-erase-1-en-desc\" data-topic=\"ftj\" data-operation=\"erase\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ftj-erase-1-en-title\">Initial: Original Polarization Sets the Interface</title><desc id=\"op-ftj-erase-1-en-desc\">Initial P points toward NSTO, giving electron accumulation and low R.</desc><style>#op-ftj-erase-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-erase-1-en path,#op-ftj-erase-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M146.5 64L203.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 67.98609313929471L203.5 64L196.56378622843357 60.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 83L203.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 86.98609313929471L203.5 83L196.56378622843357 79.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 103L203.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 106.98609313929471L203.5 103L196.56378622843357 99.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "ftj-erase-2-en",
                "title": "Write Field: Polarization Reverses and Screening Rearranges",
                "caption": "Write voltage is defined at Cr/Au relative to NSTO, driving P toward Cr/Au. Interfacial bound charge and electronic screening rearrange.",
                "state": "Polarization and screening switching",
                "stimulus": "Write pulse at Cr/Au relative to NSTO",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-erase-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-erase-2-en-title op-ftj-erase-2-en-desc\" data-topic=\"ftj\" data-operation=\"erase\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ftj-erase-2-en-title\">Write Field: Polarization Reverses and Screening Rearranges</title><desc id=\"op-ftj-erase-2-en-desc\">Write voltage is defined at Cr/Au relative to NSTO, driving P toward Cr/Au. Interfacial bound charge and electronic screening rearrange.</desc><style>#op-ftj-erase-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-erase-2-en path,#op-ftj-erase-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"44\" height=\"78\" fill=\"#f7e6cd\" stroke=\"#678393\" stroke-width=\"1.4\" stroke-dasharray=\"4 3\"/><path d=\"M203.5 64L146.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 60.01390686070529L146.5 64L153.43621377156643 67.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 83L203.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 86.98609313929471L203.5 83L196.56378622843357 79.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 103L146.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 99.01390686070529L146.5 103L153.43621377156643 106.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"254\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M251 82L257 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 79L254 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"272\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M269 82L275 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272 79L272 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#b96521\" font-size=\"20\" >Vwrite −</text><path d=\"M310 132L252 132\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M258.93621377156643 128.01390686070528L252 132L258.93621377156643 135.9860931392947\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V178L237 187Q261 192 287 232H335\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M241 257L285 257\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M241 253L241 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285 253L285 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              },
              {
                "id": "ftj-erase-3-en",
                "title": "Final without Bias: Barrier Change Retained",
                "caption": "After write bias removal, remanent P retains NSTO depletion and a higher, wider effective barrier. This polarization/resistance mapping is limited to the named research stack.",
                "state": "Remanent polarization and interface state",
                "stimulus": "Write bias removed",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-erase-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-erase-3-en-title op-ftj-erase-3-en-desc\" data-topic=\"ftj\" data-operation=\"erase\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ftj-erase-3-en-title\">Final without Bias: Barrier Change Retained</title><desc id=\"op-ftj-erase-3-en-desc\">After write bias removal, remanent P retains NSTO depletion and a higher, wider effective barrier. This polarization/resistance mapping is limited to the named research stack.</desc><style>#op-ftj-erase-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-erase-3-en path,#op-ftj-erase-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"44\" height=\"78\" fill=\"#f7e6cd\" stroke=\"#678393\" stroke-width=\"1.4\" stroke-dasharray=\"4 3\"/><path d=\"M203.5 64L146.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 60.01390686070529L146.5 64L153.43621377156643 67.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 83L146.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 79.01390686070529L146.5 83L153.43621377156643 86.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 103L146.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 99.01390686070529L146.5 103L153.43621377156643 106.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"254\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M251 82L257 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 79L254 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"272\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M269 82L275 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272 79L272 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V178L237 187Q261 192 287 232H335\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M241 257L285 257\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M241 253L241 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285 253L285 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P→ / P←",
                "meaning": "Polarization along or opposite the Cr/Au→NSTO coordinate"
              },
              {
                "symbol": "U(x)",
                "meaning": "Effective electronic barrier; qualitative curve"
              },
              {
                "symbol": "Wdep",
                "meaning": "Effective width of the depleted NSTO surface"
              },
              {
                "symbol": "LRS / HRS",
                "meaning": "Low / high resistance at the same low read bias"
              }
            ],
            "sources": [
              {
                "id": "EMG-FTJ24",
                "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
                "url": "https://www.nature.com/articles/s41467-024-44927-7",
                "kind": "Original research paper",
                "date": "2024",
                "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
                "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
              }
            ],
            "caveat": "The x axis runs from Cr/Au toward NSTO. P toward NSTO corresponds to LRS in this named stack; reverse P strengthens depletion and the HRS barrier. This mapping is not universal to FTJs; HRS transport can include thermal assistance.",
            "id": "base"
          }
        ]
      },
      {
        "topicId": "ftj",
        "operationId": "read",
        "title": "Ferroelectric Tunnel Junction · Read",
        "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
        "sources": [
          {
            "id": "EMG-FTJ24",
            "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
            "url": "https://www.nature.com/articles/s41467-024-44927-7",
            "kind": "Original research paper",
            "date": "2024",
            "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
            "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
          }
        ],
        "variants": [
          {
            "title": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "summary": "Compare interfacial accumulation/depletion, effective barrier, and low-bias current for opposite polarizations.",
            "variant": "Named research stack: Cr/Au / BSO / n-type NSTO",
            "frames": [
              {
                "id": "ftj-read-1-en",
                "title": "Before Read: Compare Low- and High-R Barriers",
                "caption": "The coordinate runs Cr/Au→BSO→NSTO. The illustrated low-R initial state has P toward NSTO; U(x) is a qualitative barrier, not a measured band profile.",
                "state": "Low-R branch: electron accumulation in NSTO",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-read-1-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-read-1-en-title op-ftj-read-1-en-desc\" data-topic=\"ftj\" data-operation=\"read\" data-frame=\"1\" data-language=\"en\"><title id=\"op-ftj-read-1-en-title\">Before Read: Compare Low- and High-R Barriers</title><desc id=\"op-ftj-read-1-en-desc\">The coordinate runs Cr/Au→BSO→NSTO. The illustrated low-R initial state has P toward NSTO; U(x) is a qualitative barrier, not a measured band profile.</desc><style>#op-ftj-read-1-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-read-1-en path,#op-ftj-read-1-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path 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stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >V = 0</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text></svg>"
              },
              {
                "id": "ftj-read-2-en",
                "title": "Low-R Read: Accumulation and a Smaller Barrier",
                "caption": "Positive interfacial bound charge for P toward NSTO attracts electron accumulation. At the same small read bias, the smaller barrier permits greater electronic current.",
                "state": "Low-R branch: electron accumulation in NSTO",
                "stimulus": "Same small read bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-read-2-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-read-2-en-title op-ftj-read-2-en-desc\" data-topic=\"ftj\" data-operation=\"read\" data-frame=\"2\" data-language=\"en\"><title id=\"op-ftj-read-2-en-title\">Low-R Read: Accumulation and a Smaller Barrier</title><desc id=\"op-ftj-read-2-en-desc\">Positive interfacial bound charge for P toward NSTO attracts electron accumulation. At the same small read bias, the smaller barrier permits greater electronic current.</desc><style>#op-ftj-read-2-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-read-2-en path,#op-ftj-read-2-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M146.5 64L203.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 67.98609313929471L203.5 64L196.56378622843357 60.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 83L203.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 86.98609313929471L203.5 83L196.56378622843357 79.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 103L203.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 106.98609313929471L203.5 103L196.56378622843357 99.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Vread</text><path d=\"M32 132L108 132\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.06378622843359 135.9860931392947L108 132L101.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><path d=\"M57 221L101 221\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M94.06378622843359 224.9860931392947L101 221L94.06378622843359 217.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"3.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M121 221Q172 237 229 225\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><path d=\"M222.06378622843357 228.9860931392947L229 225L222.06378622843357 221.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>"
              },
              {
                "id": "ftj-read-3-en",
                "title": "High-R Read: Depletion Adds an Effective Barrier",
                "caption": "This frame compares the alternative high-R initial state; reading does not turn low R into high R. Reverse P depletes NSTO, adding a barrier and reducing current.",
                "state": "High-R comparison branch: NSTO depletion",
                "stimulus": "Same small read bias",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-read-3-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-read-3-en-title op-ftj-read-3-en-desc\" data-topic=\"ftj\" data-operation=\"read\" data-frame=\"3\" data-language=\"en\"><title id=\"op-ftj-read-3-en-title\">High-R Read: Depletion Adds an Effective Barrier</title><desc id=\"op-ftj-read-3-en-desc\">This frame compares the alternative high-R initial state; reading does not turn low R into high R. Reverse P depletes NSTO, adding a barrier and reducing current.</desc><style>#op-ftj-read-3-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-read-3-en path,#op-ftj-read-3-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"44\" height=\"78\" fill=\"#f7e6cd\" stroke=\"#678393\" stroke-width=\"1.4\" stroke-dasharray=\"4 3\"/><path d=\"M203.5 64L146.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 60.01390686070529L146.5 64L153.43621377156643 67.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 83L146.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 79.01390686070529L146.5 83L153.43621377156643 86.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M203.5 103L146.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M153.43621377156643 99.01390686070529L146.5 103L153.43621377156643 106.98609313929471\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"254\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M251 82L257 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M254 79L254 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"272\" cy=\"82\" r=\"6\" fill=\"#b96521\" /><path d=\"M269 82L275 82\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272 79L272 85\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#196daf\" font-size=\"20\" >Vread</text><path d=\"M32 132L108 132\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M101.06378622843359 135.9860931392947L108 132L101.06378622843359 128.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V178L237 187Q261 192 287 232H335\" fill=\"none\" stroke=\"#435b89\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M241 257L285 257\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M241 253L241 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285 253L285 261\" fill=\"none\" stroke=\"#b96521\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >HRS</text><path d=\"M57 221L101 221\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M94.06378622843359 224.9860931392947L101 221L94.06378622843359 217.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M121 221Q172 237 229 225\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"4 4\"/><path d=\"M222.06378622843357 228.9860931392947L229 225L222.06378622843357 221.0139068607053\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>"
              },
              {
                "id": "ftj-read-4-en",
                "title": "Remove Bias and Latch: Polarization and Barrier Retained",
                "caption": "Latch after removing small read bias. The diagram returns to the low-R branch with polarization, accumulation, and barrier retained; the high-R branch likewise retains its state.",
                "state": "Low-R branch: electron accumulation in NSTO",
                "stimulus": "Operation bias is zero",
                "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"op-ftj-read-4-en\" viewBox=\"0 0 360 270\" role=\"img\" aria-labelledby=\"op-ftj-read-4-en-title op-ftj-read-4-en-desc\" data-topic=\"ftj\" data-operation=\"read\" data-frame=\"4\" data-language=\"en\"><title id=\"op-ftj-read-4-en-title\">Remove Bias and Latch: Polarization and Barrier Retained</title><desc id=\"op-ftj-read-4-en-desc\">Latch after removing small read bias. The diagram returns to the low-R branch with polarization, accumulation, and barrier retained; the high-R branch likewise retains its state.</desc><style>#op-ftj-read-4-en text{font-family:Arial,'Noto Sans TC',sans-serif;font-size:20px;font-weight:500}#op-ftj-read-4-en path,#op-ftj-read-4-en line{vector-effect:non-scaling-stroke}</style><rect width=\"360\" height=\"270\" rx=\"10\" fill=\"#f8fbfd\"/><text x=\"67\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >Cr/Au</text><text x=\"178\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >BSO</text><text x=\"292\" y=\"26\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >NSTO</text><rect x=\"25\" y=\"43\" width=\"87\" height=\"78\" fill=\"#829dad\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"115\" y=\"43\" width=\"121\" height=\"78\" fill=\"#eee7f3\" stroke=\"#678393\" stroke-width=\"1.4\" /><rect x=\"239\" y=\"43\" width=\"98\" height=\"78\" fill=\"#dce9ed\" stroke=\"#678393\" stroke-width=\"1.4\" /><path d=\"M146.5 64L203.5 64\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 67.98609313929471L203.5 64L196.56378622843357 60.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 83L203.5 83\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 86.98609313929471L203.5 83L196.56378622843357 79.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M146.5 103L203.5 103\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M196.56378622843357 106.98609313929471L203.5 103L196.56378622843357 99.01390686070529\" fill=\"none\" stroke=\"#836197\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"57\" r=\"6\" fill=\"#836197\" /><path d=\"M228 57L234 57\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 54L231 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"78\" r=\"6\" fill=\"#836197\" /><path d=\"M228 78L234 78\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 75L231 81\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"231\" cy=\"101\" r=\"6\" fill=\"#836197\" /><path d=\"M228 101L234 101\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M231 98L231 104\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"249\" cy=\"58\" r=\"6\" fill=\"#196daf\" /><path d=\"M246 58L252 58\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"260\" cy=\"76\" r=\"6\" fill=\"#196daf\" /><path d=\"M257 76L263 76\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"248\" cy=\"99\" r=\"6\" fill=\"#196daf\" /><path d=\"M245 99L251 99\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"273\" cy=\"60\" r=\"6\" fill=\"#196daf\" /><path d=\"M270 60L276 60\" fill=\"none\" stroke=\"#ffffff\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"177\" y=\"146\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA latched</text><path d=\"M27 246L335 246\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M27 246L27 171\" fill=\"none\" stroke=\"#678393\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"14\" y=\"167\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >U</text><text x=\"343\" y=\"254\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >x</text><path d=\"M114 173L114 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M237 173L237 246\" fill=\"none\" stroke=\"#536b7d\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><path d=\"M30 232H113V195L237 212V232H335\" fill=\"none\" stroke=\"#147e82\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M30 232L335 232\" fill=\"none\" stroke=\"#196daf\" stroke-width=\"1\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"3 4\"/><text x=\"173\" y=\"263\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >LRS</text><rect x=\"35\" y=\"174\" width=\"64\" height=\"29\" fill=\"#e2edf4\" stroke=\"#678393\" stroke-width=\"1.4\" /><text x=\"67\" y=\"197\" text-anchor=\"middle\" fill=\"#163449\" font-size=\"20\" >SA</text></svg>"
              }
            ],
            "legend": [
              {
                "symbol": "P→ / P←",
                "meaning": "Polarization along or opposite the Cr/Au→NSTO coordinate"
              },
              {
                "symbol": "U(x)",
                "meaning": "Effective electronic barrier; qualitative curve"
              },
              {
                "symbol": "Wdep",
                "meaning": "Effective width of the depleted NSTO surface"
              },
              {
                "symbol": "LRS / HRS",
                "meaning": "Low / high resistance at the same low read bias"
              }
            ],
            "sources": [
              {
                "id": "EMG-FTJ24",
                "label": "Original Research: Atomic-Scale BSO Ferroelectric Tunnel Junctions",
                "url": "https://www.nature.com/articles/s41467-024-44927-7",
                "kind": "Original research paper",
                "date": "2024",
                "locator": "Figures 3a/3b: polarization, accumulation/depletion, and barriers in Cr/Au–BSO–NSTO",
                "limit": "The low-resistance mapping for P toward NSTO is limited to this named stack; HRS can include thermally assisted tunneling."
              }
            ],
            "caveat": "The x axis runs from Cr/Au toward NSTO. P toward NSTO corresponds to LRS in this named stack; reverse P strengthens depletion and the HRS barrier. This mapping is not universal to FTJs; HRS transport can include thermal assistance.",
            "id": "base"
          }
        ]
      }
    ],
    "patents": [
      {
        "topicId": "efuse",
        "id": "US7417300B2",
        "focus": "Steer the programmed resistance change into a controlled region",
        "trace": "Compare the terminal and neck widths, then trace current crowding and the local thermal gradient. Geometry and material distribution are the design variables.",
        "claim": "Claim 1 combines terminal narrowing, different silicide and polysilicon footprints, and unsilicided boundaries. Figure 4A explains the narrowing; the material and boundary requirements remain part of the claim.",
        "bridge": "Compare the eFuse write sequence: current path → material redistribution → high resistance. Different fuse stacks need different physical failure models.",
        "callouts": [
          {
            "number": "410 / 420",
            "meaning": "Terminal regions, wider than the connecting fuse"
          },
          {
            "number": "430",
            "meaning": "Elongated fuse joining the terminals"
          },
          {
            "number": "440",
            "meaning": "Narrowed region within the terminal, distinct from the fuse link"
          }
        ],
        "figures": [
          {
            "index": 2,
            "asset": "assets/專利原圖/US7417300B2-02.png",
            "originalUrl": "https://patentimages.storage.googleapis.com/07/75/fd/44c9418dfb4e69/US07417300-20080826-D00002.png",
            "width": 1609,
            "height": 2314,
            "sha256": "db69fc68563c1ada99b96bcf0c332e47fd8ba531603b8660d5255690788daead",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 4 / 4A",
            "rotation": 90,
            "page": 4,
            "pdfUrl": "https://patentimages.storage.googleapis.com/1e/7d/12/c3ce4fbb0c479a/US7417300B2.pdf",
            "pdfSHA256": "b47c2630c47d21d0214af0492f25af69013a821b0785fd61136fd5c5c4d97635"
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        ],
        "sourceUrl": "https://patents.google.com/patent/US7417300B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "efuse",
        "id": "US8847350B2",
        "focus": "Control the programming location through partial via contact",
        "trace": "Follow the top-view metal link into the two via cross-sections. A smaller contact area concentrates current and local heating.",
        "claim": "Claim 1 requires a via end that lands only partly on the fuse link and specifies the connection between two metal layers. Dimensions, resistance and other conditions appear in dependent claims.",
        "bridge": "Compare localized heating and separation in a metal-via fuse. Its material explanation differs from the silicide electromigration example.",
        "callouts": [
          {
            "number": "410 / 420",
            "meaning": "Anode and cathode terminals"
          },
          {
            "number": "430",
            "meaning": "Metal fuse link"
          },
          {
            "number": "435 / 435A / 435B",
            "meaning": "Via plugs and contact portions; compare their overlap with the link"
          }
        ],
        "figures": [
          {
            "index": 5,
            "asset": "assets/專利原圖/US8847350B2-05.png",
            "originalUrl": "https://patentimages.storage.googleapis.com/34/a3/18/9092a7367d0ba9/US08847350-20140930-D00005.png",
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            "height": 2280,
            "sha256": "bcde906996c1395fab71bd2c6d2ec4e496fcccb16808330449c7ccd1daa10ed9",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 4A–4C",
            "rotation": 90,
            "page": 6,
            "pdfUrl": "https://patentimages.storage.googleapis.com/f0/e6/d1/93874e8e69ad3a/US8847350.pdf",
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        ],
        "sourceUrl": "https://patents.google.com/patent/US8847350B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "antifuse",
        "id": "US6667902B2",
        "focus": "Separate dielectric breakdown from array selection",
        "trace": "Locate the storage element and select transistor in Figure 3, then compare selected and unselected biases in Figure 8. The listed voltages belong to this embodiment.",
        "claim": "Claim 1 combines a MOS select transistor, a thin-dielectric storage element, and row-select, column-select and row-program lines. The breakdown cross-section alone does not capture the array connections.",
        "bridge": "Compare antifuse operation: intact dielectric → selected high field → permanent conduction path, followed by low-stress sensing.",
        "callouts": [
          {
            "number": "311 / 312",
            "meaning": "Conductive storage gate and underlying thin gate dielectric"
          },
          {
            "number": "313",
            "meaning": "Active region participating in the post-breakdown current path"
          },
          {
            "number": "111 / 115",
            "meaning": "Adjacent device arrangement; read with the selection lines"
          }
        ],
        "figures": [
          {
            "index": 3,
            "asset": "assets/專利原圖/US6667902B2-03.png",
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            "height": 1270,
            "sha256": "455ce33e58efd334417d2d7657b43452ccd5aa2490eb535f1261278954193aac",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 3",
            "rotation": 0,
            "page": 5,
            "pdfUrl": "https://patentimages.storage.googleapis.com/7a/76/35/6662110a53d9f3/US6667902.pdf",
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            "sha256": "a707b4a000b5bdf1127c1fee64c7181b50ac6577e93437357a8fe0accba1e905",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 8",
            "rotation": 90,
            "page": 10,
            "pdfUrl": "https://patentimages.storage.googleapis.com/7a/76/35/6662110a53d9f3/US6667902.pdf",
            "pdfSHA256": "9c0a99a9782524e2a71b8671e7eb34cc0a8596a95251737e9aadb7867e67ee6f"
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        ],
        "sourceUrl": "https://patents.google.com/patent/US6667902B2/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "eeprom",
        "id": "US4115914A",
        "focus": "Provide charge transfer through a localized thin dielectric",
        "trace": "Identify the floating gate, localized thin region and upper control gate in the late process cross-sections. Thin-region placement and the second dielectric determine coupling and tunneling paths.",
        "claim": "Claim 1 is a fabrication method: active regions, a localized thin dielectric, floating gate, isolating second dielectric and second gate covering the channel. Its process requirements are more specific than a generic EEPROM sketch.",
        "bridge": "Compare EEPROM FN injection and removal: both directions must pass through the actual thin dielectric region.",
        "callouts": [
          {
            "number": "54",
            "meaning": "First dielectric containing the localized thin region"
          },
          {
            "number": "56",
            "meaning": "Insulated floating gate"
          },
          {
            "number": "58 / 62",
            "meaning": "Second dielectric and upper second gate"
          }
        ],
        "figures": [
          {
            "index": 2,
            "asset": "assets/專利原圖/US4115914A-02.png",
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            "sha256": "dd6d59e174d5e2c4a13e81762eb51b67063d1183460a2b4b6b3e76a734193a7a",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 3h / 3i / 4",
            "rotation": 0,
            "page": 4,
            "pdfUrl": "https://patentimages.storage.googleapis.com/31/47/ab/e89f6659da690c/US4115914.pdf",
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        ],
        "sourceUrl": "https://patents.google.com/patent/US4115914A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "mtp",
        "id": "US5844271A",
        "focus": "Couple a single-poly floating gate through a buried control node",
        "trace": "Find the overlap between the buried control region and floating gate, then use the equivalent circuit to distinguish coupling, storage and channel conduction.",
        "claim": "Claim 1 includes a buried control gate, coupled floating gate and a thin tunnel region spanning part of the channel and a junction, with inhibition of an unselected overerased cell. Claim 4 separately specifies a split-gate structure.",
        "bridge": "Compare the MTP IP study’s single-poly teaching variant: this patent’s CHE injection and FN removal use a buried control node, with no second control-poly layer above the floating gate. Current product mechanisms require their own documentation.",
        "callouts": [
          {
            "number": "32",
            "meaning": "Buried n+ control-gate region"
          },
          {
            "number": "36",
            "meaning": "Single-poly floating gate"
          },
          {
            "number": "40 / 42 / 44",
            "meaning": "Source, drain and channel"
          }
        ],
        "figures": [
          {
            "index": 1,
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 4–7",
            "rotation": 0,
            "page": 3,
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        "sourceUrl": "https://patents.google.com/patent/US5844271A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "nor",
        "id": "US6232180B1",
        "focus": "Control operation with source coupling, split gates and well bias",
        "trace": "Follow floating-gate formation in Figure 5 into the source/drain structure in Figure 6. Locate the select gate and tunnel oxide; the nested wells support separately controlled erase bias.",
        "claim": "Claim 1 specifies nested wells, select and floating gates, and a source acting as the control-coupling node. Claims 4–6 add particular erase and programming biases; these values do not define all split-gate NOR.",
        "bridge": "Compare the third NOR variant: source-side injection and well/channel-side FN erase, separately from implementations that tunnel toward a select gate.",
        "callouts": [
          {
            "number": "501 / 113",
            "meaning": "Floating gate and select gate"
          },
          {
            "number": "403",
            "meaning": "Tunnel oxide toward the channel"
          },
          {
            "number": "103 / 105",
            "meaning": "Deep n-well and enclosed p-well"
          }
        ],
        "figures": [
          {
            "index": 2,
            "asset": "assets/專利原圖/US6232180B1-02.png",
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            "sha256": "b4d03ede9c2f3f1640f4daad6e684fdc76f8c312afbff254047a98e731d97379",
            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 5 / 6",
            "rotation": 0,
            "page": 4,
            "pdfUrl": "https://patentimages.storage.googleapis.com/bf/a4/72/d2d74438bd3c5f/US6232180.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US6232180B1/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "sonos",
        "id": "WO1981000790A1",
        "focus": "Add a blocking oxide between the charge-trapping layer and gate",
        "trace": "Read upward from silicon: thin memory oxide, silicon nitride, interfacial oxide and polysilicon gate. The drawing explains the dielectric stack.",
        "claim": "Claim 1 specifies a CVD second oxide with a thickness range and an upper limit for the first oxide. Claim 6 covers fabrication. This early SONOS stack does not specify every later engineered tunneling stack.",
        "bridge": "For SONOS operation, distinguish the lower tunnel oxide from the upper blocking oxide. Stored charge resides in the nitride.",
        "callouts": [
          {
            "number": "11 / 12",
            "meaning": "Thin memory oxide and nitride trapping layer"
          },
          {
            "number": "13 / 14",
            "meaning": "Interfacial oxide and polysilicon gate"
          },
          {
            "number": "16 / 17 / 18",
            "meaning": "Substrate and source/drain regions"
          }
        ],
        "figures": [
          {
            "index": "頁14",
            "asset": "assets/專利原圖/WO1981000790A1-頁14.png",
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            "label": "Fig. 1",
            "rotation": 90,
            "page": 14,
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        "sourceUrl": "https://patents.google.com/patent/WO1981000790A1/en",
        "claimsAnchor": "clm-0001"
      },
      {
        "topicId": "sonos",
        "id": "US5768192A",
        "focus": "Use localized trapping and reverse read to increase sensing contrast",
        "trace": "Compare the prior-art A panels with embodiment B panels. Trace the localized charge region and READ arrow; reading direction changes which end of the channel barrier controls current.",
        "claim": "Claim 1 combines localized electron trapping near the programming drain with different thresholds for reverse and forward read. The directional behavior is essential to the reading, beyond the ONO stack alone.",
        "bridge": "Compare the localized NROM sequence: CHE stores electrons near one end, reverse read senses from the opposite direction, and BBHH erase is explained with its separate source.",
        "callouts": [
          {
            "number": "14 / 16",
            "meaning": "Source/drain labels; interpret them with the operating bias"
          },
          {
            "number": "20",
            "meaning": "Nonconducting nitride trapping layer"
          },
          {
            "number": "24 / 68",
            "meaning": "Control gate and localized stored-charge region"
          }
        ],
        "figures": [
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            "index": 2,
            "asset": "assets/專利原圖/US5768192A-02.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 5A / 5B",
            "rotation": 0,
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 8A / 8B",
            "rotation": 0,
            "page": 6,
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        "claimsAnchor": "claims"
      },
      {
        "topicId": "nand",
        "id": "US7696559B2",
        "focus": "Move the NAND string into a vertical gate stack",
        "trace": "In Figure 2, trace the silicon pillar from the common source to the bit line. Figure 6 unfolds the same structure into a string circuit, with select gates at both ends.",
        "claim": "Claim 1 specifies gate stacks, sidewall dielectric containing an insulating storage layer, semiconductor pillars, data lines and upper/lower select gates. It describes a particular vertical NAND structure, not every modern cylindrical-hole array.",
        "bridge": "Compare selected-word-line injection, pass biases and program inhibit. This patent’s source-side electron removal is shown separately from later GIDL hole-assisted erase.",
        "callouts": [
          {
            "number": "21",
            "meaning": "Stacked gate wiring, including memory and end-select gates"
          },
          {
            "number": "3 / 4",
            "meaning": "Charge-storage gate dielectric and silicon pillar"
          },
          {
            "number": "7 / 11",
            "meaning": "Upper bit line and lower common-source diffusion"
          }
        ],
        "figures": [
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 2",
            "rotation": 90,
            "page": 4,
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 6",
            "rotation": 90,
            "page": 7,
            "pdfUrl": "https://patentimages.storage.googleapis.com/79/10/3c/cc469fa1eed4fc/US7696559.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US7696559B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "toggle",
        "id": "US6545906B1",
        "focus": "Rotate coupled moments with overlapping field pulses",
        "trace": "Start with the two pulse waveforms in Figure 4, then follow the moments through Figures 5 and 6. The overlap interval and turn-off order are part of the operation.",
        "claim": "Claim 1 combines at least two antiferromagnetically coupled free layers, a moment-balance condition and pulse order t₀<t₁<t₂<t₃<t₄. Arbitrary orthogonal field pulses are not equivalent.",
        "bridge": "Compare the five-frame Toggle sequence and initial-state check: apply a toggle when the stored bit needs to change.",
        "callouts": [
          {
            "number": "60 / 70",
            "meaning": "Word-line and digit-line pulses"
          },
          {
            "number": "100",
            "meaning": "Complete overlapping write sequence"
          },
          {
            "number": "40 / 53 / 57",
            "meaning": "Resultant moment and antiferromagnetically coupled sublayer moments"
          }
        ],
        "figures": [
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            "derivation": "Original public patent drawing; bytes unchanged",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 5 / 6",
            "rotation": 90,
            "page": 4,
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        "sourceUrl": "https://patents.google.com/patent/US6545906B1/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "stt",
        "id": "US5695864A",
        "focus": "Transfer spin angular momentum with current through the layers",
        "trace": "Figure 1 is a five-layer metallic-conductor model. Follow A→F1→B→F2→C to locate fixed and variable moments, then relate current to torque on F2.",
        "claim": "Claim 1 specifies fixed and changeable magnetic conducting layers, a nonmagnetic conductor between them and a perpendicular current source. This early embodiment has a metallic spacer, rather than a modern MgO tunnel barrier.",
        "bridge": "Use this patent for spin-transfer physics, then the modern STT-MRAM plates for P/AP resistance sensing and the tunnel barrier.",
        "callouts": [
          {
            "number": "10",
            "meaning": "Five-layer spin-transfer device"
          },
          {
            "number": "F1 / F2",
            "meaning": "Fixed-moment and changeable-moment magnetic layers"
          },
          {
            "number": "A / B / C",
            "meaning": "Outer electrodes and central nonmagnetic conductor; current crosses the layers"
          }
        ],
        "figures": [
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            "asset": "assets/專利原圖/US5695864A-00.png",
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            "label": "Fig. 1 / 2",
            "rotation": 0,
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        "sourceUrl": "https://patents.google.com/patent/US5695864A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "sot",
        "id": "US10930843B2",
        "focus": "Integrate SOT write conductors and magnetic stacks into an array",
        "trace": "Trace the first horizontal wire through the magnetic stack to wiring in the other direction. Access transistors and crossing interconnect explain array integration beyond one MTJ.",
        "claim": "Claim 1 is a fabrication method covering isolated first wires, common device layers formed and separated above them, and second wires in another direction. The drawing explains connectivity; the claim centers on fabrication steps.",
        "bridge": "Compare three-terminal SOT read/write separation. Preserve the control terminals rather than reducing them to the STT current path.",
        "callouts": [
          {
            "number": "102a / 102b",
            "meaning": "First conductive wires carrying the lateral write path"
          },
          {
            "number": "108 / 110 / 112",
            "meaning": "Magnetic storage, spacing and reference layers"
          },
          {
            "number": "116 / 118 / 314",
            "meaning": "Control transistors and second wiring set"
          }
        ],
        "figures": [
          {
            "index": 3,
            "asset": "assets/專利原圖/US10930843B2-03.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 3",
            "rotation": 90,
            "page": 5,
            "pdfUrl": "https://patentimages.storage.googleapis.com/1b/15/5f/552c7b2be8d3cd/US10930843.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US10930843B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "vcm",
        "id": "US8331131B2",
        "focus": "Control resistance switching through an intermediate state and second pulse",
        "trace": "Follow the Figure 5 cycle through mobile-species, barrier and conductive-region changes. The intermediate state has a physical location; it is not a single-step SET/RESET diagram.",
        "claim": "Claim 1 requires three intermediate layers and two pulses: accumulation in the first layer, then motion into the third to complete the change. This specific multilayer memristor scheme does not define all bipolar VCM.",
        "bridge": "Compare species redistribution in VCM operation; this patent additionally shows how pulse sequencing introduces an intermediate state.",
        "callouts": [
          {
            "number": "507",
            "meaning": "Mobile species"
          },
          {
            "number": "502 / 506 / 510",
            "meaning": "Initial, intermediate and changed states"
          },
          {
            "number": "511 / 517 / 519",
            "meaning": "Tunneling barriers in the different stages"
          }
        ],
        "figures": [
          {
            "index": 4,
            "asset": "assets/專利原圖/US8331131B2-04.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 5",
            "rotation": 90,
            "page": 5,
            "pdfUrl": "https://patentimages.storage.googleapis.com/90/dd/5a/259ef8491b3d97/US8331131.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US8331131B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "ecm",
        "id": "US5761115A",
        "focus": "Reversibly grow a metal bridge inside an ion conductor",
        "trace": "Trace the dendrite in Figure 1’s plan and cross-section, then compare the vertical geometry in Figure 4. Figure 5 adds an insulating condition that prevents direct contact.",
        "claim": "Claim 1 covers an ion-containing conductor, electrodes and dendrite growth from negative toward positive. Claim 2 adds opposite-polarity reversal. Claim 3’s blocking condition is an additional limitation, not universal to all embodiments.",
        "bridge": "Compare ECM metal oxidation, ion migration, reduction/deposition and reverse dissolution. The bridge is metallic, rather than an oxygen-vacancy filament.",
        "callouts": [
          {
            "number": "12 / 22",
            "meaning": "Fast ion conductor containing metal ions"
          },
          {
            "number": "13 / 14 / 23 / 24",
            "meaning": "Biased electrodes; 23 denotes the cathode"
          },
          {
            "number": "15 / 25",
            "meaning": "Metal dendrite growing from the negative electrode"
          }
        ],
        "figures": [
          {
            "index": 0,
            "asset": "assets/專利原圖/US5761115A-00.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 1A / 1B / 2 / 3",
            "rotation": 0,
            "page": 3,
            "pdfUrl": "https://patentimages.storage.googleapis.com/8e/2a/ba/50b37273a2724f/US5761115.pdf",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 4A / 4B / 5A / 5B",
            "rotation": 0,
            "page": 4,
            "pdfUrl": "https://patentimages.storage.googleapis.com/8e/2a/ba/50b37273a2724f/US5761115.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US5761115A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "pcm",
        "id": "US5912839A",
        "focus": "Use cumulative pulses to reach distinguishable phase-change resistance states",
        "trace": "First inspect Figure 1’s nonmonotonic resistance versus pulse-current relationship, then the material/electrode structure in Figure 2. The plot lacks a complete measurement contract for current product specifications.",
        "claim": "Claim 1 focuses on a program pulse insufficient for a single SET but effective cumulatively with later pulses. Claim 2 adds RESET; claim 3 adds a read method that counts extra pulses. This is more specific than generic PCM heating.",
        "bridge": "Compare PCM temperature and phase-state sequences, then examine how this patent uses repeated stimulation for data encoding.",
        "callouts": [
          {
            "number": "36",
            "meaning": "Phase-change memory material"
          },
          {
            "number": "42",
            "meaning": "Electrode grid structure"
          },
          {
            "number": "46",
            "meaning": "Insulation layer"
          }
        ],
        "figures": [
          {
            "index": 0,
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 1",
            "rotation": 0,
            "page": 2,
            "pdfUrl": "https://patentimages.storage.googleapis.com/b9/d0/ac/dfd15bdaa20dc7/US5912839.pdf",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 2",
            "rotation": 0,
            "page": 3,
            "pdfUrl": "https://patentimages.storage.googleapis.com/b9/d0/ac/dfd15bdaa20dc7/US5912839.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US5912839A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "feram",
        "id": "US4873664A",
        "focus": "Restore ferroelectric data through the sensing circuit",
        "trace": "Trace the 1T1C cell along the bit line into the sense/restore circuit, then compare word-line and plate-line timing. After charge sensing, the latched result restores the original polarization.",
        "claim": "Claim 1 specifies cell connections to word, bit and separate plate lines, with one capacitor electrode connected to the bit line through a switch. Claim 2 adds a sense amplifier and dummy ferroelectric reference cell.",
        "bridge": "Compare both initial polarizations, switching-charge contrast, latching and write-back in the FeRAM read plates. Restoration is an explicit stage.",
        "callouts": [
          {
            "number": "22 / 24",
            "meaning": "Ferroelectric capacitor and access transistor"
          },
          {
            "number": "32 / 68",
            "meaning": "Word line and separate plate line"
          },
          {
            "number": "64",
            "meaning": "Sense amplifier, with reference cells providing a comparison"
          }
        ],
        "figures": [
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 3 / 4",
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            "page": 3,
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 5",
            "rotation": 90,
            "page": 4,
            "pdfUrl": "https://patentimages.storage.googleapis.com/33/4c/dd/c26b6f9525498b/US4873664.pdf",
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        "sourceUrl": "https://patents.google.com/patent/US4873664A/en",
        "claimsAnchor": "claims"
      },
      {
        "topicId": "fefet",
        "id": "US10153155B2",
        "focus": "Form a ferroelectric film through alternating dopants and heat treatment",
        "trace": "Figures 1 and 2 compare three- and four-layer film arrangements. Identify the material and outer conducting layers, then read the distinct dopant layers and heating requirements in the process claim.",
        "claim": "Claim 1 is a film-formation method involving three hafnium/oxygen layers, two different dopant layers, heating and conductive layers on both sides. The figure is not a complete FeFET bitcell and does not define its read channel.",
        "bridge": "Use this source for FeFET material/process constraints. The next transistor-stack patent and operation plates cover the electrical device.",
        "callouts": [
          {
            "number": "110 / 120 / 130",
            "meaning": "First, second and third material layers"
          },
          {
            "number": "112 / 114",
            "meaning": "Outer conductive layers"
          },
          {
            "number": "210 / 220 / 230 / 240",
            "meaning": "Extended four-layer arrangement"
          }
        ],
        "figures": [
          {
            "index": 1,
            "asset": "assets/專利原圖/US10153155B2-01.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 1 / 2",
            "rotation": 0,
            "page": 3,
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        ],
        "sourceUrl": "https://patents.google.com/patent/US10153155B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "fefet",
        "id": "US11502083B2",
        "focus": "Integrate a ferroelectric film into a specific composite gate",
        "trace": "Read layers 31, 32, 33b, 34 and 35 upward from the substrate, then trace the junctions back to the channel. This stack includes a floating gate and is not the simplest metal/ferroelectric/silicon structure.",
        "claim": "Claim 1 details the relative positions of the composite gate, isolation, sidewalls, source/drain and silicide. The drawing teaches one implementation, rather than a universal FeFET stack.",
        "bridge": "Compare polarization-controlled threshold shift in FeFETs. Distinguish material layers from electrical terminals to locate the applied field.",
        "callouts": [
          {
            "number": "31 / 32",
            "meaning": "Buffer layer and floating-gate electrode"
          },
          {
            "number": "33b / 34 / 35",
            "meaning": "Hafnium-based ferroelectric, control gate and film-electrode layer"
          },
          {
            "number": "5 / 6 / 71",
            "meaning": "Source, drain and silicide contact"
          }
        ],
        "figures": [
          {
            "index": 1,
            "asset": "assets/專利原圖/US11502083B2-01.png",
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 1",
            "rotation": 0,
            "page": 3,
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        "sourceUrl": "https://patents.google.com/patent/US11502083B2/en",
        "claimsAnchor": "CLM-00001"
      },
      {
        "topicId": "ftj",
        "id": "US20240057343A1",
        "focus": "Design tunneling states with a catalytic interface and thin ferroelectric layer",
        "trace": "Read the five-layer stack in Figure 3, then compare polarization-dependent barriers in Figure 5. Figures 15–18 connect memory stacks to transistors.",
        "claim": "This is a published application. Claim 1 combines a first electrode, ferroelectric material and contacting catalytic metal; claims 2–3 add particular electronegativity and thickness limits. The five-layer embodiment includes details beyond the independent claim.",
        "bridge": "Compare FTJ polarization reversal and barrier changes, keeping this stack distinct from research devices using other electrodes and ferroelectrics.",
        "callouts": [
          {
            "number": "210 / 220",
            "meaning": "Bottom electrode and catalytic metal layer"
          },
          {
            "number": "230 / 240 / 250",
            "meaning": "Ferroelectric layer, tunneling dielectric and top electrode"
          },
          {
            "number": "122 / 124 / 200",
            "meaning": "Access gate, source/drain regions and memory cell"
          }
        ],
        "figures": [
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            "derivation": "Original public patent drawing; bytes unchanged",
            "label": "Fig. 3–5",
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            "label": "Fig. 15–18",
            "rotation": 90,
            "page": 9,
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  },
  "ipCurriculum": {
    "schemaVersion": "1.1",
    "revision": "2026-09-10",
    "language": "en",
    "groups": [
      {
        "id": "otp",
        "label": "OTP IP",
        "description": "One-time programming can store charge or alter a dielectric; these are different cell mechanisms."
      },
      {
        "id": "mtp",
        "label": "MTP IP",
        "description": "Follow PGM, ERS and subsequent PGM on reusable storage cells. Identify each implementation’s carrier mechanism separately."
      },
      {
        "id": "eflash",
        "label": "eFlash IP",
        "description": "Embedded Flash macros still store charge, but extra masks, array organization and read paths are checked separately from MTP."
      },
      {
        "id": "mram",
        "label": "MRAM IP",
        "description": "Read embedded macros through their junctions, access transistors and electrical paths."
      },
      {
        "id": "reram",
        "label": "ReRAM IP",
        "description": "Follow oxygen-related defects or metallic paths through SET, RESET and sensing."
      }
    ],
    "units": [
      {
        "id": "neobit",
        "title": "NeoBit: Floating-Gate OTP Cell",
        "shortTitle": "NeoBit · Floating-Gate OTP",
        "vendor": "eMemory",
        "group": "otp",
        "hostTopic": "mtp",
        "summary": "Follow the series select transistor and p-type floating-gate storage transistor as electron injection changes read current. Then distinguish normal OTP operation from the physical possibility of ultraviolet erasure.",
        "program": "Hot-hole-induced electron injection",
        "reverse": "No electrical erase in normal OTP operation",
        "readout": "P-type storage-channel current",
        "lesson": "A floating-gate OTP stores its state in charge. The selector controls access, while programming moves the storage transistor to another sensed state. An interface without electrical erase is a different OTP design path from an irreversible dielectric change. Public NeoBit principles describe two series p-MOSFETs and CHEI. The cell uses I/O devices: about 6.5 V PGM for a 3.3 V cell and 7.5 V for a 5 V cell; an n-type floating-gate cell at the same node needs a higher Vpgm. That I/O window is why a p-type cell can embed in standard logic CMOS — not core-GOX-breakdown AntiFuse.",
        "structure": {
          "title": "NeoBit — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-structure-0-en-title\">NeoBit — Cell Structure</title><defs><marker id=\"emip-neobit-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-structure-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-structure-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Public-source reconstruction; not to scale</text></svg>",
          "caption": "Series pMOS selector and pMOS floating-gate cell. Historical section: n-well in p substrate, p+ source/shared region/drain, separate select gate and p+ FG; no FG wire or stacked control gate. Dielectric isolates FG. The historical p+ model adds electron–hole recombination leaving localized negative ionic charge; stored Q− is not entirely free electrons.",
          "legend": [
            {
              "symbol": "e− / h+",
              "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
            },
            {
              "symbol": "I",
              "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
            },
            {
              "symbol": "Bias",
              "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
            },
            {
              "symbol": "Scale",
              "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
            },
            {
              "symbol": "FG / Q−",
              "meaning": "FG has no DC terminal. Q− follows the historical p+ charge model, including localized negative ionic charge."
            },
            {
              "symbol": "UV*",
              "meaning": "The 2021 brief lists UV erase. Normal OTP lacks electrical erase; UV access depends on implementation and package."
            }
          ],
          "sourceIds": [
            "ip-neobit",
            "ip-neobit-pat",
            "ip-neobit-link",
            "ip-neobit-uv",
            "ip-neobit-pgm-pat",
            "ip-neobit-io-pat",
            "ip-neobit-eetimes-2003",
            "ip-neobit-io-pgm-author"
          ]
        },
        "operations": [
          {
            "topicId": "ip-neobit",
            "operationId": "write",
            "title": "NeoBit — Program",
            "summary": "Carriers: accelerated holes create electron–hole pairs; some hot electrons enter FG through oxide.",
            "sources": [
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              },
              {
                "id": "ip-neobit-pat",
                "label": "Historical NeoBit Charge-Retention Patent",
                "url": "https://patents.google.com/patent/US6914825B2/en",
                "kind": "Public Patent",
                "date": "2005-07-05",
                "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
              },
              {
                "id": "ip-neobit-link",
                "label": "Official NeoBit-to-Patent Link",
                "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                "kind": "Primary Technical Source",
                "date": "2005-10-04",
                "locator": "Second body paragraph: patent title and inventors",
                "limit": "Direct historical association between NeoBit and the named patent."
              },
              {
                "id": "ip-neobit-uv",
                "label": "Published NeoBit UV-Erase Boundary",
                "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                "kind": "Primary Technical Source",
                "date": "2021; filename version 2021-03-30",
                "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                "limit": "UV erase was published; this does not make every current package UV erasable."
              },
              {
                "id": "ip-neobit-pgm-pat",
                "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                "url": "https://patents.google.com/patent/US6678190B2/en",
                "kind": "Public Patent",
                "date": "2004-01-13",
                "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
              },
              {
                "id": "ip-neobit-io-pat",
                "label": "I/O-Device Single-Poly NVM Patent",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Public Patent",
                "date": "2005-07-19",
                "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
              },
              {
                "id": "ip-neobit-eetimes-2003",
                "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                "kind": "Primary Technical Source",
                "date": "2003-11-05",
                "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
              },
              {
                "id": "ip-neobit-io-pgm-author",
                "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Architecture-class Reference",
                "date": "reviewed 2026-09-11",
                "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Hot-hole-induced electron injection",
                "summary": "Carriers: accelerated holes create electron–hole pairs; some hot electrons enter FG through oxide.",
                "frames": [
                  {
                    "id": "neobit-write-1",
                    "title": "Initial State",
                    "state": "Initial: less stored negative FG charge; p-channel is not in its programmed conductive state.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: less stored negative FG charge; p-channel is not in its programmed conductive state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-write-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-write-0-en-title\">NeoBit — Program — Initial State</title><defs><marker id=\"emip-neobit-write-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Before the programming pulse</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-write-2",
                    "title": "Apply Conditions",
                    "state": "Stimulus: select pMOS and establish a lateral channel field; coupling shifts FG potential.",
                    "stimulus": "Stimulus: select pMOS and establish a lateral channel field; coupling shifts FG potential.",
                    "caption": "Stimulus: select pMOS and establish a lateral channel field; coupling shifts FG potential.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-write-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-write-1-en-title\">NeoBit — Program — Apply Conditions</title><defs><marker id=\"emip-neobit-write-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><path d=\"M276 283H372\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neobit-write-1-en-h)\"/><circle data-charge=\"mobile\" cx=\"293\" cy=\"246\" r=\"11\" fill=\"#bd354a\"/><text x=\"293\" y=\"254\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><text x=\"340\" y=\"307\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lateral field</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select and establish program field</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-write-3",
                    "title": "Carrier Motion",
                    "state": "Carriers: accelerated holes create electron–hole pairs; some hot electrons enter FG through oxide.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: accelerated holes create electron–hole pairs; some hot electrons enter FG through oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-write-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-write-2-en-title\">NeoBit — Program — Carrier Motion</title><defs><marker id=\"emip-neobit-write-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><path d=\"M276 283H369\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neobit-write-2-en-h)\"/><circle data-charge=\"mobile\" cx=\"298\" cy=\"246\" r=\"11\" fill=\"#bd354a\"/><text x=\"298\" y=\"254\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><circle data-charge=\"mobile\" cx=\"350\" cy=\"245\" r=\"11\" fill=\"#bd354a\"/><text x=\"350\" y=\"253\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><path d=\"M369 246Q397 230 372 208\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neobit-write-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"383\" cy=\"224\" r=\"11\" fill=\"#075f9d\"/><text x=\"383\" y=\"232\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pairs generated; e− enters FG</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-write-4",
                    "title": "Retained Result",
                    "state": "Hold: Q− remains after the pulse; the p-channel conducts more readily at specified read bias.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Hold: Q− remains after the pulse; the p-channel conducts more readily at specified read bias.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-write-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-write-3-en-title\">NeoBit — Program — Retained Result</title><defs><marker id=\"emip-neobit-write-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-write-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">State persists after stimulus removal</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG has no DC terminal. Q− follows the historical p+ charge model, including localized negative ionic charge."
                  },
                  {
                    "symbol": "UV*",
                    "meaning": "The 2021 brief lists UV erase. Normal OTP lacks electrical erase; UV access depends on implementation and package."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  },
                  {
                    "id": "ip-neobit-pat",
                    "label": "Historical NeoBit Charge-Retention Patent",
                    "url": "https://patents.google.com/patent/US6914825B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-05",
                    "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                    "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
                  },
                  {
                    "id": "ip-neobit-link",
                    "label": "Official NeoBit-to-Patent Link",
                    "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                    "kind": "Primary Technical Source",
                    "date": "2005-10-04",
                    "locator": "Second body paragraph: patent title and inventors",
                    "limit": "Direct historical association between NeoBit and the named patent."
                  },
                  {
                    "id": "ip-neobit-uv",
                    "label": "Published NeoBit UV-Erase Boundary",
                    "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                    "kind": "Primary Technical Source",
                    "date": "2021; filename version 2021-03-30",
                    "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                    "limit": "UV erase was published; this does not make every current package UV erasable."
                  },
                  {
                    "id": "ip-neobit-pgm-pat",
                    "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                    "url": "https://patents.google.com/patent/US6678190B2/en",
                    "kind": "Public Patent",
                    "date": "2004-01-13",
                    "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                    "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
                  },
                  {
                    "id": "ip-neobit-io-pat",
                    "label": "I/O-Device Single-Poly NVM Patent",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-19",
                    "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                    "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
                  },
                  {
                    "id": "ip-neobit-eetimes-2003",
                    "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                    "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                    "kind": "Primary Technical Source",
                    "date": "2003-11-05",
                    "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                    "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
                  },
                  {
                    "id": "ip-neobit-io-pgm-author",
                    "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Architecture-class Reference",
                    "date": "reviewed 2026-09-11",
                    "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                    "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
                  }
                ],
                "caveat": "Do not draw oxide rupture, a permanent filament or nMOS CHE; do not invent voltages or universal current p+ doping. SL, SG/WL, BL and NW; FG floats. SG is separate from FG; capacitive BL coupling is not a DC connection."
              }
            ]
          },
          {
            "topicId": "ip-neobit",
            "operationId": "erase",
            "title": "NeoBit — Erase Boundary",
            "summary": "The normal OTP interface lacks electrical erase. This does not imply physical irreversibility: the 2021 brief lists UV erase, subject to implementation and package.",
            "sources": [
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              },
              {
                "id": "ip-neobit-pat",
                "label": "Historical NeoBit Charge-Retention Patent",
                "url": "https://patents.google.com/patent/US6914825B2/en",
                "kind": "Public Patent",
                "date": "2005-07-05",
                "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
              },
              {
                "id": "ip-neobit-link",
                "label": "Official NeoBit-to-Patent Link",
                "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                "kind": "Primary Technical Source",
                "date": "2005-10-04",
                "locator": "Second body paragraph: patent title and inventors",
                "limit": "Direct historical association between NeoBit and the named patent."
              },
              {
                "id": "ip-neobit-uv",
                "label": "Published NeoBit UV-Erase Boundary",
                "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                "kind": "Primary Technical Source",
                "date": "2021; filename version 2021-03-30",
                "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                "limit": "UV erase was published; this does not make every current package UV erasable."
              },
              {
                "id": "ip-neobit-pgm-pat",
                "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                "url": "https://patents.google.com/patent/US6678190B2/en",
                "kind": "Public Patent",
                "date": "2004-01-13",
                "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
              },
              {
                "id": "ip-neobit-io-pat",
                "label": "I/O-Device Single-Poly NVM Patent",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Public Patent",
                "date": "2005-07-19",
                "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
              },
              {
                "id": "ip-neobit-eetimes-2003",
                "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                "kind": "Primary Technical Source",
                "date": "2003-11-05",
                "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
              },
              {
                "id": "ip-neobit-io-pgm-author",
                "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Architecture-class Reference",
                "date": "reviewed 2026-09-11",
                "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Normal OTP operating boundary",
                "summary": "The normal OTP interface lacks electrical erase. This does not imply physical irreversibility: the 2021 brief lists UV erase, subject to implementation and package.",
                "frames": [
                  {
                    "id": "neobit-erase-1",
                    "title": "Programmed State",
                    "state": "After programming: FG retains Q−.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "After programming: FG retains Q−.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-erase-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-erase-0-en-title\">NeoBit — Erase Boundary — Programmed State</title><defs><marker id=\"emip-neobit-erase-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG retains stored negative charge</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-erase-2",
                    "title": "Normal Operating Boundary",
                    "state": "Boundary: normal OTP operation provides no electrical erase path.",
                    "stimulus": "Boundary: normal OTP operation provides no electrical erase path.",
                    "caption": "Boundary: normal OTP operation provides no electrical erase path.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-erase-1-en-title\">NeoBit — Erase Boundary — Normal Operating Boundary</title><defs><marker id=\"emip-neobit-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><circle cx=\"498\" cy=\"186\" r=\"18\" fill=\"#fff\" stroke=\"#bd354a\" stroke-width=\"3\"/><path d=\"M486 198l24 -24\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Normal interface: no electrical erase</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-erase-3",
                    "title": "Historical UV Boundary",
                    "state": "Historical exception: UV erase was published; package support is not implied.",
                    "stimulus": "No normal electrical erase stimulus; this frame explains the operating boundary.",
                    "caption": "Historical exception: UV erase was published; package support is not implied.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-erase-2-en-title\">NeoBit — Erase Boundary — Historical UV Boundary</title><defs><marker id=\"emip-neobit-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-erase-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><text x=\"496\" y=\"173\" text-anchor=\"middle\" fill=\"#7e4ba8\" font-size=\"22\" font-weight=\"600\">UV*</text><path d=\"M484 185L420 199M481 200L422 208\" fill=\"none\" stroke=\"#7e4ba8\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"5 5\"/><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">UV*: historical option; check package</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG has no DC terminal. Q− follows the historical p+ charge model, including localized negative ionic charge."
                  },
                  {
                    "symbol": "UV*",
                    "meaning": "The 2021 brief lists UV erase. Normal OTP lacks electrical erase; UV access depends on implementation and package."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  },
                  {
                    "id": "ip-neobit-pat",
                    "label": "Historical NeoBit Charge-Retention Patent",
                    "url": "https://patents.google.com/patent/US6914825B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-05",
                    "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                    "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
                  },
                  {
                    "id": "ip-neobit-link",
                    "label": "Official NeoBit-to-Patent Link",
                    "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                    "kind": "Primary Technical Source",
                    "date": "2005-10-04",
                    "locator": "Second body paragraph: patent title and inventors",
                    "limit": "Direct historical association between NeoBit and the named patent."
                  },
                  {
                    "id": "ip-neobit-uv",
                    "label": "Published NeoBit UV-Erase Boundary",
                    "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                    "kind": "Primary Technical Source",
                    "date": "2021; filename version 2021-03-30",
                    "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                    "limit": "UV erase was published; this does not make every current package UV erasable."
                  },
                  {
                    "id": "ip-neobit-pgm-pat",
                    "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                    "url": "https://patents.google.com/patent/US6678190B2/en",
                    "kind": "Public Patent",
                    "date": "2004-01-13",
                    "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                    "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
                  },
                  {
                    "id": "ip-neobit-io-pat",
                    "label": "I/O-Device Single-Poly NVM Patent",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-19",
                    "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                    "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
                  },
                  {
                    "id": "ip-neobit-eetimes-2003",
                    "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                    "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                    "kind": "Primary Technical Source",
                    "date": "2003-11-05",
                    "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                    "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
                  },
                  {
                    "id": "ip-neobit-io-pgm-author",
                    "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Architecture-class Reference",
                    "date": "reviewed 2026-09-11",
                    "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                    "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
                  }
                ],
                "caveat": "Do not draw oxide rupture, a permanent filament or nMOS CHE; do not invent voltages or universal current p+ doping. SL, SG/WL, BL and NW; FG floats. SG is separate from FG; capacitive BL coupling is not a DC connection."
              }
            ]
          },
          {
            "topicId": "ip-neobit",
            "operationId": "read",
            "title": "NeoBit — Read",
            "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
            "sources": [
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              },
              {
                "id": "ip-neobit-pat",
                "label": "Historical NeoBit Charge-Retention Patent",
                "url": "https://patents.google.com/patent/US6914825B2/en",
                "kind": "Public Patent",
                "date": "2005-07-05",
                "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
              },
              {
                "id": "ip-neobit-link",
                "label": "Official NeoBit-to-Patent Link",
                "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                "kind": "Primary Technical Source",
                "date": "2005-10-04",
                "locator": "Second body paragraph: patent title and inventors",
                "limit": "Direct historical association between NeoBit and the named patent."
              },
              {
                "id": "ip-neobit-uv",
                "label": "Published NeoBit UV-Erase Boundary",
                "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                "kind": "Primary Technical Source",
                "date": "2021; filename version 2021-03-30",
                "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                "limit": "UV erase was published; this does not make every current package UV erasable."
              },
              {
                "id": "ip-neobit-pgm-pat",
                "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                "url": "https://patents.google.com/patent/US6678190B2/en",
                "kind": "Public Patent",
                "date": "2004-01-13",
                "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
              },
              {
                "id": "ip-neobit-io-pat",
                "label": "I/O-Device Single-Poly NVM Patent",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Public Patent",
                "date": "2005-07-19",
                "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
              },
              {
                "id": "ip-neobit-eetimes-2003",
                "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                "kind": "Primary Technical Source",
                "date": "2003-11-05",
                "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
              },
              {
                "id": "ip-neobit-io-pgm-author",
                "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                "url": "https://patents.google.com/patent/US6920067B2/en",
                "kind": "Architecture-class Reference",
                "date": "reviewed 2026-09-11",
                "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Channel-current sensing",
                "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
                "frames": [
                  {
                    "id": "neobit-read-1",
                    "title": "Retained State",
                    "state": "Hold: FG charge is unchanged before reading.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Hold: FG charge is unchanged before reading.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-read-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-read-0-en-title\">NeoBit — Read — Retained State</title><defs><marker id=\"emip-neobit-read-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Low-field sensing; state retained</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-read-2",
                    "title": "Select the Cell",
                    "state": "Stimulus: select the cell with low-field read conditions.",
                    "stimulus": "Stimulus: select the cell with low-field read conditions.",
                    "caption": "Stimulus: select the cell with low-field read conditions.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-read-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-read-1-en-title\">NeoBit — Read — Select the Cell</title><defs><marker id=\"emip-neobit-read-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><path d=\"M106 237H401\" fill=\"none\" stroke=\"#087968\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M143 286H398\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neobit-read-1-en-i)\"/><text x=\"268\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Low-field sensing; state retained</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-read-3",
                    "title": "Sense the Path",
                    "state": "Path: holes flow along the p-channel; FG charge is not discharged into BL.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Path: holes flow along the p-channel; FG charge is not discharged into BL.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-read-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-read-2-en-title\">NeoBit — Read — Sense the Path</title><defs><marker id=\"emip-neobit-read-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" 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                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
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                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  },
                  {
                    "id": "neobit-read-4",
                    "title": "Compare the Result",
                    "state": "Result: sense channel current; the macro defines the 0/1 mapping.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: sense channel current; the macro defines the 0/1 mapping.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neobit-read-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neobit-read-3-en-title\">NeoBit — Read — Compare the Result</title><defs><marker id=\"emip-neobit-read-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neobit-read-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical pMOS Cell Section</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" 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font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><text x=\"326\" y=\"155\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+ FG</text><text x=\"326\" y=\"202\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">Q−</text><path d=\"M106 237H401\" fill=\"none\" stroke=\"#087968\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M143 286H398\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neobit-read-3-en-i)\"/><text x=\"268\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><circle data-charge=\"mobile\" cx=\"171\" cy=\"240\" r=\"11\" fill=\"#bd354a\"/><text x=\"171\" y=\"248\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><circle data-charge=\"mobile\" cx=\"309\" cy=\"240\" r=\"11\" fill=\"#bd354a\"/><text x=\"309\" y=\"248\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R(Q−) &gt; I_R(Q low)</text></svg>",
                    "sourceIds": [
                      "ip-neobit",
                      "ip-neobit-pat",
                      "ip-neobit-link",
                      "ip-neobit-uv",
                      "ip-neobit-pgm-pat",
                      "ip-neobit-io-pat",
                      "ip-neobit-eetimes-2003",
                      "ip-neobit-io-pgm-author"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG has no DC terminal. Q− follows the historical p+ charge model, including localized negative ionic charge."
                  },
                  {
                    "symbol": "UV*",
                    "meaning": "The 2021 brief lists UV erase. Normal OTP lacks electrical erase; UV access depends on implementation and package."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  },
                  {
                    "id": "ip-neobit-pat",
                    "label": "Historical NeoBit Charge-Retention Patent",
                    "url": "https://patents.google.com/patent/US6914825B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-05",
                    "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
                    "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
                  },
                  {
                    "id": "ip-neobit-link",
                    "label": "Official NeoBit-to-Patent Link",
                    "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
                    "kind": "Primary Technical Source",
                    "date": "2005-10-04",
                    "locator": "Second body paragraph: patent title and inventors",
                    "limit": "Direct historical association between NeoBit and the named patent."
                  },
                  {
                    "id": "ip-neobit-uv",
                    "label": "Published NeoBit UV-Erase Boundary",
                    "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
                    "kind": "Primary Technical Source",
                    "date": "2021; filename version 2021-03-30",
                    "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
                    "limit": "UV erase was published; this does not make every current package UV erasable."
                  },
                  {
                    "id": "ip-neobit-pgm-pat",
                    "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
                    "url": "https://patents.google.com/patent/US6678190B2/en",
                    "kind": "Public Patent",
                    "date": "2004-01-13",
                    "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
                    "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
                  },
                  {
                    "id": "ip-neobit-io-pat",
                    "label": "I/O-Device Single-Poly NVM Patent",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Public Patent",
                    "date": "2005-07-19",
                    "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
                    "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
                  },
                  {
                    "id": "ip-neobit-eetimes-2003",
                    "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
                    "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
                    "kind": "Primary Technical Source",
                    "date": "2003-11-05",
                    "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
                    "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
                  },
                  {
                    "id": "ip-neobit-io-pgm-author",
                    "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
                    "url": "https://patents.google.com/patent/US6920067B2/en",
                    "kind": "Architecture-class Reference",
                    "date": "reviewed 2026-09-11",
                    "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
                    "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
                  }
                ],
                "caveat": "Do not draw oxide rupture, a permanent filament or nMOS CHE; do not invent voltages or universal current p+ doping. SL, SG/WL, BL and NW; FG floats. SG is separate from FG; capacitive BL coupling is not a DC connection."
              }
            ]
          }
        ]
      },
      {
        "id": "neofuse",
        "title": "NeoFuse: Gate-Dielectric Antifuse OTP Cell",
        "shortTitle": "NeoFuse · Antifuse OTP",
        "vendor": "eMemory",
        "group": "otp",
        "hostTopic": "antifuse",
        "summary": "Start at the n-type cell's gate dielectric and follow high-field defect creation, changes in effective tunneling distance and the gate current used for sensing.",
        "program": "High-field dielectric defect generation",
        "reverse": "No restoration of the pristine dielectric in normal use",
        "readout": "Gate current through the dielectric",
        "lesson": "The storage event changes dielectric conduction. An ideal short does not explain the ultrathin-dielectric physics. Selection and regulation transistors support array operation; defects and tunneling in the storage region create the programmed read-current difference.",
        "structure": {
          "title": "NeoFuse — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-structure-0-en-title\">NeoFuse — Cell Structure</title><defs><marker id=\"emip-neofuse-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-structure-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-structure-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">REG</text><text x=\"334\" y=\"251\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"458\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">nFET</text><path d=\"M22 258H43M140 258H168M266 258H308\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"25\" y=\"220\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M91 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"91\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S_CTL</text><path d=\"M217 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"217\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R_CTL</text><rect x=\"334\" y=\"158\" width=\"132\" height=\"65\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"334\" y=\"117\" width=\"132\" height=\"41\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M399 87V117\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"399\" y=\"74\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AF</text><text x=\"283\" y=\"151\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Storage</text><text x=\"283\" y=\"178\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M291 171H328\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-defect=\"oxide\" cx=\"349\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"365\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Public-source reconstruction; not to scale</text></svg>",
          "caption": "Storage uses an nFET gate dielectric and gate-current sensing. Published 3T adds regulation; show selection, regulation and antifuse functions with conceptual connectivity. The programmed dielectric-defect state persists; data is not an FG electron count.",
          "legend": [
            {
              "symbol": "e− / h+",
              "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
            },
            {
              "symbol": "I",
              "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
            },
            {
              "symbol": "Bias",
              "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
            },
            {
              "symbol": "Scale",
              "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
            },
            {
              "symbol": "DT / 3T",
              "meaning": "DT describes direct tunneling through a shorter effective barrier after defect generation. SEL/REG are published functions; the related patent is not a verified current NeoFuse netlist."
            }
          ],
          "sourceIds": [
            "ip-neofuse",
            "ip-neofuse-dt",
            "ip-neofuse-3t",
            "ip-neofuse-pat",
            "ip-neofuse-9v-2016"
          ]
        },
        "operations": [
          {
            "topicId": "ip-neofuse",
            "operationId": "write",
            "title": "NeoFuse — Program",
            "summary": "Carriers: defects shorten the effective barrier; electrons tunnel across it.",
            "sources": [
              {
                "id": "ip-neofuse",
                "label": "NeoFuse Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
              },
              {
                "id": "ip-neofuse-dt",
                "label": "Quantum Tunneling Mechanism in NeoFuse",
                "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                "kind": "Primary Technical Source",
                "date": "2021-01-19",
                "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
              },
              {
                "id": "ip-neofuse-3t",
                "label": "Named NeoFuse Three-Transistor Architecture",
                "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                "kind": "Officially Reposted Executive Interview",
                "date": "2024-12-09",
                "locator": "NeoFuse: patented 3T design and regulating transistor",
                "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
              },
              {
                "id": "ip-neofuse-pat",
                "label": "Related Three-Transistor Antifuse Patent",
                "url": "https://patents.google.com/patent/US20250024668A1/en",
                "kind": "Public Patent",
                "date": "2025-01-16",
                "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
              },
              {
                "id": "ip-neofuse-9v-2016",
                "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                "kind": "Primary Technical Source",
                "date": "2016-01-14",
                "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "High-field defect generation and enhanced tunneling",
                "summary": "Carriers: defects shorten the effective barrier; electrons tunnel across it.",
                "frames": [
                  {
                    "id": "neofuse-write-1",
                    "title": "Initial State",
                    "state": "Initial: few dielectric defects and low gate current.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: few dielectric defects and low gate current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-write-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-write-0-en-title\">NeoFuse — Program — Initial State</title><defs><marker id=\"emip-neofuse-write-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">REG</text><text x=\"334\" y=\"251\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"458\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">nFET</text><path d=\"M22 258H43M140 258H168M266 258H308\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"25\" y=\"220\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M91 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"91\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S_CTL</text><path d=\"M217 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"217\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R_CTL</text><rect x=\"334\" y=\"158\" width=\"132\" height=\"65\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"334\" y=\"117\" width=\"132\" height=\"41\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M399 87V117\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"399\" y=\"74\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AF</text><text x=\"283\" y=\"151\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Storage</text><text x=\"283\" y=\"178\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M291 171H328\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-defect=\"oxide\" cx=\"346\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Before the programming pulse</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  },
                  {
                    "id": "neofuse-write-2",
                    "title": "Apply Conditions",
                    "state": "Stimulus: selection/regulation establishes high dielectric field.",
                    "stimulus": "Stimulus: selection/regulation establishes high dielectric field.",
                    "caption": "Stimulus: selection/regulation establishes high dielectric field.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-write-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-write-1-en-title\">NeoFuse — Program — Apply Conditions</title><defs><marker id=\"emip-neofuse-write-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" 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x=\"495\" y=\"204\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">DT</text><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select and establish program field</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  },
                  {
                    "id": "neofuse-write-3",
                    "title": "Carrier Motion",
                    "state": "Carriers: defects shorten the effective barrier; electrons tunnel across it.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: defects shorten the effective barrier; electrons tunnel across it.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-write-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-write-2-en-title\">NeoFuse — Program — Carrier Motion</title><defs><marker id=\"emip-neofuse-write-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" 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                      "ip-neofuse-dt",
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                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
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                  },
                  {
                    "id": "neofuse-write-4",
                    "title": "Retained Result",
                    "state": "Hold: the defect state remains after stress removal.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Hold: the defect state remains after stress removal.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-write-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-write-3-en-title\">NeoFuse — Program — Retained Result</title><defs><marker id=\"emip-neofuse-write-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-write-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" 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fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">State persists after stimulus removal</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "DT / 3T",
                    "meaning": "DT describes direct tunneling through a shorter effective barrier after defect generation. SEL/REG are published functions; the related patent is not a verified current NeoFuse netlist."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neofuse",
                    "label": "NeoFuse Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
                  },
                  {
                    "id": "ip-neofuse-dt",
                    "label": "Quantum Tunneling Mechanism in NeoFuse",
                    "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                    "kind": "Primary Technical Source",
                    "date": "2021-01-19",
                    "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                    "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
                  },
                  {
                    "id": "ip-neofuse-3t",
                    "label": "Named NeoFuse Three-Transistor Architecture",
                    "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                    "kind": "Officially Reposted Executive Interview",
                    "date": "2024-12-09",
                    "locator": "NeoFuse: patented 3T design and regulating transistor",
                    "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
                  },
                  {
                    "id": "ip-neofuse-pat",
                    "label": "Related Three-Transistor Antifuse Patent",
                    "url": "https://patents.google.com/patent/US20250024668A1/en",
                    "kind": "Public Patent",
                    "date": "2025-01-16",
                    "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                    "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
                  },
                  {
                    "id": "ip-neofuse-9v-2016",
                    "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                    "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                    "kind": "Primary Technical Source",
                    "date": "2016-01-14",
                    "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                    "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
                  }
                ],
                "caveat": "No thick metallic short or FG storage; the damaged high-k/interfacial sublayer of current advanced processes is unverified. Antifuse gate AF, underlying Si, selection/regulation controls and BL; storage dielectric lies between AF and Si, not in the selector oxide."
              }
            ]
          },
          {
            "topicId": "ip-neofuse",
            "operationId": "erase",
            "title": "NeoFuse — Erase Boundary",
            "summary": "Normal operation has no defect-repair erase step; reducing bias does not restore the initial dielectric.",
            "sources": [
              {
                "id": "ip-neofuse",
                "label": "NeoFuse Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
              },
              {
                "id": "ip-neofuse-dt",
                "label": "Quantum Tunneling Mechanism in NeoFuse",
                "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                "kind": "Primary Technical Source",
                "date": "2021-01-19",
                "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
              },
              {
                "id": "ip-neofuse-3t",
                "label": "Named NeoFuse Three-Transistor Architecture",
                "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                "kind": "Officially Reposted Executive Interview",
                "date": "2024-12-09",
                "locator": "NeoFuse: patented 3T design and regulating transistor",
                "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
              },
              {
                "id": "ip-neofuse-pat",
                "label": "Related Three-Transistor Antifuse Patent",
                "url": "https://patents.google.com/patent/US20250024668A1/en",
                "kind": "Public Patent",
                "date": "2025-01-16",
                "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
              },
              {
                "id": "ip-neofuse-9v-2016",
                "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                "kind": "Primary Technical Source",
                "date": "2016-01-14",
                "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Normal OTP operating boundary",
                "summary": "Normal operation has no defect-repair erase step; reducing bias does not restore the initial dielectric.",
                "frames": [
                  {
                    "id": "neofuse-erase-1",
                    "title": "Programmed State",
                    "state": "After programming: the defect state has changed.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "After programming: the defect state has changed.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-erase-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-erase-0-en-title\">NeoFuse — Erase Boundary — Programmed State</title><defs><marker id=\"emip-neofuse-erase-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" 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font-weight=\"600\">R_CTL</text><rect x=\"334\" y=\"158\" width=\"132\" height=\"65\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"334\" y=\"117\" width=\"132\" height=\"41\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M399 87V117\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"399\" y=\"74\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AF</text><text x=\"283\" y=\"151\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Storage</text><text x=\"283\" y=\"178\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M291 171H328\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-defect=\"oxide\" cx=\"349\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"365\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">OTP: the defect state persists</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  },
                  {
                    "id": "neofuse-erase-2",
                    "title": "Normal Operating Boundary",
                    "state": "Boundary: ordinary bias does not repair the dielectric.",
                    "stimulus": "Boundary: ordinary bias does not repair the dielectric.",
                    "caption": "Boundary: ordinary bias does not repair the dielectric.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-erase-1-en-title\">NeoFuse — Erase Boundary — Normal Operating Boundary</title><defs><marker id=\"emip-neofuse-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" 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fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><circle cx=\"513\" cy=\"182\" r=\"18\" fill=\"#fff\" stroke=\"#bd354a\" stroke-width=\"3\"/><path d=\"M501 194l24 -24\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Normal bias does not repair dielectric</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  },
                  {
                    "id": "neofuse-erase-3",
                    "title": "Persistent State",
                    "state": "Result: normal use retains the OTP state.",
                    "stimulus": "No normal electrical erase stimulus; this frame explains the operating boundary.",
                    "caption": "Result: normal use retains the OTP state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-erase-2-en-title\">NeoFuse — Erase Boundary — Persistent State</title><defs><marker id=\"emip-neofuse-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-erase-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">3T Functions and Enlarged Dielectric</text><rect x=\"43\" y=\"233\" width=\"97\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"233\" width=\"98\" height=\"53\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"308\" y=\"223\" width=\"183\" height=\"65\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"92\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL</text><text x=\"217\" y=\"266\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" 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font-weight=\"600\">R_CTL</text><rect x=\"334\" y=\"158\" width=\"132\" height=\"65\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"334\" y=\"117\" width=\"132\" height=\"41\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M399 87V117\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"399\" y=\"74\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AF</text><text x=\"283\" y=\"151\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Storage</text><text x=\"283\" y=\"178\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M291 171H328\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-defect=\"oxide\" cx=\"349\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"365\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><rect x=\"329\" y=\"153\" width=\"142\" height=\"75\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-dasharray=\"6 5\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">OTP: the defect state persists</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "DT / 3T",
                    "meaning": "DT describes direct tunneling through a shorter effective barrier after defect generation. SEL/REG are published functions; the related patent is not a verified current NeoFuse netlist."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neofuse",
                    "label": "NeoFuse Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
                  },
                  {
                    "id": "ip-neofuse-dt",
                    "label": "Quantum Tunneling Mechanism in NeoFuse",
                    "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                    "kind": "Primary Technical Source",
                    "date": "2021-01-19",
                    "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                    "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
                  },
                  {
                    "id": "ip-neofuse-3t",
                    "label": "Named NeoFuse Three-Transistor Architecture",
                    "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                    "kind": "Officially Reposted Executive Interview",
                    "date": "2024-12-09",
                    "locator": "NeoFuse: patented 3T design and regulating transistor",
                    "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
                  },
                  {
                    "id": "ip-neofuse-pat",
                    "label": "Related Three-Transistor Antifuse Patent",
                    "url": "https://patents.google.com/patent/US20250024668A1/en",
                    "kind": "Public Patent",
                    "date": "2025-01-16",
                    "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                    "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
                  },
                  {
                    "id": "ip-neofuse-9v-2016",
                    "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                    "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                    "kind": "Primary Technical Source",
                    "date": "2016-01-14",
                    "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                    "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
                  }
                ],
                "caveat": "No thick metallic short or FG storage; the damaged high-k/interfacial sublayer of current advanced processes is unverified. Antifuse gate AF, underlying Si, selection/regulation controls and BL; storage dielectric lies between AF and Si, not in the selector oxide."
              }
            ]
          },
          {
            "topicId": "ip-neofuse",
            "operationId": "read",
            "title": "NeoFuse — Read",
            "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
            "sources": [
              {
                "id": "ip-neofuse",
                "label": "NeoFuse Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
              },
              {
                "id": "ip-neofuse-dt",
                "label": "Quantum Tunneling Mechanism in NeoFuse",
                "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                "kind": "Primary Technical Source",
                "date": "2021-01-19",
                "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
              },
              {
                "id": "ip-neofuse-3t",
                "label": "Named NeoFuse Three-Transistor Architecture",
                "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                "kind": "Officially Reposted Executive Interview",
                "date": "2024-12-09",
                "locator": "NeoFuse: patented 3T design and regulating transistor",
                "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
              },
              {
                "id": "ip-neofuse-pat",
                "label": "Related Three-Transistor Antifuse Patent",
                "url": "https://patents.google.com/patent/US20250024668A1/en",
                "kind": "Public Patent",
                "date": "2025-01-16",
                "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
              },
              {
                "id": "ip-neofuse-9v-2016",
                "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                "kind": "Primary Technical Source",
                "date": "2016-01-14",
                "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Gate-current sensing",
                "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
                "frames": [
                  {
                    "id": "neofuse-read-1",
                    "title": "Retained State",
                    "state": "Compare: initial and programmed states have different defect densities.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Compare: initial and programmed states have different defect densities.",
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fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" 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                    ]
                  },
                  {
                    "id": "neofuse-read-2",
                    "title": "Select the Cell",
                    "state": "Stimulus: use read conditions below programming stress.",
                    "stimulus": "Stimulus: use read conditions below programming stress.",
                    "caption": "Stimulus: use read conditions below programming stress.",
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d=\"M422 144V275H281\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neofuse-read-1-en-i)\"/><text x=\"400\" y=\"321\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_GATE</text><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Low-field sensing; state retained</text></svg>",
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                      "ip-neofuse",
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                  },
                  {
                    "id": "neofuse-read-3",
                    "title": "Sense the Path",
                    "state": "Path: sense gate current; Si-to-AF electrons oppose conventional current.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Path: sense gate current; Si-to-AF electrons oppose conventional current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neofuse-read-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neofuse-read-2-en-title\">NeoFuse — Read — Sense the Path</title><defs><marker id=\"emip-neofuse-read-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-read-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neofuse-read-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" 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                  },
                  {
                    "id": "neofuse-read-4",
                    "title": "Compare the Result",
                    "state": "Result: compare with a current reference without resetting defects.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: compare with a current reference without resetting defects.",
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font-weight=\"600\">REG</text><text x=\"334\" y=\"251\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"458\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">nFET</text><path d=\"M22 258H43M140 258H168M266 258H308\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"25\" y=\"220\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M91 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"91\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S_CTL</text><path d=\"M217 220V233\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"217\" y=\"207\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R_CTL</text><rect x=\"334\" y=\"158\" width=\"132\" height=\"65\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"334\" y=\"117\" width=\"132\" height=\"41\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M399 87V117\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"399\" y=\"74\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AF</text><text x=\"283\" y=\"151\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Storage</text><text x=\"283\" y=\"178\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M291 171H328\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle data-defect=\"oxide\" cx=\"349\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"365\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"432\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"450\" cy=\"173\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"346\" cy=\"185\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"188\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"351\" cy=\"208\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"372\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"431\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"451\" cy=\"209\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"367\" cy=\"189\" r=\"3.6\" fill=\"#a45410\"/><circle data-defect=\"oxide\" cx=\"434\" cy=\"194\" r=\"3.6\" fill=\"#a45410\"/><path d=\"M382 245V142\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neofuse-read-3-en-e)\"/><path d=\"M422 144V275H281\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neofuse-read-3-en-i)\"/><circle data-charge=\"mobile\" cx=\"382\" cy=\"190\" r=\"11\" fill=\"#075f9d\"/><text x=\"382\" y=\"198\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"400\" y=\"321\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_GATE</text><text x=\"280\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SEL / REG: functions, not a current netlist</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_GATE: low / high</text></svg>",
                    "sourceIds": [
                      "ip-neofuse",
                      "ip-neofuse-dt",
                      "ip-neofuse-3t",
                      "ip-neofuse-pat",
                      "ip-neofuse-9v-2016"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "DT / 3T",
                    "meaning": "DT describes direct tunneling through a shorter effective barrier after defect generation. SEL/REG are published functions; the related patent is not a verified current NeoFuse netlist."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neofuse",
                    "label": "NeoFuse Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
                  },
                  {
                    "id": "ip-neofuse-dt",
                    "label": "Quantum Tunneling Mechanism in NeoFuse",
                    "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
                    "kind": "Primary Technical Source",
                    "date": "2021-01-19",
                    "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
                    "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
                  },
                  {
                    "id": "ip-neofuse-3t",
                    "label": "Named NeoFuse Three-Transistor Architecture",
                    "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
                    "kind": "Officially Reposted Executive Interview",
                    "date": "2024-12-09",
                    "locator": "NeoFuse: patented 3T design and regulating transistor",
                    "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
                  },
                  {
                    "id": "ip-neofuse-pat",
                    "label": "Related Three-Transistor Antifuse Patent",
                    "url": "https://patents.google.com/patent/US20250024668A1/en",
                    "kind": "Public Patent",
                    "date": "2025-01-16",
                    "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
                    "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
                  },
                  {
                    "id": "ip-neofuse-9v-2016",
                    "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
                    "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
                    "kind": "Primary Technical Source",
                    "date": "2016-01-14",
                    "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
                    "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
                  }
                ],
                "caveat": "No thick metallic short or FG storage; the damaged high-k/interfacial sublayer of current advanced processes is unverified. Antifuse gate AF, underlying Si, selection/regulation controls and BL; storage dielectric lies between AF and Si, not in the selector oxide."
              }
            ]
          }
        ]
      },
      {
        "id": "kilopass-xpm",
        "title": "Kilopass XPM: Historical 2T Antifuse",
        "shortTitle": "Kilopass XPM",
        "vendor": "Kilopass; acquired by Synopsys in 2018",
        "group": "otp",
        "hostTopic": "antifuse",
        "summary": "The original patent explicitly names XPM and distinguishes the storage MOS from the select MOS.",
        "program": "High-field gate-oxide breakdown leaves a persistent conductance difference.",
        "reverse": "The normal OTP interface has no electrical erase; remapping or emulated updates do not repair the original cell.",
        "readout": "After M1 selection, BL senses low/high current through M0 gate oxide.",
        "lesson": "Learn the two transistor roles and the original XPM evidence; acquisition does not prove one cell is retained at every node.",
        "structure": {
          "title": "Kilopass XPM — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-structure-0-en-title\">Kilopass XPM — Cell Structure</title><defs><marker id=\"snip-kilopass-xpm-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical model; geometry not to scale</text></svg>",
          "caption": "Original patent Figure 1 describes XPM as storage MOS M0 plus select MOS M1. WLP drives the storage gate, WLR selects M1, and BL senses current. The enlarged M0 region shows function without inventing a second diffusion or an intermediate sense terminal.",
          "legend": [
            {
              "symbol": "e−",
              "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
            },
            {
              "symbol": "I",
              "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
            },
            {
              "symbol": "OTP",
              "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
            },
            {
              "symbol": "I_L / I_H",
              "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
            },
            {
              "symbol": "Geometry",
              "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
            },
            {
              "symbol": "M0 / M1",
              "meaning": "M0 stores and M1 selects. No sense output absent from the original is added at their internal node."
            }
          ],
          "sourceIds": [
            "ip-kilopass-xpm-2007",
            "ip-kilopass-2t-2012"
          ]
        },
        "operations": [
          {
            "topicId": "ip-kilopass-xpm",
            "operationId": "write",
            "title": "Kilopass XPM — Program",
            "summary": "Local M0 oxide breakdown creates a conductive path; electrons are illustrated from BL through M1 and silicon toward positive WLP.",
            "sources": [
              {
                "id": "ip-kilopass-xpm-2007",
                "url": "https://patents.google.com/patent/WO2007090089A2/en",
                "date": "2007-08-09",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Kilopass XPM 2T Patent Diagram",
                "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
              },
              {
                "id": "ip-kilopass-2t-2012",
                "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                "date": "2012-05-15",
                "accessedAt": "2026-09-10",
                "kind": "Republished Vendor Announcement",
                "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
              },
              {
                "id": "ip-lineage-kilopass-2018",
                "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                "date": "2018-01-10",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Kilopass",
                "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Gate-Oxide Breakdown",
                "summary": "Local M0 oxide breakdown creates a conductive path; electrons are illustrated from BL through M1 and silicon toward positive WLP.",
                "frames": [
                  {
                    "id": "intact",
                    "title": "Initial State",
                    "state": "Gate oxide is intact; M0 has low gate-to-silicon leakage and M1 is not yet selected.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "Gate oxide is intact; M0 has low gate-to-silicon leakage and M1 is not yet selected.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-write-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-write-0-en-title\">Kilopass XPM — Program — Initial State</title><defs><marker id=\"snip-kilopass-xpm-write-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-write-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Intact oxide; initially low leakage</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "stress",
                    "title": "Establish Program Field",
                    "state": "Apply positive programming bias at WLP, select M1 through WLR, and hold BL low to stress M0 gate oxide.",
                    "stimulus": "Apply positive programming bias at WLP, select M1 through WLR, and hold BL low to stress M0 gate oxide.",
                    "caption": "Apply positive programming bias at WLP, select M1 through WLR, and hold BL low to stress M0 gate oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-write-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-write-1-en-title\">Kilopass XPM — Program — Establish Program Field</title><defs><marker id=\"snip-kilopass-xpm-write-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-write-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"489\" y=\"104\" text-anchor=\"middle\" fill=\"#a45410\" font-size=\"22\" font-weight=\"600\">+</text><text x=\"43\" y=\"270\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"176\" y=\"320\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Increase oxide field before breakdown</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "breakdown",
                    "title": "Oxide Breakdown",
                    "state": "Local M0 oxide breakdown creates a conductive path; electrons are illustrated from BL through M1 and silicon toward positive WLP.",
                    "stimulus": "Apply positive programming bias at WLP, select M1 through WLR, and hold BL low to stress M0 gate oxide.",
                    "caption": "Local M0 oxide breakdown creates a conductive path; electrons are illustrated from BL through M1 and silicon toward positive WLP.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-write-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-write-2-en-title\">Kilopass XPM — Program — Oxide Breakdown</title><defs><marker id=\"snip-kilopass-xpm-write-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-write-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 244H388V126\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-write-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"388\" cy=\"184\" r=\"10\" fill=\"#075f9d\"/><text x=\"388\" y=\"191\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"70\" y=\"313\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Local oxide breakdown; electron motion</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "retained",
                    "title": "Retained Result",
                    "state": "After the pulse, the oxide conductance difference persists; the stored quantity is the oxide state.",
                    "stimulus": "Remove programming bias.",
                    "caption": "After the pulse, the oxide conductance difference persists; the stored quantity is the oxide state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-write-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-write-3-en-title\">Kilopass XPM — Program — Retained Result</title><defs><marker id=\"snip-kilopass-xpm-write-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-write-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pulse removed; conductive state remains</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "M0 / M1",
                    "meaning": "M0 stores and M1 selects. No sense output absent from the original is added at their internal node."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-kilopass-xpm-2007",
                    "url": "https://patents.google.com/patent/WO2007090089A2/en",
                    "date": "2007-08-09",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Kilopass XPM 2T Patent Diagram",
                    "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                    "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
                  },
                  {
                    "id": "ip-kilopass-2t-2012",
                    "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                    "date": "2012-05-15",
                    "accessedAt": "2026-09-10",
                    "kind": "Republished Vendor Announcement",
                    "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                    "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                    "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
                  },
                  {
                    "id": "ip-lineage-kilopass-2018",
                    "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                    "date": "2018-01-10",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Kilopass",
                    "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                    "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "Uses Figure 1 explicitly named XPM in the 2007 patent and the 2012 product announcement. Later self-sensing, latch and 3T drawings are excluded. Positive WLP and low BL define this nMOS teaching branch; read uses lower stress without implementation voltages. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          },
          {
            "topicId": "ip-kilopass-xpm",
            "operationId": "erase",
            "title": "Kilopass XPM — Erase Boundary",
            "summary": "Normal OTP provides no electrical erase; an ordinary reverse operation cannot restore the unprogrammed cell.",
            "sources": [
              {
                "id": "ip-kilopass-xpm-2007",
                "url": "https://patents.google.com/patent/WO2007090089A2/en",
                "date": "2007-08-09",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Kilopass XPM 2T Patent Diagram",
                "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
              },
              {
                "id": "ip-kilopass-2t-2012",
                "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                "date": "2012-05-15",
                "accessedAt": "2026-09-10",
                "kind": "Republished Vendor Announcement",
                "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
              },
              {
                "id": "ip-lineage-kilopass-2018",
                "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                "date": "2018-01-10",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Kilopass",
                "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Normal OTP Operating Boundary",
                "summary": "Normal OTP provides no electrical erase; an ordinary reverse operation cannot restore the unprogrammed cell.",
                "frames": [
                  {
                    "id": "programmed",
                    "title": "Programmed State",
                    "state": "The programmed local oxide conduction state remains.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "The programmed local oxide conduction state remains.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-erase-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-erase-0-en-title\">Kilopass XPM — Erase Boundary — Programmed State</title><defs><marker id=\"snip-kilopass-xpm-erase-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-erase-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">No electrical erase; original cell retained</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "no-erase",
                    "title": "Normal Operating Boundary",
                    "state": "The normal OTP interface has no electrical erase procedure that repairs gate oxide.",
                    "stimulus": "No normal electrical erase stimulus.",
                    "caption": "The normal OTP interface has no electrical erase procedure that repairs gate oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-erase-1-en-title\">Kilopass XPM — Erase Boundary — Normal Operating Boundary</title><defs><marker id=\"snip-kilopass-xpm-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"497\" cy=\"176\" r=\"18\" fill=\"#fff\" stroke=\"#bd354a\" stroke-width=\"3\"/><path d=\"M485 188l24 -24\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Normal operation cannot repair oxide</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "persistent",
                    "title": "Persistent State",
                    "state": "The original cell remains programmed; spare bits, remapping or eMTP emulated updates are system methods.",
                    "stimulus": "No normal electrical erase stimulus.",
                    "caption": "The original cell remains programmed; spare bits, remapping or eMTP emulated updates are system methods.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-erase-2-en-title\">Kilopass XPM — Erase Boundary — Persistent State</title><defs><marker id=\"snip-kilopass-xpm-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"322\" y=\"147\" width=\"155\" height=\"60\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-dasharray=\"6 5\"/><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">No electrical erase; original cell retained</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "M0 / M1",
                    "meaning": "M0 stores and M1 selects. No sense output absent from the original is added at their internal node."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-kilopass-xpm-2007",
                    "url": "https://patents.google.com/patent/WO2007090089A2/en",
                    "date": "2007-08-09",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Kilopass XPM 2T Patent Diagram",
                    "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                    "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
                  },
                  {
                    "id": "ip-kilopass-2t-2012",
                    "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                    "date": "2012-05-15",
                    "accessedAt": "2026-09-10",
                    "kind": "Republished Vendor Announcement",
                    "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                    "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                    "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
                  },
                  {
                    "id": "ip-lineage-kilopass-2018",
                    "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                    "date": "2018-01-10",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Kilopass",
                    "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                    "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "Uses Figure 1 explicitly named XPM in the 2007 patent and the 2012 product announcement. Later self-sensing, latch and 3T drawings are excluded. Positive WLP and low BL define this nMOS teaching branch; read uses lower stress without implementation voltages. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          },
          {
            "topicId": "ip-kilopass-xpm",
            "operationId": "read",
            "title": "Kilopass XPM — Read",
            "summary": "The sense amplifier compares low/high BL current. The macro defines 0/1 coding; read does not repair the oxide.",
            "sources": [
              {
                "id": "ip-kilopass-xpm-2007",
                "url": "https://patents.google.com/patent/WO2007090089A2/en",
                "date": "2007-08-09",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Kilopass XPM 2T Patent Diagram",
                "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
              },
              {
                "id": "ip-kilopass-2t-2012",
                "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                "date": "2012-05-15",
                "accessedAt": "2026-09-10",
                "kind": "Republished Vendor Announcement",
                "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
              },
              {
                "id": "ip-lineage-kilopass-2018",
                "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                "date": "2018-01-10",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Kilopass",
                "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Oxide-Conduction Current Sensing",
                "summary": "The sense amplifier compares low/high BL current. The macro defines 0/1 coding; read does not repair the oxide.",
                "frames": [
                  {
                    "id": "hold",
                    "title": "Retained State",
                    "state": "The illustrated programmed cell retains its conductive oxide state without a read stimulus.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "The illustrated programmed cell retains its conductive oxide state without a read stimulus.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-read-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-read-0-en-title\">Kilopass XPM — Read — Retained State</title><defs><marker id=\"snip-kilopass-xpm-read-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-read-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "select",
                    "title": "Establish Read Conditions",
                    "state": "WLR selects M1; WLP and BL establish lower-stress read conditions.",
                    "stimulus": "WLR selects M1; WLP and BL establish lower-stress read conditions.",
                    "caption": "WLR selects M1; WLP and BL establish lower-stress read conditions.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-read-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-read-1-en-title\">Kilopass XPM — Read — Establish Read Conditions</title><defs><marker id=\"snip-kilopass-xpm-read-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-read-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M408 125V239H45\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-read-1-en-i)\"/><text x=\"62\" y=\"312\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"111\" y=\"312\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "sense",
                    "title": "Sense the Path",
                    "state": "For the illustrated positive WLP and low BL, conventional current flows through oxide, silicon and M1 toward BL; electrons move oppositely.",
                    "stimulus": "WLR selects M1; WLP and BL establish lower-stress read conditions.",
                    "caption": "For the illustrated positive WLP and low BL, conventional current flows through oxide, silicon and M1 toward BL; electrons move oppositely.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-read-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-read-2-en-title\">Kilopass XPM — Read — Sense the Path</title><defs><marker id=\"snip-kilopass-xpm-read-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-read-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M408 125V239H45\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-read-2-en-i)\"/><path d=\"M50 254H387V125\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-read-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"387\" cy=\"183\" r=\"10\" fill=\"#075f9d\"/><text x=\"387\" y=\"190\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"62\" y=\"312\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"111\" y=\"312\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  },
                  {
                    "id": "compare",
                    "title": "Compare the Result",
                    "state": "The sense amplifier compares low/high BL current. The macro defines 0/1 coding; read does not repair the oxide.",
                    "stimulus": "Complete sensing and interpret using macro logic.",
                    "caption": "The sense amplifier compares low/high BL current. The macro defines 0/1 coding; read does not repair the oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-kilopass-xpm-read-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-kilopass-xpm-read-3-en-title\">Kilopass XPM — Read — Compare the Result</title><defs><marker id=\"snip-kilopass-xpm-read-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-kilopass-xpm-read-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">XPM: M0 Storage + M1 Selection</text><rect x=\"328\" y=\"201\" width=\"143\" height=\"97\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"328\" y=\"153\" width=\"143\" height=\"48\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><rect x=\"328\" y=\"108\" width=\"143\" height=\"45\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"124\" y=\"220\" width=\"104\" height=\"78\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"176\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M1</text><text x=\"435\" y=\"282\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"434\" y=\"138\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">M0</text><path d=\"M43 241H124M228 241H328M400 73V108M176 169V220\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"44\" y=\"211\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"400\" y=\"63\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLP</text><text x=\"176\" y=\"159\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WLR</text><text x=\"296\" y=\"183\" text-anchor=\"end\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate oxide</text><path d=\"M301 176H323\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"385\" y=\"153\" width=\"26\" height=\"48\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M398 153l-5 11.52l10 12l-10 12.48L398 201\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M408 125V239H45\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-read-3-en-i)\"/><path d=\"M50 254H387V125\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-kilopass-xpm-read-3-en-e)\"/><circle data-charge=\"mobile\" cx=\"387\" cy=\"183\" r=\"10\" fill=\"#075f9d\"/><text x=\"387\" y=\"190\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"62\" y=\"312\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"111\" y=\"312\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"48\" y=\"87\" text-anchor=\"start\" fill=\"#607486\" font-size=\"22\" font-weight=\"600\">I_L</text><path d=\"M99 80h20\" fill=\"none\" stroke=\"#607486\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"48\" y=\"117\" text-anchor=\"start\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I_H</text><path d=\"M99 110h85\" fill=\"none\" stroke=\"#087968\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL — M1 — M0 internal node</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I: low / high → sense</text></svg>",
                    "sourceIds": [
                      "ip-kilopass-xpm-2007",
                      "ip-kilopass-2t-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "M0 / M1",
                    "meaning": "M0 stores and M1 selects. No sense output absent from the original is added at their internal node."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-kilopass-xpm-2007",
                    "url": "https://patents.google.com/patent/WO2007090089A2/en",
                    "date": "2007-08-09",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Kilopass XPM 2T Patent Diagram",
                    "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
                    "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
                  },
                  {
                    "id": "ip-kilopass-2t-2012",
                    "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
                    "date": "2012-05-15",
                    "accessedAt": "2026-09-10",
                    "kind": "Republished Vendor Announcement",
                    "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
                    "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
                    "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
                  },
                  {
                    "id": "ip-lineage-kilopass-2018",
                    "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
                    "date": "2018-01-10",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Kilopass",
                    "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
                    "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "Uses Figure 1 explicitly named XPM in the 2007 patent and the 2012 product announcement. Later self-sensing, latch and 3T drawings are excluded. Positive WLP and low BL define this nMOS teaching branch; read uses lower stress without implementation voltages. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          }
        ]
      },
      {
        "id": "sidense-1t-fuse",
        "title": "Sidense 1T-Fuse: Split-Channel Antifuse",
        "shortTitle": "Sidense 1T-Fuse",
        "vendor": "Sidense; acquired by Synopsys in 2017",
        "group": "otp",
        "hostTopic": "antifuse",
        "summary": "One gate spans thick and thin oxide; persistent conduction through the thin region creates the OTP state.",
        "program": "High-field gate-oxide breakdown leaves a persistent conductance difference.",
        "reverse": "The normal OTP interface has no electrical erase; remapping or emulated updates do not repair the original cell.",
        "readout": "Sense low/high current between WL and BL at lower stress.",
        "lesson": "The thick region controls access and the thin region stores conductance; split channel means neither two gates nor a floating gate.",
        "structure": {
          "title": "Sidense 1T-Fuse — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-structure-0-en-title\">Sidense 1T-Fuse — Cell Structure</title><defs><marker id=\"snip-sidense-1t-fuse-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Historical model; geometry not to scale</text></svg>",
          "caption": "Following original-author Figure 2 from 2007, one continuous poly gate connects to WL and the sole N+ diffusion connects to BL. Thick I/O oxide lies near BL; thin core oxide lies farther away. Breakdown links the gate to the channel through the thin region. Thicknesses and paths are enlarged for readability.",
          "legend": [
            {
              "symbol": "e−",
              "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
            },
            {
              "symbol": "I",
              "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
            },
            {
              "symbol": "OTP",
              "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
            },
            {
              "symbol": "I_L / I_H",
              "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
            },
            {
              "symbol": "Geometry",
              "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
            },
            {
              "symbol": "WL / BL",
              "meaning": "WL connects to one poly gate and BL to the sole N+ diffusion. Only the thin core oxide is shown breaking down. Horizontal carrier paths are offset for readability from the under-gate surface channel; they do not indicate conduction through the p-type bulk."
            }
          ],
          "sourceIds": [
            "ip-sidense-cell-2007",
            "ip-sidense-irreversible-2017",
            "ip-sidense-patent-2006"
          ]
        },
        "operations": [
          {
            "topicId": "ip-sidense-1t-fuse",
            "operationId": "write",
            "title": "Sidense 1T-Fuse — Program",
            "summary": "The thin core oxide locally breaks down. Electrons travel from BL diffusion through the channel and the thin region toward WL; the thick oxide remains intact.",
            "sources": [
              {
                "id": "ip-sidense-cell-2007",
                "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                "date": "2007-12-18",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Original-Author Cell Section",
                "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
              },
              {
                "id": "ip-sidense-irreversible-2017",
                "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                "date": "2017-09-05",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
              },
              {
                "id": "ip-sidense-patent-2006",
                "url": "https://patents.google.com/patent/US20060244099A1/en",
                "date": "2006-11-02",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Sidense Split-Channel Antifuse Patent",
                "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
              },
              {
                "id": "ip-lineage-sidense-2017",
                "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                "date": "2017-10-17",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Sidense",
                "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Gate-Oxide Breakdown",
                "summary": "The thin core oxide locally breaks down. Electrons travel from BL diffusion through the channel and the thin region toward WL; the thick oxide remains intact.",
                "frames": [
                  {
                    "id": "intact",
                    "title": "Initial State",
                    "state": "Both thick and thin oxide beneath the single gate are intact; WL-to-BL leakage is initially low.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "Both thick and thin oxide beneath the single gate are intact; WL-to-BL leakage is initially low.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-write-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-write-0-en-title\">Sidense 1T-Fuse — Program — Initial State</title><defs><marker id=\"snip-sidense-1t-fuse-write-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-write-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Intact oxide; initially low leakage</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "stress",
                    "title": "Establish Program Field",
                    "state": "For the illustrated n-type teaching bias, raise WL and hold BL low. The thick region controls the channel while the thin region experiences stronger oxide field.",
                    "stimulus": "For the illustrated n-type teaching bias, raise WL and hold BL low. The thick region controls the channel while the thin region experiences stronger oxide field.",
                    "caption": "For the illustrated n-type teaching bias, raise WL and hold BL low. The thick region controls the channel while the thin region experiences stronger oxide field.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-write-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-write-1-en-title\">Sidense 1T-Fuse — Program — Establish Program Field</title><defs><marker id=\"snip-sidense-1t-fuse-write-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-write-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"327\" y=\"95\" text-anchor=\"middle\" fill=\"#a45410\" font-size=\"22\" font-weight=\"600\">+</text><text x=\"86\" y=\"95\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Increase oxide field before breakdown</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "breakdown",
                    "title": "Oxide Breakdown",
                    "state": "The thin core oxide locally breaks down. Electrons travel from BL diffusion through the channel and the thin region toward WL; the thick oxide remains intact.",
                    "stimulus": "For the illustrated n-type teaching bias, raise WL and hold BL low. The thick region controls the channel while the thin region experiences stronger oxide field.",
                    "caption": "The thin core oxide locally breaks down. Electrons travel from BL diffusion through the channel and the thin region toward WL; the thick oxide remains intact.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-write-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-write-2-en-title\">Sidense 1T-Fuse — Program — Oxide Breakdown</title><defs><marker id=\"snip-sidense-1t-fuse-write-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-write-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M129 191V250H387V176\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-write-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"387\" cy=\"220\" r=\"10\" fill=\"#075f9d\"/><text x=\"387\" y=\"227\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"210\" y=\"284\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Local oxide breakdown; electron motion</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "retained",
                    "title": "Retained Result",
                    "state": "After programming bias is removed, the thin region retains persistent conduction rather than charge stored inside the gate.",
                    "stimulus": "Remove programming bias.",
                    "caption": "After programming bias is removed, the thin region retains persistent conduction rather than charge stored inside the gate.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-write-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-write-3-en-title\">Sidense 1T-Fuse — Program — Retained Result</title><defs><marker id=\"snip-sidense-1t-fuse-write-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-write-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pulse removed; conductive state remains</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "WL / BL",
                    "meaning": "WL connects to one poly gate and BL to the sole N+ diffusion. Only the thin core oxide is shown breaking down. Horizontal carrier paths are offset for readability from the under-gate surface channel; they do not indicate conduction through the p-type bulk."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sidense-cell-2007",
                    "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                    "date": "2007-12-18",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Original-Author Cell Section",
                    "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                    "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
                  },
                  {
                    "id": "ip-sidense-irreversible-2017",
                    "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                    "date": "2017-09-05",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                    "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                    "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
                  },
                  {
                    "id": "ip-sidense-patent-2006",
                    "url": "https://patents.google.com/patent/US20060244099A1/en",
                    "date": "2006-11-02",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Sidense Split-Channel Antifuse Patent",
                    "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                    "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
                  },
                  {
                    "id": "ip-lineage-sidense-2017",
                    "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                    "date": "2017-10-17",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Sidense",
                    "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                    "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "The section follows the product article’s n-type structure. Positive WL and low BL define the teaching bias from which directions are inferred. Detailed voltages from the historical p-type patent example are excluded. Split channel means neither two separate gates nor a floating gate. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          },
          {
            "topicId": "ip-sidense-1t-fuse",
            "operationId": "erase",
            "title": "Sidense 1T-Fuse — Erase Boundary",
            "summary": "Normal OTP provides no electrical erase; an ordinary reverse operation cannot restore the unprogrammed cell.",
            "sources": [
              {
                "id": "ip-sidense-cell-2007",
                "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                "date": "2007-12-18",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Original-Author Cell Section",
                "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
              },
              {
                "id": "ip-sidense-irreversible-2017",
                "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                "date": "2017-09-05",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
              },
              {
                "id": "ip-sidense-patent-2006",
                "url": "https://patents.google.com/patent/US20060244099A1/en",
                "date": "2006-11-02",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Sidense Split-Channel Antifuse Patent",
                "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
              },
              {
                "id": "ip-lineage-sidense-2017",
                "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                "date": "2017-10-17",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Sidense",
                "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Normal OTP Operating Boundary",
                "summary": "Normal OTP provides no electrical erase; an ordinary reverse operation cannot restore the unprogrammed cell.",
                "frames": [
                  {
                    "id": "programmed",
                    "title": "Programmed State",
                    "state": "The programmed local oxide conduction state remains.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "The programmed local oxide conduction state remains.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-erase-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-erase-0-en-title\">Sidense 1T-Fuse — Erase Boundary — Programmed State</title><defs><marker id=\"snip-sidense-1t-fuse-erase-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-erase-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">No electrical erase; original cell retained</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "no-erase",
                    "title": "Normal Operating Boundary",
                    "state": "The normal OTP interface has no electrical erase procedure that repairs gate oxide.",
                    "stimulus": "No normal electrical erase stimulus.",
                    "caption": "The normal OTP interface has no electrical erase procedure that repairs gate oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-erase-1-en-title\">Sidense 1T-Fuse — Erase Boundary — Normal Operating Boundary</title><defs><marker id=\"snip-sidense-1t-fuse-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"517\" cy=\"188\" r=\"18\" fill=\"#fff\" stroke=\"#bd354a\" stroke-width=\"3\"/><path d=\"M505 200l24 -24\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Normal operation cannot repair oxide</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "persistent",
                    "title": "Persistent State",
                    "state": "The original cell remains programmed; spare bits, remapping or eMTP emulated updates are system methods.",
                    "stimulus": "No normal electrical erase stimulus.",
                    "caption": "The original cell remains programmed; spare bits, remapping or eMTP emulated updates are system methods.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-erase-2-en-title\">Sidense 1T-Fuse — Erase Boundary — Persistent State</title><defs><marker id=\"snip-sidense-1t-fuse-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"323\" y=\"202\" width=\"137\" height=\"34\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-dasharray=\"6 5\"/><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">No electrical erase; original cell retained</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "WL / BL",
                    "meaning": "WL connects to one poly gate and BL to the sole N+ diffusion. Only the thin core oxide is shown breaking down. Horizontal carrier paths are offset for readability from the under-gate surface channel; they do not indicate conduction through the p-type bulk."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sidense-cell-2007",
                    "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                    "date": "2007-12-18",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Original-Author Cell Section",
                    "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                    "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
                  },
                  {
                    "id": "ip-sidense-irreversible-2017",
                    "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                    "date": "2017-09-05",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                    "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                    "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
                  },
                  {
                    "id": "ip-sidense-patent-2006",
                    "url": "https://patents.google.com/patent/US20060244099A1/en",
                    "date": "2006-11-02",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Sidense Split-Channel Antifuse Patent",
                    "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                    "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
                  },
                  {
                    "id": "ip-lineage-sidense-2017",
                    "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                    "date": "2017-10-17",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Sidense",
                    "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                    "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "The section follows the product article’s n-type structure. Positive WL and low BL define the teaching bias from which directions are inferred. Detailed voltages from the historical p-type patent example are excluded. Split channel means neither two separate gates nor a floating gate. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          },
          {
            "topicId": "ip-sidense-1t-fuse",
            "operationId": "read",
            "title": "Sidense 1T-Fuse — Read",
            "summary": "Compare low/high current along the WL/BL path. The macro defines logic coding and normal read preserves the state.",
            "sources": [
              {
                "id": "ip-sidense-cell-2007",
                "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                "date": "2007-12-18",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Original-Author Cell Section",
                "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
              },
              {
                "id": "ip-sidense-irreversible-2017",
                "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                "date": "2017-09-05",
                "accessedAt": "2026-09-10",
                "kind": "Original-Author Technical Article",
                "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
              },
              {
                "id": "ip-sidense-patent-2006",
                "url": "https://patents.google.com/patent/US20060244099A1/en",
                "date": "2006-11-02",
                "accessedAt": "2026-09-10",
                "kind": "Public Patent",
                "label": "Historical Sidense Split-Channel Antifuse Patent",
                "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
              },
              {
                "id": "ip-lineage-sidense-2017",
                "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                "date": "2017-10-17",
                "accessedAt": "2026-09-10",
                "kind": "Official Acquisition Announcement",
                "label": "Synopsys Acquisition of Sidense",
                "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
              },
              {
                "id": "ip-synopsys-otp-current",
                "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys OTP NVM 1T/2T Portfolio",
                "locator": "Synopsys OTP NVM IP Solutions",
                "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
              },
              {
                "id": "ip-synopsys-advanced-otp",
                "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                "date": null,
                "accessedAt": "2026-09-10",
                "kind": "Official Technical Article",
                "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Historical Public Principle",
                "mechanism": "Oxide-Conduction Current Sensing",
                "summary": "Compare low/high current along the WL/BL path. The macro defines logic coding and normal read preserves the state.",
                "frames": [
                  {
                    "id": "hold",
                    "title": "Retained State",
                    "state": "The illustrated programmed thin region retains its conductive state without stimulus.",
                    "stimulus": "The present operation has not yet applied a stimulus.",
                    "caption": "The illustrated programmed thin region retains its conductive state without stimulus.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-read-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-read-0-en-title\">Sidense 1T-Fuse — Read — Retained State</title><defs><marker id=\"snip-sidense-1t-fuse-read-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-read-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "select",
                    "title": "Establish Read Conditions",
                    "state": "Use lower-stress bias for channel access and sensing. This figure uses the positive-WL, low-BL n-type teaching direction.",
                    "stimulus": "Use lower-stress bias for channel access and sensing. This figure uses the positive-WL, low-BL n-type teaching direction.",
                    "caption": "Use lower-stress bias for channel access and sensing. This figure uses the positive-WL, low-BL n-type teaching direction.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-read-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-read-1-en-title\">Sidense 1T-Fuse — Read — Establish Read Conditions</title><defs><marker id=\"snip-sidense-1t-fuse-read-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-read-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409 180V240H115V185\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-read-1-en-i)\"/><text x=\"211\" y=\"284\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"257\" y=\"284\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "sense",
                    "title": "Sense the Path",
                    "state": "Conventional current leaves WL through the thin-oxide breakdown path, channel and BL diffusion; electrons move from BL toward WL.",
                    "stimulus": "Use lower-stress bias for channel access and sensing. This figure uses the positive-WL, low-BL n-type teaching direction.",
                    "caption": "Conventional current leaves WL through the thin-oxide breakdown path, channel and BL diffusion; electrons move from BL toward WL.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-read-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-read-2-en-title\">Sidense 1T-Fuse — Read — Sense the Path</title><defs><marker id=\"snip-sidense-1t-fuse-read-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-read-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409 180V240H115V185\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-read-2-en-i)\"/><path d=\"M129 191V252H386V177\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-read-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"386\" cy=\"220\" r=\"10\" fill=\"#075f9d\"/><text x=\"386\" y=\"227\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"211\" y=\"284\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"257\" y=\"284\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lower-stress read; conductance retained</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  },
                  {
                    "id": "compare",
                    "title": "Compare the Result",
                    "state": "Compare low/high current along the WL/BL path. The macro defines logic coding and normal read preserves the state.",
                    "stimulus": "Complete sensing and interpret using macro logic.",
                    "caption": "Compare low/high current along the WL/BL path. The macro defines logic coding and normal read preserves the state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"snip-sidense-1t-fuse-read-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"snip-sidense-1t-fuse-read-3-en-title\">Sidense 1T-Fuse — Read — Compare the Result</title><defs><marker id=\"snip-sidense-1t-fuse-read-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"snip-sidense-1t-fuse-read-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"29\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">1T-Fuse: One Gate, Thick/Thin Oxide</text><rect x=\"46\" y=\"230\" width=\"468\" height=\"101\" fill=\"#bdd3e6\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"78\" y=\"230\" width=\"88\" height=\"52\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"166\" y=\"230\" width=\"43\" height=\"16\" fill=\"#7299b8\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"169\" width=\"149\" height=\"61\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"329\" y=\"207\" width=\"131\" height=\"23\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" data-oxide-region=\"storage\"/><path d=\"M180 126H460V207H329V169H180Z\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\"/><rect x=\"460\" y=\"210\" width=\"35\" height=\"72\" fill=\"#e0e6e9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M119 74V230M296 74V126\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"119\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><text x=\"296\" y=\"64\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">WL</text><text x=\"405\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Poly</text><text x=\"251\" y=\"205\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thick I/O</text><text x=\"122\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">N+</text><text x=\"133\" y=\"313\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">P− Si</text><text x=\"395\" y=\"302\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Thin core oxide</text><path d=\"M445 277V237\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"384\" y=\"207\" width=\"26\" height=\"23\" fill=\"#f3bf7d\" stroke=\"#16334c\" stroke-width=\"1.5\" data-conductive-region=\"oxide\"/><path d=\"M397 207l-5 5.52l10 5.75l-10 5.98L397 230\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409 180V240H115V185\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-read-3-en-i)\"/><path d=\"M129 191V252H386V177\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#snip-sidense-1t-fuse-read-3-en-e)\"/><circle data-charge=\"mobile\" cx=\"386\" cy=\"220\" r=\"10\" fill=\"#075f9d\"/><text x=\"386\" y=\"227\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"211\" y=\"284\" text-anchor=\"middle\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I</text><text x=\"257\" y=\"284\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">e−</text><text x=\"354\" y=\"73\" text-anchor=\"start\" fill=\"#607486\" font-size=\"22\" font-weight=\"600\">I_L</text><path d=\"M405 66h20\" fill=\"none\" stroke=\"#607486\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"354\" y=\"103\" text-anchor=\"start\" fill=\"#087968\" font-size=\"22\" font-weight=\"600\">I_H</text><path d=\"M405 96h85\" fill=\"none\" stroke=\"#087968\" stroke-width=\"6\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"280\" y=\"351\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">One diffusion contact at BL</text><text x=\"280\" y=\"386\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I: low / high → sense</text></svg>",
                    "sourceIds": [
                      "ip-sidense-cell-2007",
                      "ip-sidense-irreversible-2017",
                      "ip-sidense-patent-2006"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots are mobile electrons and blue arrows follow electron flow; they are not charge retained inside the gate."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green denotes conventional current, opposite to electrons. The illustrated branch fixes positive gate bias and a low BL."
                  },
                  {
                    "symbol": "OTP",
                    "meaning": "The local orange path indicates conductive oxide state; normal operation has no electrical erase."
                  },
                  {
                    "symbol": "I_L / I_H",
                    "meaning": "Short/long bars illustrate low/high read-current comparison, not measured values or fixed logic coding."
                  },
                  {
                    "symbol": "Geometry",
                    "meaning": "Historical public-source functional reconstruction, not a scale section or current layout; terminal biases are not process operating specifications."
                  },
                  {
                    "symbol": "WL / BL",
                    "meaning": "WL connects to one poly gate and BL to the sole N+ diffusion. Only the thin core oxide is shown breaking down. Horizontal carrier paths are offset for readability from the under-gate surface channel; they do not indicate conduction through the p-type bulk."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sidense-cell-2007",
                    "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
                    "date": "2007-12-18",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Original-Author Cell Section",
                    "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
                    "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
                  },
                  {
                    "id": "ip-sidense-irreversible-2017",
                    "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
                    "date": "2017-09-05",
                    "accessedAt": "2026-09-10",
                    "kind": "Original-Author Technical Article",
                    "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
                    "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
                    "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
                  },
                  {
                    "id": "ip-sidense-patent-2006",
                    "url": "https://patents.google.com/patent/US20060244099A1/en",
                    "date": "2006-11-02",
                    "accessedAt": "2026-09-10",
                    "kind": "Public Patent",
                    "label": "Historical Sidense Split-Channel Antifuse Patent",
                    "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
                    "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
                  },
                  {
                    "id": "ip-lineage-sidense-2017",
                    "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
                    "date": "2017-10-17",
                    "accessedAt": "2026-09-10",
                    "kind": "Official Acquisition Announcement",
                    "label": "Synopsys Acquisition of Sidense",
                    "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
                    "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
                  },
                  {
                    "id": "ip-synopsys-otp-current",
                    "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys OTP NVM 1T/2T Portfolio",
                    "locator": "Synopsys OTP NVM IP Solutions",
                    "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
                  },
                  {
                    "id": "ip-synopsys-advanced-otp",
                    "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "kind": "Official Technical Article",
                    "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
                    "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
                    "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
                  }
                ],
                "caveat": "The section follows the product article’s n-type structure. Positive WL and low BL define the teaching bias from which directions are inferred. Detailed voltages from the historical p-type patent example are excluded. Split channel means neither two separate gates nor a floating gate. Acquisition announcements establish portfolio continuity; current 1T/2T or advanced-process articles do not prove this section is retained at every node."
              }
            ]
          }
        ]
      },
      {
        "id": "cfx-otp",
        "title": "CFX OTP: Gate-Oxide Breakdown Teaching Case",
        "shortTitle": "CFX · GOX OTP",
        "vendor": "Chuangfeixin CFX",
        "group": "otp",
        "hostTopic": "antifuse",
        "summary": "CFX publicly lists Anti-fuse, eFuse and floating-gate OTP. This unit teaches only the Semi IP Hub named HV-macro gate-to-substrate oxide breakdown and marks the irreversible OTP limit.",
        "program": "A high-voltage pulse breaks down the gate oxide",
        "reverse": "The normal OTP interface has no electrical erase; other CFX routes must not reuse this drawing",
        "readout": "Sense conduction at small bias",
        "lesson": "One vendor can license more than one OTP physics. Check whether the target macro is oxide breakdown, a fuse or a floating gate. This drawing covers only the published gate-oxide-breakdown account.",
        "structure": {
          "title": "CFX OTP (Gate-Oxide Breakdown Teaching Case)",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-structure-0-en-title ip-cfx-otp-structure-0-en-desc\"><title id=\"ip-cfx-otp-structure-0-en-title\">CFX OTP (Gate-Oxide Breakdown Teaching Case)</title><desc id=\"ip-cfx-otp-structure-0-en-desc\">CFX publicly lists Anti-fuse, eFuse, and floating-gate OTP. This drawing teaches only the Semi IP Hub named HV-macro gate-oxide breakdown and does not represent every SKU.</desc><defs><marker id=\"ip-cfx-otp-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "CFX publicly lists Anti-fuse, eFuse, and floating-gate OTP. This drawing teaches only the Semi IP Hub named HV-macro gate-oxide breakdown and does not represent every SKU.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "BD",
              "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
            }
          ],
          "sourceIds": [
            "ip-cfx-otpip",
            "ip-cfx-news-routes",
            "ip-cfx-semiiphub"
          ]
        },
        "operations": [
          {
            "topicId": "ip-cfx-otp",
            "operationId": "write",
            "title": "CFX OTP (Gate-Oxide Breakdown Teaching Case) — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-cfx-otpip",
                "label": "Chuangfeixin OTP IP",
                "url": "https://www.chuangfeixin.com/otpip",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "CMOS-compatible OTP IP product line.",
                "limit": "The page does not lock a single physics mechanism."
              },
              {
                "id": "ip-cfx-news-routes",
                "label": "CFX: Three OTP Routes",
                "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                "kind": "vendor",
                "date": "2026-04-09",
                "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                "limit": "Do not collapse the three routes into one bit cell."
              },
              {
                "id": "ip-cfx-semiiphub",
                "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                "kind": "catalog",
                "date": "2026-09-16",
                "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                "limit": "The catalog description does not cover every CFX OTP SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Oxide-Breakdown Teaching Model",
                "mechanism": "A high-voltage pulse permanently conducts the gate-to-substrate oxide.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-cfx-otp-write-1-en-frame",
                    "title": "Intact Gate Oxide",
                    "state": "Insulating",
                    "stimulus": "Bias zero",
                    "caption": "This teaching case matches only the Semi IP Hub gate-oxide-breakdown narrative.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-write-1-en-title ip-cfx-otp-write-1-en-desc\"><title id=\"ip-cfx-otp-write-1-en-title\">Intact Gate Oxide</title><desc id=\"ip-cfx-otp-write-1-en-desc\">This teaching case matches only the Semi IP Hub gate-oxide-breakdown narrative.</desc><defs><marker id=\"ip-cfx-otp-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-write-2-en-frame",
                    "title": "High-Voltage Pulse from Gate to Substrate",
                    "state": "Breaking down",
                    "stimulus": "HV pulse",
                    "caption": "CFX also has eFuse and floating-gate OTP, which are not drawn in this frame.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-write-2-en-title ip-cfx-otp-write-2-en-desc\"><title id=\"ip-cfx-otp-write-2-en-title\">High-Voltage Pulse from Gate to Substrate</title><desc id=\"ip-cfx-otp-write-2-en-desc\">CFX also has eFuse and floating-gate OTP, which are not drawn in this frame.</desc><defs><marker id=\"ip-cfx-otp-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">HV</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><line x1=\"280\" y1=\"118\" x2=\"280\" y2=\"168\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-cfx-otp-write-2-en-field)\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-write-3-en-frame",
                    "title": "The Oxide Leaves a Permanent Conduction Path",
                    "state": "Programmed",
                    "stimulus": "Pulse removed",
                    "caption": "OTP has no electrical erase back to insulation.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-write-3-en-title ip-cfx-otp-write-3-en-desc\"><title id=\"ip-cfx-otp-write-3-en-title\">The Oxide Leaves a Permanent Conduction Path</title><desc id=\"ip-cfx-otp-write-3-en-desc\">OTP has no electrical erase back to insulation.</desc><defs><marker id=\"ip-cfx-otp-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-cfx-otpip",
                    "label": "Chuangfeixin OTP IP",
                    "url": "https://www.chuangfeixin.com/otpip",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "CMOS-compatible OTP IP product line.",
                    "limit": "The page does not lock a single physics mechanism."
                  },
                  {
                    "id": "ip-cfx-news-routes",
                    "label": "CFX: Three OTP Routes",
                    "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                    "kind": "vendor",
                    "date": "2026-04-09",
                    "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                    "limit": "Do not collapse the three routes into one bit cell."
                  },
                  {
                    "id": "ip-cfx-semiiphub",
                    "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                    "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                    "kind": "catalog",
                    "date": "2026-09-16",
                    "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                    "limit": "The catalog description does not cover every CFX OTP SKU."
                  }
                ],
                "caveat": "If the target macro is eFuse or floating-gate OTP, open a separate unit; do not reuse this drawing."
              }
            ]
          },
          {
            "topicId": "ip-cfx-otp",
            "operationId": "erase",
            "title": "CFX OTP (Gate-Oxide Breakdown Teaching Case) — Erase / Restore Limit",
            "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
            "sources": [
              {
                "id": "ip-cfx-otpip",
                "label": "Chuangfeixin OTP IP",
                "url": "https://www.chuangfeixin.com/otpip",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "CMOS-compatible OTP IP product line.",
                "limit": "The page does not lock a single physics mechanism."
              },
              {
                "id": "ip-cfx-news-routes",
                "label": "CFX: Three OTP Routes",
                "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                "kind": "vendor",
                "date": "2026-04-09",
                "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                "limit": "Do not collapse the three routes into one bit cell."
              },
              {
                "id": "ip-cfx-semiiphub",
                "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                "kind": "catalog",
                "date": "2026-09-16",
                "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                "limit": "The catalog description does not cover every CFX OTP SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Oxide-Breakdown Teaching Model",
                "mechanism": "A high-voltage pulse permanently conducts the gate-to-substrate oxide.",
                "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
                "frames": [
                  {
                    "id": "ip-cfx-otp-erase-1-en-frame",
                    "title": "A Broken-Down Cell Cannot Be Electrically Restored",
                    "state": "Permanently conducting",
                    "stimulus": "No erase command",
                    "caption": "An OTP cell has no electrical cycle back to an intact oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-erase-1-en-title ip-cfx-otp-erase-1-en-desc\"><title id=\"ip-cfx-otp-erase-1-en-title\">A Broken-Down Cell Cannot Be Electrically Restored</title><desc id=\"ip-cfx-otp-erase-1-en-desc\">An OTP cell has no electrical cycle back to an intact oxide.</desc><defs><marker id=\"ip-cfx-otp-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-erase-2-en-frame",
                    "title": "The Host Must Not Send an Erase Pulse",
                    "state": "Still conducting",
                    "stimulus": "Operation refused",
                    "caption": "If rewrite is required, use an MTP or eFlash unit instead.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-erase-2-en-title ip-cfx-otp-erase-2-en-desc\"><title id=\"ip-cfx-otp-erase-2-en-title\">The Host Must Not Send an Erase Pulse</title><desc id=\"ip-cfx-otp-erase-2-en-desc\">If rewrite is required, use an MTP or eFlash unit instead.</desc><defs><marker id=\"ip-cfx-otp-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-erase-3-en-frame",
                    "title": "The State Can Only Be Read",
                    "state": "OTP final state",
                    "stimulus": "Bias zero",
                    "caption": "The three OTP routes still must be checked separately during selection.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-erase-3-en-title ip-cfx-otp-erase-3-en-desc\"><title id=\"ip-cfx-otp-erase-3-en-title\">The State Can Only Be Read</title><desc id=\"ip-cfx-otp-erase-3-en-desc\">The three OTP routes still must be checked separately during selection.</desc><defs><marker id=\"ip-cfx-otp-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-cfx-otpip",
                    "label": "Chuangfeixin OTP IP",
                    "url": "https://www.chuangfeixin.com/otpip",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "CMOS-compatible OTP IP product line.",
                    "limit": "The page does not lock a single physics mechanism."
                  },
                  {
                    "id": "ip-cfx-news-routes",
                    "label": "CFX: Three OTP Routes",
                    "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                    "kind": "vendor",
                    "date": "2026-04-09",
                    "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                    "limit": "Do not collapse the three routes into one bit cell."
                  },
                  {
                    "id": "ip-cfx-semiiphub",
                    "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                    "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                    "kind": "catalog",
                    "date": "2026-09-16",
                    "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                    "limit": "The catalog description does not cover every CFX OTP SKU."
                  }
                ],
                "caveat": "If the target macro is eFuse or floating-gate OTP, open a separate unit; do not reuse this drawing."
              }
            ]
          },
          {
            "topicId": "ip-cfx-otp",
            "operationId": "read",
            "title": "CFX OTP (Gate-Oxide Breakdown Teaching Case) — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-cfx-otpip",
                "label": "Chuangfeixin OTP IP",
                "url": "https://www.chuangfeixin.com/otpip",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "CMOS-compatible OTP IP product line.",
                "limit": "The page does not lock a single physics mechanism."
              },
              {
                "id": "ip-cfx-news-routes",
                "label": "CFX: Three OTP Routes",
                "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                "kind": "vendor",
                "date": "2026-04-09",
                "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                "limit": "Do not collapse the three routes into one bit cell."
              },
              {
                "id": "ip-cfx-semiiphub",
                "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                "kind": "catalog",
                "date": "2026-09-16",
                "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                "limit": "The catalog description does not cover every CFX OTP SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Oxide-Breakdown Teaching Model",
                "mechanism": "A high-voltage pulse permanently conducts the gate-to-substrate oxide.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-cfx-otp-read-1-en-frame",
                    "title": "Intact and Broken-Down Are Alternative Initial States",
                    "state": "Already conducting or insulating",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not use program-level high voltage.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-read-1-en-title ip-cfx-otp-read-1-en-desc\"><title id=\"ip-cfx-otp-read-1-en-title\">Intact and Broken-Down Are Alternative Initial States</title><desc id=\"ip-cfx-otp-read-1-en-desc\">Read does not use program-level high voltage.</desc><defs><marker id=\"ip-cfx-otp-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-read-2-en-frame",
                    "title": "Sense Conduction at Small Bias",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "A conducting cell draws larger current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-read-2-en-title ip-cfx-otp-read-2-en-desc\"><title id=\"ip-cfx-otp-read-2-en-title\">Sense Conduction at Small Bias</title><desc id=\"ip-cfx-otp-read-2-en-desc\">A conducting cell draws larger current.</desc><defs><marker id=\"ip-cfx-otp-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  },
                  {
                    "id": "ip-cfx-otp-read-3-en-frame",
                    "title": "Latch then Isolate",
                    "state": "State retained",
                    "stimulus": "Bias zero",
                    "caption": "Actual read time and window are defined by the macro.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-cfx-otp-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-cfx-otp-read-3-en-title ip-cfx-otp-read-3-en-desc\"><title id=\"ip-cfx-otp-read-3-en-title\">Latch then Isolate</title><desc id=\"ip-cfx-otp-read-3-en-desc\">Actual read time and window are defined by the macro.</desc><defs><marker id=\"ip-cfx-otp-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-cfx-otp-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-cfx-otp-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-cfx-otp-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-cfx-otpip",
                      "ip-cfx-news-routes",
                      "ip-cfx-semiiphub"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-cfx-otpip",
                    "label": "Chuangfeixin OTP IP",
                    "url": "https://www.chuangfeixin.com/otpip",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "CMOS-compatible OTP IP product line.",
                    "limit": "The page does not lock a single physics mechanism."
                  },
                  {
                    "id": "ip-cfx-news-routes",
                    "label": "CFX: Three OTP Routes",
                    "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
                    "kind": "vendor",
                    "date": "2026-04-09",
                    "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
                    "limit": "Do not collapse the three routes into one bit cell."
                  },
                  {
                    "id": "ip-cfx-semiiphub",
                    "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
                    "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
                    "kind": "catalog",
                    "date": "2026-09-16",
                    "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
                    "limit": "The catalog description does not cover every CFX OTP SKU."
                  }
                ],
                "caveat": "If the target macro is eFuse or floating-gate OTP, open a separate unit; do not reuse this drawing."
              }
            ]
          }
        ]
      },
      {
        "id": "attopsemi-ifuse",
        "title": "Attopsemi I-fuse: Heat-Assisted Electromigration OTP",
        "shortTitle": "Attopsemi · I-fuse",
        "vendor": "Attopsemi",
        "group": "otp",
        "hostTopic": "efuse",
        "summary": "I-fuse is a poly / metal-gate / metal fuse. Programming uses heat-assisted electromigration to raise resistance while staying below thermal runaway and explosive rupture.",
        "program": "Heat-assisted electromigration raises fuse resistance",
        "reverse": "The normal OTP interface has no electrical erase; this is not AntiFuse",
        "readout": "Compare high R and low R at small current",
        "lesson": "Keep I-fuse separate from AntiFuse and from conventional explosive eFuse. The stored quantity is fuse resistance, not whether a MOS gate oxide has broken down.",
        "structure": {
          "title": "Attopsemi I-fuse OTP",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-structure-0-en-title ip-attopsemi-ifuse-structure-0-en-desc\"><title id=\"ip-attopsemi-ifuse-structure-0-en-title\">Attopsemi I-fuse OTP</title><desc id=\"ip-attopsemi-ifuse-structure-0-en-desc\">A poly / metal-gate / metal fuse. Heat-assisted electromigration changes resistance while staying below thermal runaway and explosive rupture.</desc><defs><marker id=\"ip-attopsemi-ifuse-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "A poly / metal-gate / metal fuse. Heat-assisted electromigration changes resistance while staying below thermal runaway and explosive rupture.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "Fuse",
              "meaning": "The orange path marks a high-R fuse after electromigration, not an explosive gap."
            }
          ],
          "sourceIds": [
            "ip-attop-home",
            "ip-attop-ifuse"
          ]
        },
        "operations": [
          {
            "topicId": "ip-attopsemi-ifuse",
            "operationId": "write",
            "title": "Attopsemi I-fuse OTP — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-attop-home",
                "label": "Attopsemi Home",
                "url": "https://www.attopsemi.com/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
              },
              {
                "id": "ip-attop-ifuse",
                "label": "Attopsemi I-fuse Technology",
                "url": "https://www.attopsemi.com/ifuse-technology/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                "limit": "No public fuse cross-section dimensions or program current table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Heat-Assisted Electromigration Model",
                "mechanism": "Local heating accelerates metal-atom migration and raises fuse resistance.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-attopsemi-ifuse-write-1-en-frame",
                    "title": "Low-Resistance Fuse Initial State",
                    "state": "Continuous fuse",
                    "stimulus": "Bias zero",
                    "caption": "I-fuse is a fuse, not a MOS oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-write-1-en-title ip-attopsemi-ifuse-write-1-en-desc\"><title id=\"ip-attopsemi-ifuse-write-1-en-title\">Low-Resistance Fuse Initial State</title><desc id=\"ip-attopsemi-ifuse-write-1-en-desc\">I-fuse is a fuse, not a MOS oxide.</desc><defs><marker id=\"ip-attopsemi-ifuse-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-write-2-en-frame",
                    "title": "Heat-Assisted Electromigration below Thermal Runaway",
                    "state": "Migrating",
                    "stimulus": "Program current heating",
                    "caption": "The vendor explicitly excludes explosive rupture and AntiFuse.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-write-2-en-title ip-attopsemi-ifuse-write-2-en-desc\"><title id=\"ip-attopsemi-ifuse-write-2-en-title\">Heat-Assisted Electromigration below Thermal Runaway</title><desc id=\"ip-attopsemi-ifuse-write-2-en-desc\">The vendor explicitly excludes explosive rupture and AntiFuse.</desc><defs><marker id=\"ip-attopsemi-ifuse-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_PGM</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><text x=\"400\" y=\"132\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">ΔT</text><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">I_PGM</text><line x1=\"170\" y1=\"134\" x2=\"390\" y2=\"134\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-attopsemi-ifuse-write-2-en-current)\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-write-3-en-frame",
                    "title": "Fuse Resistance Rises and Is Retained",
                    "state": "High-R state",
                    "stimulus": "Current removed",
                    "caption": "Poly, metal-gate, and metal fuses belong to this family; this drawing does not pick one cross-section.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-write-3-en-title ip-attopsemi-ifuse-write-3-en-desc\"><title id=\"ip-attopsemi-ifuse-write-3-en-title\">Fuse Resistance Rises and Is Retained</title><desc id=\"ip-attopsemi-ifuse-write-3-en-desc\">Poly, metal-gate, and metal fuses belong to this family; this drawing does not pick one cross-section.</desc><defs><marker id=\"ip-attopsemi-ifuse-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "Fuse",
                    "meaning": "The orange path marks a high-R fuse after electromigration, not an explosive gap."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-attop-home",
                    "label": "Attopsemi Home",
                    "url": "https://www.attopsemi.com/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                    "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
                  },
                  {
                    "id": "ip-attop-ifuse",
                    "label": "Attopsemi I-fuse Technology",
                    "url": "https://www.attopsemi.com/ifuse-technology/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                    "limit": "No public fuse cross-section dimensions or program current table."
                  }
                ],
                "caveat": "I-fuse is neither AntiFuse nor conventional explosive eFuse."
              }
            ]
          },
          {
            "topicId": "ip-attopsemi-ifuse",
            "operationId": "erase",
            "title": "Attopsemi I-fuse OTP — Erase / Restore Limit",
            "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
            "sources": [
              {
                "id": "ip-attop-home",
                "label": "Attopsemi Home",
                "url": "https://www.attopsemi.com/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
              },
              {
                "id": "ip-attop-ifuse",
                "label": "Attopsemi I-fuse Technology",
                "url": "https://www.attopsemi.com/ifuse-technology/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                "limit": "No public fuse cross-section dimensions or program current table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Heat-Assisted Electromigration Model",
                "mechanism": "Local heating accelerates metal-atom migration and raises fuse resistance.",
                "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
                "frames": [
                  {
                    "id": "ip-attopsemi-ifuse-erase-1-en-frame",
                    "title": "A High-R Fuse Cannot Be Electrically Restored",
                    "state": "High R",
                    "stimulus": "No erase current",
                    "caption": "An OTP fuse has no electrical cycle back to low R.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-erase-1-en-title ip-attopsemi-ifuse-erase-1-en-desc\"><title id=\"ip-attopsemi-ifuse-erase-1-en-title\">A High-R Fuse Cannot Be Electrically Restored</title><desc id=\"ip-attopsemi-ifuse-erase-1-en-desc\">An OTP fuse has no electrical cycle back to low R.</desc><defs><marker id=\"ip-attopsemi-ifuse-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-erase-2-en-frame",
                    "title": "Do Not Apply Reverse Blow",
                    "state": "Still high R",
                    "stimulus": "Operation refused",
                    "caption": "This is not a rewritable MTP.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-erase-2-en-title ip-attopsemi-ifuse-erase-2-en-desc\"><title id=\"ip-attopsemi-ifuse-erase-2-en-title\">Do Not Apply Reverse Blow</title><desc id=\"ip-attopsemi-ifuse-erase-2-en-desc\">This is not a rewritable MTP.</desc><defs><marker id=\"ip-attopsemi-ifuse-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-erase-3-en-frame",
                    "title": "The Final State Can Only Be Read",
                    "state": "OTP final state",
                    "stimulus": "Bias zero",
                    "caption": "The physics boundary versus conventional explosive eFuse must be kept.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-erase-3-en-title ip-attopsemi-ifuse-erase-3-en-desc\"><title id=\"ip-attopsemi-ifuse-erase-3-en-title\">The Final State Can Only Be Read</title><desc id=\"ip-attopsemi-ifuse-erase-3-en-desc\">The physics boundary versus conventional explosive eFuse must be kept.</desc><defs><marker id=\"ip-attopsemi-ifuse-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "Fuse",
                    "meaning": "The orange path marks a high-R fuse after electromigration, not an explosive gap."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-attop-home",
                    "label": "Attopsemi Home",
                    "url": "https://www.attopsemi.com/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                    "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
                  },
                  {
                    "id": "ip-attop-ifuse",
                    "label": "Attopsemi I-fuse Technology",
                    "url": "https://www.attopsemi.com/ifuse-technology/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                    "limit": "No public fuse cross-section dimensions or program current table."
                  }
                ],
                "caveat": "I-fuse is neither AntiFuse nor conventional explosive eFuse."
              }
            ]
          },
          {
            "topicId": "ip-attopsemi-ifuse",
            "operationId": "read",
            "title": "Attopsemi I-fuse OTP — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-attop-home",
                "label": "Attopsemi Home",
                "url": "https://www.attopsemi.com/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
              },
              {
                "id": "ip-attop-ifuse",
                "label": "Attopsemi I-fuse Technology",
                "url": "https://www.attopsemi.com/ifuse-technology/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                "limit": "No public fuse cross-section dimensions or program current table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Heat-Assisted Electromigration Model",
                "mechanism": "Local heating accelerates metal-atom migration and raises fuse resistance.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-attopsemi-ifuse-read-1-en-frame",
                    "title": "Low R and High R Are Alternative Initial States",
                    "state": "Existing resistance",
                    "stimulus": "Small sense current",
                    "caption": "Sense current is far below program current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-read-1-en-title ip-attopsemi-ifuse-read-1-en-desc\"><title id=\"ip-attopsemi-ifuse-read-1-en-title\">Low R and High R Are Alternative Initial States</title><desc id=\"ip-attopsemi-ifuse-read-1-en-desc\">Sense current is far below program current.</desc><defs><marker id=\"ip-attopsemi-ifuse-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-read-2-en-frame",
                    "title": "Compare Fuse Resistance",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "Sense circuits distinguish high R from low R.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-read-2-en-title ip-attopsemi-ifuse-read-2-en-desc\"><title id=\"ip-attopsemi-ifuse-read-2-en-title\">Compare Fuse Resistance</title><desc id=\"ip-attopsemi-ifuse-read-2-en-desc\">Sense circuits distinguish high R from low R.</desc><defs><marker id=\"ip-attopsemi-ifuse-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">I_PGM</text><line x1=\"170\" y1=\"134\" x2=\"390\" y2=\"134\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-attopsemi-ifuse-read-2-en-current)\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  },
                  {
                    "id": "ip-attopsemi-ifuse-read-3-en-frame",
                    "title": "Latch then Remove Current",
                    "state": "Resistance retained",
                    "stimulus": "Bias zero",
                    "caption": "Read must not drive the fuse near thermal runaway.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-attopsemi-ifuse-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-attopsemi-ifuse-read-3-en-title ip-attopsemi-ifuse-read-3-en-desc\"><title id=\"ip-attopsemi-ifuse-read-3-en-title\">Latch then Remove Current</title><desc id=\"ip-attopsemi-ifuse-read-3-en-desc\">Read must not drive the fuse near thermal runaway.</desc><defs><marker id=\"ip-attopsemi-ifuse-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-attopsemi-ifuse-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-attopsemi-ifuse-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-attopsemi-ifuse-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"330\" y=\"120\" width=\"80\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"230\" y=\"126\" width=\"100\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"108\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Fuse</text><path d=\"M248 134 C268 118 292 150 312 134\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><line x1=\"190\" y1=\"148\" x2=\"190\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><line x1=\"370\" y1=\"148\" x2=\"370\" y2=\"210\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-attop-home",
                      "ip-attop-ifuse"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "Fuse",
                    "meaning": "The orange path marks a high-R fuse after electromigration, not an explosive gap."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-attop-home",
                    "label": "Attopsemi Home",
                    "url": "https://www.attopsemi.com/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
                    "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
                  },
                  {
                    "id": "ip-attop-ifuse",
                    "label": "Attopsemi I-fuse Technology",
                    "url": "https://www.attopsemi.com/ifuse-technology/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
                    "limit": "No public fuse cross-section dimensions or program current table."
                  }
                ],
                "caveat": "I-fuse is neither AntiFuse nor conventional explosive eFuse."
              }
            ]
          }
        ]
      },
      {
        "id": "floadia-za",
        "title": "Floadia LEE Fuse ZA: Anti-Fuse OTP",
        "shortTitle": "Floadia · LEE Fuse ZA",
        "vendor": "Floadia",
        "group": "otp",
        "hostTopic": "antifuse",
        "summary": "Zero extra-mask Anti-fuse OTP. The teaching drawing shows a dielectric changing from insulation to permanent conduction and does not locate the breakdown site in a gate or capacitor.",
        "program": "High voltage permanently conducts the dielectric",
        "reverse": "The normal OTP interface has no electrical erase",
        "readout": "Sense conduction at small bias",
        "lesson": "The product name is LEE Fuse ZA. If a page writes LEE Flash ZA, the cell remains Anti-fuse OTP and must not be read as the rewritable charge cells in LEE Flash ZT, G1 or G2.",
        "structure": {
          "title": "Floadia LEE Fuse ZA OTP",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-structure-0-en-title ip-floadia-za-structure-0-en-desc\"><title id=\"ip-floadia-za-structure-0-en-title\">Floadia LEE Fuse ZA OTP</title><desc id=\"ip-floadia-za-structure-0-en-desc\">Anti-fuse OTP with zero extra mask. The teaching drawing shows dielectric isolation then conduction and does not locate the breakdown site in a gate or capacitor.</desc><defs><marker id=\"ip-floadia-za-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Anti-fuse OTP with zero extra mask. The teaching drawing shows dielectric isolation then conduction and does not locate the breakdown site in a gate or capacitor.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "BD",
              "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
            }
          ],
          "sourceIds": [
            "ip-floadia-za"
          ]
        },
        "operations": [
          {
            "topicId": "ip-floadia-za",
            "operationId": "write",
            "title": "Floadia LEE Fuse ZA OTP — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-floadia-za",
                "label": "Floadia LEE Fuse ZA",
                "url": "https://floadia.com/product/lee-fuse-za/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Anti-Fuse Breakdown Teaching Model",
                "mechanism": "A single high-voltage event permanently conducts the dielectric.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-floadia-za-write-1-en-frame",
                    "title": "Intact Anti-Fuse Dielectric",
                    "state": "Insulating",
                    "stimulus": "Bias zero",
                    "caption": "The product name is LEE Fuse ZA.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-write-1-en-title ip-floadia-za-write-1-en-desc\"><title id=\"ip-floadia-za-write-1-en-title\">Intact Anti-Fuse Dielectric</title><desc id=\"ip-floadia-za-write-1-en-desc\">The product name is LEE Fuse ZA.</desc><defs><marker id=\"ip-floadia-za-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-write-2-en-frame",
                    "title": "High Voltage Breaks Down the Dielectric",
                    "state": "Breaking down",
                    "stimulus": "HV",
                    "caption": "Zero extra mask is the integration claim; the breakdown site is unpublished.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-write-2-en-title ip-floadia-za-write-2-en-desc\"><title id=\"ip-floadia-za-write-2-en-title\">High Voltage Breaks Down the Dielectric</title><desc id=\"ip-floadia-za-write-2-en-desc\">Zero extra mask is the integration claim; the breakdown site is unpublished.</desc><defs><marker id=\"ip-floadia-za-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">HV</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"28\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"144\" text-anchor=\"middle\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">GOX</text><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><line x1=\"280\" y1=\"118\" x2=\"280\" y2=\"168\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-floadia-za-write-2-en-field)\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-write-3-en-frame",
                    "title": "Leave a Permanent Conduction Path",
                    "state": "Programmed",
                    "stimulus": "High voltage removed",
                    "caption": "A DRAM 1xnm production track cannot be extrapolated as the same cross-section on every logic node.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-write-3-en-title ip-floadia-za-write-3-en-desc\"><title id=\"ip-floadia-za-write-3-en-title\">Leave a Permanent Conduction Path</title><desc id=\"ip-floadia-za-write-3-en-desc\">A DRAM 1xnm production track cannot be extrapolated as the same cross-section on every logic node.</desc><defs><marker id=\"ip-floadia-za-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-za",
                    "label": "Floadia LEE Fuse ZA",
                    "url": "https://floadia.com/product/lee-fuse-za/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                    "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
                  }
                ],
                "caveat": "The product name is LEE Fuse ZA; a page typo of LEE Flash ZA does not change the mechanism class."
              }
            ]
          },
          {
            "topicId": "ip-floadia-za",
            "operationId": "erase",
            "title": "Floadia LEE Fuse ZA OTP — Erase / Restore Limit",
            "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
            "sources": [
              {
                "id": "ip-floadia-za",
                "label": "Floadia LEE Fuse ZA",
                "url": "https://floadia.com/product/lee-fuse-za/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Anti-Fuse Breakdown Teaching Model",
                "mechanism": "A single high-voltage event permanently conducts the dielectric.",
                "summary": "OTP has no electrical erase back to the initial state; this section only marks the restore limit.",
                "frames": [
                  {
                    "id": "ip-floadia-za-erase-1-en-frame",
                    "title": "A Broken-Down Cell Has No Electrical Erase",
                    "state": "Permanently conducting",
                    "stimulus": "No erase command",
                    "caption": "Anti-fuse OTP is kept separate from LEE Flash ZT/G1/G2.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-erase-1-en-title ip-floadia-za-erase-1-en-desc\"><title id=\"ip-floadia-za-erase-1-en-title\">A Broken-Down Cell Has No Electrical Erase</title><desc id=\"ip-floadia-za-erase-1-en-desc\">Anti-fuse OTP is kept separate from LEE Flash ZT/G1/G2.</desc><defs><marker id=\"ip-floadia-za-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-erase-2-en-frame",
                    "title": "Refuse the Erase Operation",
                    "state": "Still conducting",
                    "stimulus": "Operation refused",
                    "caption": "A page typo of LEE Flash ZA does not turn this unit into eFlash.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-erase-2-en-title ip-floadia-za-erase-2-en-desc\"><title id=\"ip-floadia-za-erase-2-en-title\">Refuse the Erase Operation</title><desc id=\"ip-floadia-za-erase-2-en-desc\">A page typo of LEE Flash ZA does not turn this unit into eFlash.</desc><defs><marker id=\"ip-floadia-za-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-erase-3-en-frame",
                    "title": "The Final State Can Only Be Read",
                    "state": "OTP final state",
                    "stimulus": "Bias zero",
                    "caption": "180 nm to sub-10 nm is a vendor node narrative.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-erase-3-en-title ip-floadia-za-erase-3-en-desc\"><title id=\"ip-floadia-za-erase-3-en-title\">The Final State Can Only Be Read</title><desc id=\"ip-floadia-za-erase-3-en-desc\">180 nm to sub-10 nm is a vendor node narrative.</desc><defs><marker id=\"ip-floadia-za-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-za",
                    "label": "Floadia LEE Fuse ZA",
                    "url": "https://floadia.com/product/lee-fuse-za/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                    "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
                  }
                ],
                "caveat": "The product name is LEE Fuse ZA; a page typo of LEE Flash ZA does not change the mechanism class."
              }
            ]
          },
          {
            "topicId": "ip-floadia-za",
            "operationId": "read",
            "title": "Floadia LEE Fuse ZA OTP — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-floadia-za",
                "label": "Floadia LEE Fuse ZA",
                "url": "https://floadia.com/product/lee-fuse-za/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Anti-Fuse Breakdown Teaching Model",
                "mechanism": "A single high-voltage event permanently conducts the dielectric.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-floadia-za-read-1-en-frame",
                    "title": "Insulation and Conduction Are Alternative Initial States",
                    "state": "Existing state",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not use program-level high voltage.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-read-1-en-title ip-floadia-za-read-1-en-desc\"><title id=\"ip-floadia-za-read-1-en-title\">Insulation and Conduction Are Alternative Initial States</title><desc id=\"ip-floadia-za-read-1-en-desc\">Read does not use program-level high voltage.</desc><defs><marker id=\"ip-floadia-za-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-read-2-en-frame",
                    "title": "Sense at Small Bias",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "A conducting cell draws larger current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-read-2-en-title ip-floadia-za-read-2-en-desc\"><title id=\"ip-floadia-za-read-2-en-title\">Sense at Small Bias</title><desc id=\"ip-floadia-za-read-2-en-desc\">A conducting cell draws larger current.</desc><defs><marker id=\"ip-floadia-za-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  },
                  {
                    "id": "ip-floadia-za-read-3-en-frame",
                    "title": "Latch then Isolate",
                    "state": "State retained",
                    "stimulus": "Bias zero",
                    "caption": "Actual specifications follow the licensed target version.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-za-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-za-read-3-en-title ip-floadia-za-read-3-en-desc\"><title id=\"ip-floadia-za-read-3-en-title\">Latch then Isolate</title><desc id=\"ip-floadia-za-read-3-en-desc\">Actual specifications follow the licensed target version.</desc><defs><marker id=\"ip-floadia-za-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-za-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-za-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-za-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"200\" y=\"96\" width=\"160\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"115\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Gate</text><rect x=\"210\" y=\"124\" width=\"140\" height=\"10\" fill=\"#a34b10\" stroke=\"#16334c\" stroke-width=\"1.4\" /><path d=\"M250 124 L270 148 L290 128 L310 150 L330 124\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"190\" y=\"156\" width=\"180\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Substrate / Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"400\" y=\"140\" text-anchor=\"start\" fill=\"#a34b10\" font-size=\"22\" font-weight=\"600\">LRS</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-za"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "BD",
                    "meaning": "The orange polyline marks a conduction path after dielectric breakdown."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-za",
                    "label": "Floadia LEE Fuse ZA",
                    "url": "https://floadia.com/product/lee-fuse-za/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
                    "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
                  }
                ],
                "caveat": "The product name is LEE Fuse ZA; a page typo of LEE Flash ZA does not change the mechanism class."
              }
            ]
          }
        ]
      },
      {
        "id": "neoee",
        "title": "NeoEE: FN/FN Single-Poly MTP",
        "shortTitle": "NeoEE · FN/FN MTP",
        "vendor": "eMemory",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "Follow the control-coupling region, floating node and tunneling region as FN transport stores and removes electrons. A read transistor then senses the stored state.",
        "program": "FN transfers electrons into the floating node",
        "reverse": "FN transfers electrons out of the floating node",
        "readout": "Charge changes the read-transistor state",
        "lesson": "Both update directions use tunneling, but field direction, selection and biased regions must still be distinguished. Single poly describes layer count; the division of work among coupling, tunneling and read devices explains this IP's update path.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "Floating-Gate MTP in This Chapter: PGM / ERS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "The official NeoEE page describes page/word operation units and a byte-write function. Verify the exact macro’s erase unit rather than inferring it from the host write size.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-neoee",
            "ip-neoee-history"
          ],
          "before": "Initial: FG retains programmed charge.",
          "mechanism": "FN — Carriers: electrons leave FG by FN tunneling into a MOS receiving region.",
          "after": "Result: reduced FG charge permits another program cycle."
        },
        "structure": {
          "title": "NeoEE — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-structure-0-en-title\">NeoEE — Cell Structure</title><defs><marker id=\"emip-neoee-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-structure-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-structure-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Public-source reconstruction; not to scale</text></svg>",
          "caption": "Single-poly FG with capacitive-coupling MOS structures and selectors. Coupling and tunneling are functional roles; public evidence does not fix the device count or p/n arrangement. After high-field removal, isolated FG charge shifts the read-channel threshold.",
          "legend": [
            {
              "symbol": "e− / h+",
              "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
            },
            {
              "symbol": "I",
              "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
            },
            {
              "symbol": "Bias",
              "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
            },
            {
              "symbol": "Scale",
              "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
            },
            {
              "symbol": "FG / Q−",
              "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
            },
            {
              "symbol": "C / T / S / R",
              "meaning": "Coupling, tunneling, selection and read roles; not official pins or a fixed device count. T groups the MOS tunneling regions used by the operations, without asserting one physical terminal. No charge-to-ON/OFF polarity is assigned."
            }
          ],
          "sourceIds": [
            "ip-neoee",
            "ip-neoee-history"
          ]
        },
        "operations": [
          {
            "topicId": "ip-neoee",
            "operationId": "write",
            "title": "NeoEE — Program",
            "summary": "Carriers: electrons enter FG from a MOS tunneling region by FN tunneling.",
            "sources": [
              {
                "id": "ip-neoee",
                "label": "NeoEE Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
              },
              {
                "id": "ip-neoee-history",
                "label": "Historical NeoEE Conceptual Cell",
                "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                "kind": "Primary Technical Source",
                "date": "2010-10-19",
                "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "FN",
                "summary": "Carriers: electrons enter FG from a MOS tunneling region by FN tunneling.",
                "frames": [
                  {
                    "id": "neoee-write-1",
                    "title": "Initial State",
                    "state": "Initial: FG is shown with fewer electrons.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: FG is shown with fewer electrons.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-write-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-write-0-en-title\">NeoEE — Program — Initial State</title><defs><marker id=\"emip-neoee-write-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Before the programming pulse</text></svg>",
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                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-write-2",
                    "title": "Apply Conditions",
                    "state": "Stimulus: coupling and tunneling terminals establish oxide field.",
                    "stimulus": "Stimulus: coupling and tunneling terminals establish oxide field.",
                    "caption": "Stimulus: coupling and tunneling terminals establish oxide field.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-write-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-write-1-en-title\">NeoEE — Program — Apply Conditions</title><defs><marker id=\"emip-neoee-write-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><path d=\"M433 117V175\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-write-1-en-e)\"/><text x=\"495\" y=\"174\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select and establish program field</text></svg>",
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                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-write-3",
                    "title": "Carrier Motion",
                    "state": "Carriers: electrons enter FG from a MOS tunneling region by FN tunneling.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: electrons enter FG from a MOS tunneling region by FN tunneling.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-write-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-write-2-en-title\">NeoEE — Program — Carrier Motion</title><defs><marker id=\"emip-neoee-write-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M433 117V175\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-write-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"433\" cy=\"140\" r=\"11\" fill=\"#075f9d\"/><text x=\"433\" y=\"148\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"495\" y=\"174\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">e−: T → FG · FN</text></svg>",
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                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-write-4",
                    "title": "Retained Result",
                    "state": "Hold: field removal leaves increased FG charge.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Hold: field removal leaves increased FG charge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-write-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-write-3-en-title\">NeoEE — Program — Retained Result</title><defs><marker id=\"emip-neoee-write-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-write-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">State persists after stimulus removal</text></svg>",
                    "sourceIds": [
                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "C / T / S / R",
                    "meaning": "Coupling, tunneling, selection and read roles; not official pins or a fixed device count. T groups the MOS tunneling regions used by the operations, without asserting one physical terminal. No charge-to-ON/OFF polarity is assigned."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neoee",
                    "label": "NeoEE Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                    "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
                  },
                  {
                    "id": "ip-neoee-history",
                    "label": "Historical NeoEE Conceptual Cell",
                    "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                    "kind": "Primary Technical Source",
                    "date": "2010-10-19",
                    "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                    "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
                  }
                ],
                "caveat": "Exclude the historical CHE/FN branch; do not assert exactly two physical capacitors or that more electrons always mean ON. C, T, R and S denote coupling, tunneling, read-channel and selection functions, not official pins. Shared FG has no external supply connection."
              }
            ]
          },
          {
            "topicId": "ip-neoee",
            "operationId": "erase",
            "title": "NeoEE — Erase",
            "summary": "An FN charge-removal path enables electrical rewriting; dielectric wear and macro conditions limit cycling.",
            "sources": [
              {
                "id": "ip-neoee",
                "label": "NeoEE Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
              },
              {
                "id": "ip-neoee-history",
                "label": "Historical NeoEE Conceptual Cell",
                "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                "kind": "Primary Technical Source",
                "date": "2010-10-19",
                "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "FN",
                "summary": "An FN charge-removal path enables electrical rewriting; dielectric wear and macro conditions limit cycling.",
                "frames": [
                  {
                    "id": "neoee-erase-1",
                    "title": "Programmed State",
                    "state": "Initial: FG retains programmed charge.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: FG retains programmed charge.",
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                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-erase-2",
                    "title": "Switch Terminal Conditions",
                    "state": "Stimulus: switch terminal conditions to establish charge-removal field.",
                    "stimulus": "Stimulus: switch terminal conditions to establish charge-removal field.",
                    "caption": "Stimulus: switch terminal conditions to establish charge-removal field.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-erase-1-en-title\">NeoEE — Erase — Switch Terminal Conditions</title><defs><marker id=\"emip-neoee-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M433 177V115\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-erase-1-en-e)\"/><text x=\"495\" y=\"174\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Establish charge-removal field</text></svg>",
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                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-erase-3",
                    "title": "Remove Electrons",
                    "state": "Carriers: electrons leave FG by FN tunneling into a MOS receiving region.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: electrons leave FG by FN tunneling into a MOS receiving region.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-erase-2-en-title\">NeoEE — Erase — Remove Electrons</title><defs><marker id=\"emip-neoee-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M433 177V115\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-erase-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"433\" cy=\"140\" r=\"11\" fill=\"#075f9d\"/><text x=\"433\" y=\"148\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"495\" y=\"174\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">e−: FG → T · FN</text></svg>",
                    "sourceIds": [
                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-erase-4",
                    "title": "Ready to Reprogram",
                    "state": "Result: reduced FG charge permits another program cycle.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: reduced FG charge permits another program cycle.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-erase-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-erase-3-en-title\">NeoEE — Erase — Ready to Reprogram</title><defs><marker id=\"emip-neoee-erase-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-erase-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Charge reduced; ready to reprogram</text></svg>",
                    "sourceIds": [
                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "C / T / S / R",
                    "meaning": "Coupling, tunneling, selection and read roles; not official pins or a fixed device count. T groups the MOS tunneling regions used by the operations, without asserting one physical terminal. No charge-to-ON/OFF polarity is assigned."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neoee",
                    "label": "NeoEE Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                    "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
                  },
                  {
                    "id": "ip-neoee-history",
                    "label": "Historical NeoEE Conceptual Cell",
                    "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                    "kind": "Primary Technical Source",
                    "date": "2010-10-19",
                    "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                    "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
                  }
                ],
                "caveat": "Exclude the historical CHE/FN branch; do not assert exactly two physical capacitors or that more electrons always mean ON. C, T, R and S denote coupling, tunneling, read-channel and selection functions, not official pins. Shared FG has no external supply connection."
              }
            ]
          },
          {
            "topicId": "ip-neoee",
            "operationId": "read",
            "title": "NeoEE — Read",
            "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
            "sources": [
              {
                "id": "ip-neoee",
                "label": "NeoEE Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
              },
              {
                "id": "ip-neoee-history",
                "label": "Historical NeoEE Conceptual Cell",
                "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                "kind": "Primary Technical Source",
                "date": "2010-10-19",
                "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Channel-current sensing",
                "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
                "frames": [
                  {
                    "id": "neoee-read-1",
                    "title": "Retained State",
                    "state": "Hold: two FG charge states create different thresholds.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Hold: two FG charge states create different thresholds.",
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                      "ip-neoee",
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                  },
                  {
                    "id": "neoee-read-2",
                    "title": "Select the Cell",
                    "state": "Stimulus: selectors enable the read channel.",
                    "stimulus": "Stimulus: selectors enable the read channel.",
                    "caption": "Stimulus: selectors enable the read channel.",
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                      "ip-neoee",
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                  },
                  {
                    "id": "neoee-read-3",
                    "title": "Sense the Path",
                    "state": "Path: sense channel conductance without FN charge transfer.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Path: sense channel conductance without FN charge transfer.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-read-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-read-2-en-title\">NeoEE — Read — Sense the Path</title><defs><marker id=\"emip-neoee-read-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-2-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M130 307H448\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-read-2-en-i)\"/><text x=\"485\" y=\"288\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Low-field sensing; state retained</text></svg>",
                    "sourceIds": [
                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  },
                  {
                    "id": "neoee-read-4",
                    "title": "Compare the Result",
                    "state": "Result: compare against a reference while preserving FG charge.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: compare against a reference while preserving FG charge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neoee-read-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neoee-read-3-en-title\">NeoEE — Read — Compare the Result</title><defs><marker id=\"emip-neoee-read-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neoee-read-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN / FN: Functional Windows and FG</text><rect x=\"75\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"91\" width=\"100\" height=\"33\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"369\" y=\"124\" width=\"100\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"75\" y=\"149\" width=\"394\" height=\"46\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"203\" y=\"195\" width=\"157\" height=\"28\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"125\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si / C</text><text x=\"394\" y=\"114\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"281\" y=\"139\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><path d=\"M125 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"125\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><path d=\"M419 72V91\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"419\" y=\"59\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T</text><rect x=\"41\" y=\"236\" width=\"80\" height=\"48\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"153\" y=\"223\" width=\"285\" height=\"70\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M121 260H153M438 260H518\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"81\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">S</text><text x=\"296\" y=\"267\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"505\" y=\"244\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">R</text><text x=\"280\" y=\"329\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: roles, not a fixed device count</text><circle data-charge=\"stored\" cx=\"217\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"217\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"250\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"250\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"283\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"283\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"316\" cy=\"172\" r=\"11\" fill=\"#075f9d\"/><text x=\"316\" y=\"180\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M130 307H448\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neoee-read-3-en-i)\"/><text x=\"485\" y=\"288\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Compare I_R; macro defines 0 / 1</text></svg>",
                    "sourceIds": [
                      "ip-neoee",
                      "ip-neoee-history"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "C / T / S / R",
                    "meaning": "Coupling, tunneling, selection and read roles; not official pins or a fixed device count. T groups the MOS tunneling regions used by the operations, without asserting one physical terminal. No charge-to-ON/OFF polarity is assigned."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neoee",
                    "label": "NeoEE Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
                    "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
                  },
                  {
                    "id": "ip-neoee-history",
                    "label": "Historical NeoEE Conceptual Cell",
                    "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
                    "kind": "Primary Technical Source",
                    "date": "2010-10-19",
                    "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
                    "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
                  }
                ],
                "caveat": "Exclude the historical CHE/FN branch; do not assert exactly two physical capacitors or that more electrons always mean ON. C, T, R and S denote coupling, tunneling, read-channel and selection functions, not official pins. Shared FG has no external supply connection."
              }
            ]
          }
        ]
      },
      {
        "id": "neomtp",
        "title": "NeoMTP: CHI/FN Single-Poly MTP",
        "shortTitle": "NeoMTP · CHI/FN MTP",
        "vendor": "eMemory",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "Compare hot-carrier programming of the p-type floating-gate cell with FN electron transfer toward a dedicated erase gate. Both operations act on the same storage node.",
        "program": "Channel-hot-hole-induced electron injection",
        "reverse": "FN electron transfer toward the erase gate",
        "readout": "P-type floating-gate transistor current",
        "lesson": "CHI/FN is the operation-pair shorthand used here. eMemory describes programming as channel-hot-hole-induced hot-electron injection and labels it CHEI. The erase gate provides a separate electron exit, distinguishing this cell from NeoBit's normal OTP interface and NeoEE's FN/FN mechanism.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "Floating-Gate MTP in This Chapter: PGM / ERS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-neomtp",
            "ip-neomtp-pat",
            "ip-neobit"
          ],
          "before": "Initial: FG retains programmed negative charge.",
          "mechanism": "FN — Carriers: electrons tunnel from FG toward EG by FN.",
          "after": "Result: reduced FG electrons turn the p-channel off at specified read bias."
        },
        "structure": {
          "title": "NeoMTP — Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-structure-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-structure-0-en-title\">NeoMTP — Cell Structure</title><defs><marker id=\"emip-neomtp-structure-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-structure-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-structure-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-structure-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><rect x=\"291\" y=\"140\" width=\"32\" height=\"34\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"113\" width=\"88\" height=\"27\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"82\" width=\"88\" height=\"31\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"338\" y=\"106\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">EG</text><text x=\"353\" y=\"158\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><circle data-charge=\"stored\" cx=\"288\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"288\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"313\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"313\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Public-source reconstruction; not to scale</text></svg>",
          "caption": "Single-poly p-type FG-MOSFET related to NeoBit, with an additional erase gate EG. Dielectric separates EG and FG; they are not shorted. Dielectric isolates FG charge; EG provides an FN exit under erase conditions.",
          "legend": [
            {
              "symbol": "e− / h+",
              "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
            },
            {
              "symbol": "I",
              "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
            },
            {
              "symbol": "Bias",
              "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
            },
            {
              "symbol": "Scale",
              "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
            },
            {
              "symbol": "FG / Q−",
              "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
            },
            {
              "symbol": "EG / SL / SG / BL / NW",
              "meaning": "EG is the published erase function; the remaining labels are pMOS teaching terminals. EG geometry/materials are not a current layout; its arrow expresses the FG-to-EG FN path."
            }
          ],
          "sourceIds": [
            "ip-neomtp",
            "ip-neomtp-pat",
            "ip-neobit"
          ]
        },
        "operations": [
          {
            "topicId": "ip-neomtp",
            "operationId": "write",
            "title": "NeoMTP — Program",
            "summary": "Carriers: hot holes induce hot electrons, which cross oxide into FG.",
            "sources": [
              {
                "id": "ip-neomtp",
                "label": "NeoMTP Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
              },
              {
                "id": "ip-neomtp-pat",
                "label": "Related pMOS and Edge-Erase-Gate Patent",
                "url": "https://patents.google.com/patent/US20030235082A1/en",
                "kind": "Public Patent",
                "date": "2003-12-25",
                "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
              },
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Hot-hole-induced electron injection",
                "summary": "Carriers: hot holes induce hot electrons, which cross oxide into FG.",
                "frames": [
                  {
                    "id": "neomtp-write-1",
                    "title": "Initial State",
                    "state": "Initial: less FG charge; p-channel is in the erased state.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: less FG charge; p-channel is in the erased state.",
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                  {
                    "id": "neomtp-write-2",
                    "title": "Apply Conditions",
                    "state": "Stimulus: selection establishes a lateral channel field.",
                    "stimulus": "Stimulus: selection establishes a lateral channel field.",
                    "caption": "Stimulus: selection establishes a lateral channel field.",
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fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Lateral field</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select and establish program field</text></svg>",
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                  {
                    "id": "neomtp-write-3",
                    "title": "Carrier Motion",
                    "state": "Carriers: hot holes induce hot electrons, which cross oxide into FG.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: hot holes induce hot electrons, which cross oxide into FG.",
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                      "ip-neobit"
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                  {
                    "id": "neomtp-write-4",
                    "title": "Retained Result",
                    "state": "Hold: negative FG charge remains; p-channel conducts at read bias.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Hold: negative FG charge remains; p-channel conducts at read bias.",
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font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><rect x=\"291\" y=\"140\" width=\"32\" height=\"34\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"113\" width=\"88\" height=\"27\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"82\" width=\"88\" height=\"31\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"338\" y=\"106\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">EG</text><text x=\"353\" y=\"158\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><circle data-charge=\"stored\" cx=\"288\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"288\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"313\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"313\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">State persists after stimulus removal</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "EG / SL / SG / BL / NW",
                    "meaning": "EG is the published erase function; the remaining labels are pMOS teaching terminals. EG geometry/materials are not a current layout; its arrow expresses the FG-to-EG FN path."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neomtp",
                    "label": "NeoMTP Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                    "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
                  },
                  {
                    "id": "ip-neomtp-pat",
                    "label": "Related pMOS and Edge-Erase-Gate Patent",
                    "url": "https://patents.google.com/patent/US20030235082A1/en",
                    "kind": "Public Patent",
                    "date": "2003-12-25",
                    "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                    "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
                  },
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  }
                ],
                "caveat": "Do not draw injected holes in FG or substitute conventional nMOS CHE; historical edge n+ EG requires separate attribution. SL, SG, BL and well contact follow the pMOS concept; EG is a published erase terminal. Current EG doping, geometry and voltages are not fully disclosed. These are teaching terminals, not an official pin table."
              }
            ]
          },
          {
            "topicId": "ip-neomtp",
            "operationId": "erase",
            "title": "NeoMTP — Erase",
            "summary": "EG removes electrons for later reinjection; the OTP electrical-erase boundary does not apply.",
            "sources": [
              {
                "id": "ip-neomtp",
                "label": "NeoMTP Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
              },
              {
                "id": "ip-neomtp-pat",
                "label": "Related pMOS and Edge-Erase-Gate Patent",
                "url": "https://patents.google.com/patent/US20030235082A1/en",
                "kind": "Public Patent",
                "date": "2003-12-25",
                "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
              },
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "FN",
                "summary": "EG removes electrons for later reinjection; the OTP electrical-erase boundary does not apply.",
                "frames": [
                  {
                    "id": "neomtp-erase-1",
                    "title": "Programmed State",
                    "state": "Initial: FG retains programmed negative charge.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Initial: FG retains programmed negative charge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-erase-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-erase-0-en-title\">NeoMTP — Erase — Programmed State</title><defs><marker id=\"emip-neomtp-erase-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-0-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" 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cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Before erase: FG retains charge</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  },
                  {
                    "id": "neomtp-erase-2",
                    "title": "Switch Terminal Conditions",
                    "state": "Stimulus: EG erase conditions establish charge-removal field.",
                    "stimulus": "Stimulus: EG erase conditions establish charge-removal field.",
                    "caption": "Stimulus: EG erase conditions establish charge-removal field.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-erase-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-erase-1-en-title\">NeoMTP — Erase — Switch Terminal Conditions</title><defs><marker id=\"emip-neomtp-erase-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" 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cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M310 177V105\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neomtp-erase-1-en-e)\"/><text x=\"395\" y=\"157\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Establish charge-removal field</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  },
                  {
                    "id": "neomtp-erase-3",
                    "title": "Remove Electrons",
                    "state": "Carriers: electrons tunnel from FG toward EG by FN.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Carriers: electrons tunnel from FG toward EG by FN.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-erase-2-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-erase-2-en-title\">NeoMTP — Erase — Remove Electrons</title><defs><marker id=\"emip-neomtp-erase-2-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-2-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-2-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" 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/><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" 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font-weight=\"600\">NW</text><rect x=\"291\" y=\"140\" width=\"32\" height=\"34\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"113\" width=\"88\" height=\"27\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"82\" width=\"88\" height=\"31\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"338\" y=\"106\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">EG</text><text x=\"353\" y=\"158\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><circle data-charge=\"stored\" cx=\"288\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"288\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"313\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"313\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M310 177V105\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neomtp-erase-2-en-e)\"/><circle data-charge=\"mobile\" cx=\"310\" cy=\"128\" r=\"11\" fill=\"#075f9d\"/><text x=\"310\" y=\"136\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"395\" y=\"157\" text-anchor=\"middle\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">e−: FG → EG · FN</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  },
                  {
                    "id": "neomtp-erase-4",
                    "title": "Ready to Reprogram",
                    "state": "Result: reduced FG electrons turn the p-channel off at specified read bias.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: reduced FG electrons turn the p-channel off at specified read bias.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-erase-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-erase-3-en-title\">NeoMTP — Erase — Ready to Reprogram</title><defs><marker id=\"emip-neomtp-erase-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-erase-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><path d=\"M94 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"94\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SL</text><path d=\"M162 82V178\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"162\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><path d=\"M408 82V230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"408\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">BL</text><path d=\"M478 82V295\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"478\" y=\"69\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">NW</text><rect x=\"291\" y=\"140\" width=\"32\" height=\"34\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"113\" width=\"88\" height=\"27\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"269\" y=\"82\" width=\"88\" height=\"31\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"338\" y=\"106\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">EG</text><text x=\"353\" y=\"158\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Charge reduced; ready to reprogram</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "EG / SL / SG / BL / NW",
                    "meaning": "EG is the published erase function; the remaining labels are pMOS teaching terminals. EG geometry/materials are not a current layout; its arrow expresses the FG-to-EG FN path."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neomtp",
                    "label": "NeoMTP Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                    "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
                  },
                  {
                    "id": "ip-neomtp-pat",
                    "label": "Related pMOS and Edge-Erase-Gate Patent",
                    "url": "https://patents.google.com/patent/US20030235082A1/en",
                    "kind": "Public Patent",
                    "date": "2003-12-25",
                    "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                    "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
                  },
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  }
                ],
                "caveat": "Do not draw injected holes in FG or substitute conventional nMOS CHE; historical edge n+ EG requires separate attribution. SL, SG, BL and well contact follow the pMOS concept; EG is a published erase terminal. Current EG doping, geometry and voltages are not fully disclosed. These are teaching terminals, not an official pin table."
              }
            ]
          },
          {
            "topicId": "ip-neomtp",
            "operationId": "read",
            "title": "NeoMTP — Read",
            "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
            "sources": [
              {
                "id": "ip-neomtp",
                "label": "NeoMTP Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
              },
              {
                "id": "ip-neomtp-pat",
                "label": "Related pMOS and Edge-Erase-Gate Patent",
                "url": "https://patents.google.com/patent/US20030235082A1/en",
                "kind": "Public Patent",
                "date": "2003-12-25",
                "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
              },
              {
                "id": "ip-neobit",
                "label": "NeoBit Technical Principles",
                "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                "kind": "Primary Technical Source",
                "date": "Undated; checked 2026-09-10",
                "locator": "Technical Principles",
                "limit": "Current product principle; full biases and layout are not disclosed."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Named IP Public-Principle Reconstruction",
                "mechanism": "Channel-current sensing",
                "summary": "Sense output current while preserving the stored state; the macro defines logic coding.",
                "frames": [
                  {
                    "id": "neomtp-read-1",
                    "title": "Retained State",
                    "state": "Hold: retain the FG state before reading; charge level affects the p-channel.",
                    "stimulus": "Retain the stored state before the operation.",
                    "caption": "Hold: retain the FG state before reading; charge level affects the p-channel.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-read-0-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-read-0-en-title\">NeoMTP — Read — Retained State</title><defs><marker id=\"emip-neomtp-read-0-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-0-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-0-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" 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cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Low-field sensing; state retained</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  },
                  {
                    "id": "neomtp-read-2",
                    "title": "Select the Cell",
                    "state": "Stimulus: apply read conditions; EG does not erase.",
                    "stimulus": "Stimulus: apply read conditions; EG does not erase.",
                    "caption": "Stimulus: apply read conditions; EG does not erase.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-read-1-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-read-1-en-title\">NeoMTP — Read — Select the Cell</title><defs><marker id=\"emip-neomtp-read-1-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-1-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-1-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-1-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" 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                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
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                    ]
                  },
                  {
                    "id": "neomtp-read-3",
                    "title": "Sense the Path",
                    "state": "Path: holes move along the p-channel without net FG charge transfer.",
                    "stimulus": "Maintain the operating conditions and observe the carrier or sensing path.",
                    "caption": "Path: holes move along the p-channel without net FG charge transfer.",
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                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  },
                  {
                    "id": "neomtp-read-4",
                    "title": "Compare the Result",
                    "state": "Result: compare channel current while retaining the stored state.",
                    "stimulus": "Return to retention conditions after the operation.",
                    "caption": "Result: compare channel current while retaining the stored state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 400\" role=\"img\" aria-labelledby=\"emip-neomtp-read-3-en-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"emip-neomtp-read-3-en-title\">NeoMTP — Read — Compare the Result</title><defs><marker id=\"emip-neomtp-read-3-en-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-3-en-h\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#bd354a\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-3-en-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker><marker id=\"emip-neomtp-read-3-en-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">pMOS + EG Functional Model</text><rect x=\"26\" y=\"230\" width=\"505\" height=\"116\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"42\" y=\"230\" width=\"460\" height=\"89\" fill=\"#a9c7df\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"105\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">n-well</text><text x=\"281\" y=\"340\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p-Si</text><rect x=\"62\" y=\"230\" width=\"69\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"205\" y=\"230\" width=\"61\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"376\" y=\"230\" width=\"65\" height=\"36\" fill=\"#7d9fbb\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"211\" width=\"266\" height=\"19\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"122\" y=\"178\" width=\"81\" height=\"33\" fill=\"#9badba\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"265\" y=\"174\" width=\"123\" height=\"37\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><text x=\"162\" y=\"202\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><text x=\"96\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"236\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">p+</text><text x=\"408\" y=\"256\" text-anchor=\"middle\" fill=\"#16334c\" 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cx=\"339\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"339\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"364\" cy=\"192\" r=\"11\" fill=\"#075f9d\"/><text x=\"364\" y=\"200\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M106 237H401\" fill=\"none\" stroke=\"#087968\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M143 286H398\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#emip-neomtp-read-3-en-i)\"/><text x=\"268\" y=\"309\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><circle data-charge=\"mobile\" cx=\"171\" cy=\"240\" r=\"11\" fill=\"#bd354a\"/><text x=\"171\" y=\"248\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><circle data-charge=\"mobile\" cx=\"309\" cy=\"240\" r=\"11\" fill=\"#bd354a\"/><text x=\"309\" y=\"248\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">+</text><text x=\"280\" y=\"395\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R(Q−) &gt; I_R(Q low)</text></svg>",
                    "sourceIds": [
                      "ip-neomtp",
                      "ip-neomtp-pat",
                      "ip-neobit"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue indicates electrons; red indicates holes. Arrows follow carriers."
                  },
                  {
                    "symbol": "I",
                    "meaning": "Green arrows show conventional current, opposite to electrons and aligned with holes."
                  },
                  {
                    "symbol": "Bias",
                    "meaning": "Only operating roles are shown; terminal voltages and pulse specifications are not supplied."
                  },
                  {
                    "symbol": "Scale",
                    "meaning": "Geometry and dielectrics are enlarged for readability, not a process layout."
                  },
                  {
                    "symbol": "FG / Q−",
                    "meaning": "FG is an isolated floating gate; blue minus signs indicate stored electrons."
                  },
                  {
                    "symbol": "EG / SL / SG / BL / NW",
                    "meaning": "EG is the published erase function; the remaining labels are pMOS teaching terminals. EG geometry/materials are not a current layout; its arrow expresses the FG-to-EG FN path."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-neomtp",
                    "label": "NeoMTP Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
                    "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
                  },
                  {
                    "id": "ip-neomtp-pat",
                    "label": "Related pMOS and Edge-Erase-Gate Patent",
                    "url": "https://patents.google.com/patent/US20030235082A1/en",
                    "kind": "Public Patent",
                    "date": "2003-12-25",
                    "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
                    "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
                  },
                  {
                    "id": "ip-neobit",
                    "label": "NeoBit Technical Principles",
                    "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
                    "kind": "Primary Technical Source",
                    "date": "Undated; checked 2026-09-10",
                    "locator": "Technical Principles",
                    "limit": "Current product principle; full biases and layout are not disclosed."
                  }
                ],
                "caveat": "Do not draw injected holes in FG or substitute conventional nMOS CHE; historical edge n+ EG requires separate attribution. SL, SG, BL and well contact follow the pMOS concept; EG is a published erase terminal. Current EG doping, geometry and voltages are not fully disclosed. These are teaching terminals, not an official pin table."
              }
            ]
          }
        ]
      },
      {
        "id": "ymc-mtp",
        "title": "YMC MTP: Program, Erase and Public Evidence",
        "shortTitle": "YMC · MTP and Mechanism Boundaries",
        "vendor": "Yield Microelectronics (YMC)",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "YMC publicly identifies a logic-process MTP family. The CHI/BBHH sequence below is an independent mechanism illustration, not evidence that a current ymtp product uses BBHH. Separate product capability from an illustrative 1T1C model.",
        "program": "Product: programmable; illustration: CHI electron injection",
        "reverse": "Product: rewritable MTP; illustration: BBHH hole injection",
        "readout": "NMOS threshold and channel current",
        "lesson": "This is the CHI/BBHH mechanism model selected for this course. Public YMC material supports its logic-process MTP IP positioning; independent primary research supports the BBHH physics. The figure is not identified as a complete cross-section of a current ymtp version. FN, drain-avalanche hot-hole injection and band-to-band hot-hole injection are distinct paths, even when related patents share an assignee.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "Floating-Gate MTP in This Chapter: PGM / ERS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "The cited public product sources do not establish BBHH for a current ymtp version. The diagrams illustrate independent CHI/BBHH physics; obtain the target macro’s actual PGM/ERS mechanism, biases, granularity and cycling specification.",
          "sourceIds": [
            "ymc-product",
            "ymc-1t1c",
            "physics-bbhh-fg",
            "physics-btbt-carriers",
            "physics-fg-hole-erase"
          ],
          "before": "FG holds net negative charge from programming.",
          "mechanism": "Band-to-Band Carrier Generation Followed by Hot-Hole Injection into FG — Under this local field condition, a few red holes cross the dielectric into FG and reduce negative charge. Silicon BBT generation and subsequent dielectric injection each require suitable conditions; neither FN electron removal nor DAHHI avalanche generation is substituted.",
          "after": "Vth is lower and I_R is larger at the same read bias. This qualitative direction does not guarantee neutrality, a fixed endpoint or self-convergent erase."
        },
        "structure": {
          "title": "Independent Mechanism Study: CHI / BBHH Equivalent 1T1C",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-structure-0-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-structure-0-title\">Independent Mechanism Study: CHI / BBHH Equivalent 1T1C</title><defs><marker id=\"ymc-en-structure-0-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-structure-0-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-structure-0-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-structure-0-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Equivalent 1T1C Floating-Gate Cell</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Capacitive Control and Charge Storage</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><text x=\"228\" y=\"106\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Isolated Storage</text><path d=\"M422 194H316\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"459\" y=\"201\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Dielectric</text><text x=\"226\" y=\"235\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Channel</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"215\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"215\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Equivalent Model · Not to Scale · No Numerical</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Biases</text></svg>",
          "caption": "One nMOS and one functional coupling capacitor share FG. Official information supports ymtp and the 1T1C family; this original equivalent drawing does not assert current product junctions, wells or dimensions. FG and CG have no DC short.",
          "legend": [
            {
              "symbol": "FG / Cc / CG",
              "meaning": "FG is a floating gate with no DC terminal. Cc is a functional coupling capacitor; CG is its external control terminal."
            },
            {
              "symbol": "N+ / p / B",
              "meaning": "N+ denotes model source/drain regions, p the nMOS body, and B its terminal. Concentrations, well layout and dimensions are unspecified."
            },
            {
              "symbol": "S / D*",
              "meaning": "S is the model source. D* is the selected high-field end and model drain, not a ymtp macro-pin mapping."
            },
            {
              "symbol": "e− / h+",
              "meaning": "Blue e− and arrows represent electrons; red h+ and arrows represent holes. Particle counts and animation speed are qualitative."
            },
            {
              "symbol": "I / I_R / Iref",
              "meaning": "Green I is conventional current, opposite to electron motion. I_R is read current and Iref is the sensing reference."
            },
            {
              "symbol": "BBT / BBHH",
              "meaning": "BBT is band-to-band tunneling in silicon. BBHH uses the resulting holes for hot-hole injection; crossing the dielectric is a subsequent step."
            },
            {
              "symbol": "Vth / QFG",
              "meaning": "Vth is the effective nMOS threshold and QFG is FG charge. The actual product defines biases, sensing margins and logic encoding."
            }
          ],
          "sourceIds": [
            "ymc-product",
            "ymc-1t1c",
            "physics-bbhh-fg"
          ]
        },
        "operations": [
          {
            "topicId": "ip-ymc-mtp",
            "operationId": "write",
            "title": "CHI Program: Electrons Enter the Floating Gate",
            "summary": "CG controls the channel through the coupling capacitor. Electrons accelerate near the model high-field end; a fraction crosses the dielectric, producing higher Vth and lower read current.",
            "sources": [
              {
                "id": "ymc-product",
                "label": "YMC: Logic-Process ymtp MTP IP",
                "url": "https://www.ymc.com.tw/index_en.php",
                "kind": "Manufacturer Information",
                "date": "Undated; accessed 2026-09-10",
                "locator": "About YMC paragraph",
                "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
              },
              {
                "id": "ymc-1t1c",
                "label": "YMC: 1T1C Core Technology",
                "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                "kind": "Manufacturer Information",
                "date": "2024; accessed 2026-09-10",
                "locator": "Pre-listing business presentation, page 25",
                "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
              },
              {
                "id": "ymc-pat-7423903",
                "label": "YMC: Historical Single-Floating-Gate Example",
                "url": "https://patents.google.com/patent/US7423903B2/en",
                "kind": "Public Patent",
                "date": "2008-09-09; accessed 2026-09-10",
                "locator": "Figures 1, 2A and 2B; first embodiment; FN erase in Summary",
                "limit": "Four-terminal nMOS/N-type capacitor example; its stated FN erase is not evidence for BBHH."
              },
              {
                "id": "ymc-pat-dahhi",
                "label": "YMC: DAHCI Program and DAHHI Erase Variant",
                "url": "https://patents.google.com/patent/US20070158733A1/en",
                "kind": "Public Patent",
                "date": "2007-07-12; accessed 2026-09-10",
                "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
                "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
              }
            ],
            "variants": [
              {
                "id": "mechanism-model",
                "title": "CHI Program: Electrons Enter the Floating Gate",
                "mechanism": "Channel Hot-Carrier Injection; Electrons Enter FG in This nMOS Model",
                "summary": "CG controls the channel through the coupling capacitor. Electrons accelerate near the model high-field end; a fraction crosses the dielectric, producing higher Vth and lower read current.",
                "frames": [
                  {
                    "id": "write-1",
                    "title": "Form the Conducting Channel",
                    "state": "FG holds its initial charge.",
                    "stimulus": "CG couples through Cc; D* is above S.",
                    "caption": "CG and FG remain separated by the capacitor dielectric; an electron channel forms between the model source and drain.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-write-0-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-write-0-title\">Form the Conducting Channel</title><defs><marker id=\"ymc-en-write-0-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-0-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-0-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-0-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CHI · Electron Programming</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; S · CG → Cc → FG</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M139 221H305\" fill=\"none\" stroke=\"#087766\" stroke-width=\"4\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"223\" y=\"246\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Channel Forms</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"352\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">CG Controls FG through Cc, without a DC Short</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-7423903",
                      "ymc-pat-dahhi"
                    ]
                  },
                  {
                    "id": "write-2",
                    "title": "Accelerate Channel Electrons",
                    "state": "Electrons move from S through the channel toward D*.",
                    "stimulus": "The source/drain potential difference establishes a lateral field.",
                    "caption": "Blue arrows follow electrons; green arrows show conventional current in the opposite direction. Only a fraction acquires sufficient injection energy.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-write-1-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-write-1-title\">Accelerate Channel Electrons</title><defs><marker id=\"ymc-en-write-1-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-1-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-1-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-1-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CHI · Electron Programming</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; S · CG → Cc → FG</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M145 221H292\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-write-1-electron)\"/><circle cx=\"171\" cy=\"221\" r=\"10\" fill=\"#075f9d\"/><text x=\"171\" y=\"228\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"217\" cy=\"221\" r=\"10\" fill=\"#075f9d\"/><text x=\"217\" y=\"228\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M287 251H156\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-write-1-current)\"/><text x=\"321\" y=\"259\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"352\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">e−: S → D*, Accelerated near the High-Field End</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-7423903",
                      "ymc-pat-dahhi"
                    ]
                  },
                  {
                    "id": "write-3",
                    "title": "Inject Energetic Electrons into FG",
                    "state": "Some high-field electrons have gained energy; local E⊥ points toward silicon at the injection region.",
                    "stimulus": "Channel acceleration combines with local E⊥ toward silicon, so the electron force is toward FG.",
                    "caption": "The local vertical field is an explicit injection condition, not implied by D* relative to S alone. Electrons cross the dielectric into FG and increase negative charge; this is neither oxide rupture nor a CG-to-FG DC connection.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-write-2-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-write-2-title\">Inject Energetic Electrons into FG</title><defs><marker id=\"ymc-en-write-2-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-2-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-2-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-2-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CHI · Electron Programming</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; S · CG → Cc → FG</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"215\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"215\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M145 221H292\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-write-2-electron)\"/><circle cx=\"171\" cy=\"221\" r=\"10\" fill=\"#075f9d\"/><text x=\"171\" y=\"228\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"217\" cy=\"221\" r=\"10\" fill=\"#075f9d\"/><text x=\"217\" y=\"228\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M288 221Q301 203 280 181\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-write-2-electron)\"/><circle cx=\"286\" cy=\"200\" r=\"10\" fill=\"#075f9d\"/><text x=\"286\" y=\"207\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><path d=\"M287 251H156\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-write-2-current)\"/><text x=\"321\" y=\"259\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Some Energetic Electrons Cross the Dielectric</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">into FG</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-7423903",
                      "ymc-pat-dahhi"
                    ]
                  },
                  {
                    "id": "write-4",
                    "title": "Retain More Negative Charge",
                    "state": "FG stores more electrons after injection.",
                    "stimulus": "Remove program stimulation; compare later under read conditions.",
                    "caption": "At the same read bias, the effective nMOS has higher Vth and smaller I_R: the sensed consequence of its charge state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-write-3-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-write-3-title\">Retain More Negative Charge</title><defs><marker id=\"ymc-en-write-3-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-3-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-3-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-write-3-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CHI · Electron Programming</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; S · CG → Cc → FG</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"172\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"172\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"207\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"207\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"242\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"242\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"277\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"277\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><text x=\"223\" y=\"232\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Charge Retained</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"352\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG: more e− · Vth ↑ · I_R ↓</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-7423903",
                      "ymc-pat-dahhi"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / Cc / CG",
                    "meaning": "FG is a floating gate with no DC terminal. Cc is a functional coupling capacitor; CG is its external control terminal."
                  },
                  {
                    "symbol": "N+ / p / B",
                    "meaning": "N+ denotes model source/drain regions, p the nMOS body, and B its terminal. Concentrations, well layout and dimensions are unspecified."
                  },
                  {
                    "symbol": "S / D*",
                    "meaning": "S is the model source. D* is the selected high-field end and model drain, not a ymtp macro-pin mapping."
                  },
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue e− and arrows represent electrons; red h+ and arrows represent holes. Particle counts and animation speed are qualitative."
                  },
                  {
                    "symbol": "I / I_R / Iref",
                    "meaning": "Green I is conventional current, opposite to electron motion. I_R is read current and Iref is the sensing reference."
                  },
                  {
                    "symbol": "BBT / BBHH",
                    "meaning": "BBT is band-to-band tunneling in silicon. BBHH uses the resulting holes for hot-hole injection; crossing the dielectric is a subsequent step."
                  },
                  {
                    "symbol": "Vth / QFG",
                    "meaning": "Vth is the effective nMOS threshold and QFG is FG charge. The actual product defines biases, sensing margins and logic encoding."
                  }
                ],
                "sources": [
                  {
                    "id": "ymc-product",
                    "label": "YMC: Logic-Process ymtp MTP IP",
                    "url": "https://www.ymc.com.tw/index_en.php",
                    "kind": "Manufacturer Information",
                    "date": "Undated; accessed 2026-09-10",
                    "locator": "About YMC paragraph",
                    "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
                  },
                  {
                    "id": "ymc-1t1c",
                    "label": "YMC: 1T1C Core Technology",
                    "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                    "kind": "Manufacturer Information",
                    "date": "2024; accessed 2026-09-10",
                    "locator": "Pre-listing business presentation, page 25",
                    "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
                  },
                  {
                    "id": "ymc-pat-7423903",
                    "label": "YMC: Historical Single-Floating-Gate Example",
                    "url": "https://patents.google.com/patent/US7423903B2/en",
                    "kind": "Public Patent",
                    "date": "2008-09-09; accessed 2026-09-10",
                    "locator": "Figures 1, 2A and 2B; first embodiment; FN erase in Summary",
                    "limit": "Four-terminal nMOS/N-type capacitor example; its stated FN erase is not evidence for BBHH."
                  },
                  {
                    "id": "ymc-pat-dahhi",
                    "label": "YMC: DAHCI Program and DAHHI Erase Variant",
                    "url": "https://patents.google.com/patent/US20070158733A1/en",
                    "kind": "Public Patent",
                    "date": "2007-07-12; accessed 2026-09-10",
                    "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
                    "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
                  }
                ],
                "caveat": "An independent CHI / BBHH teaching model; cited sources do not establish BBHH in current YMC ymtp products. It uses an equivalent 1T1C and qualitative directions rather than a current version-specific cross-section or bias table. Independent original research supports BBHH physics; YMC FN/DAHHI patent variants retain their distinct mechanisms."
              }
            ]
          },
          {
            "topicId": "ip-ymc-mtp",
            "operationId": "erase",
            "title": "BBHH Erase: Holes Reduce Negative FG Charge",
            "summary": "A high-field region in silicon first produces electron/hole pairs. Some holes then cross the dielectric into FG. Silicon BBT and hot-carrier injection into FG are distinct physical steps.",
            "sources": [
              {
                "id": "ymc-product",
                "label": "YMC: Logic-Process ymtp MTP IP",
                "url": "https://www.ymc.com.tw/index_en.php",
                "kind": "Manufacturer Information",
                "date": "Undated; accessed 2026-09-10",
                "locator": "About YMC paragraph",
                "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
              },
              {
                "id": "ymc-1t1c",
                "label": "YMC: 1T1C Core Technology",
                "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                "kind": "Manufacturer Information",
                "date": "2024; accessed 2026-09-10",
                "locator": "Pre-listing business presentation, page 25",
                "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
              },
              {
                "id": "physics-bbhh-fg",
                "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
                "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
                "kind": "Original Research",
                "date": "2007; accessed 2026-09-10",
                "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
                "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
              },
              {
                "id": "physics-btbt-carriers",
                "label": "Chu and Wu: BTBT Hot-Carrier Paths",
                "url": "https://ir.lib.nycu.edu.tw/bitstream/11536/30685/1/000085620800010.pdf",
                "kind": "Original Research",
                "date": "2000-03; accessed 2026-09-10",
                "locator": "IEEE EDL 21(3), page 123 Introduction; page 125 Figure 4; DOI 10.1109/55.823576",
                "limit": "Supports silicon BBT carrier generation and field-assisted injection; Figure 3 is pMOS and is not copied into the nMOS model."
              },
              {
                "id": "physics-fg-hole-erase",
                "label": "IEEE: Hot-Hole Injection into a Floating Gate",
                "url": "https://ieeexplore.ieee.org/document/748914/",
                "kind": "Original Research",
                "date": "1999-03; accessed 2026-09-10",
                "locator": "IEEE EDL 20(3), pages 140–142; abstract; DOI 10.1109/55.748914",
                "limit": "Observes BBT/possible avalanche enhancement during FN erase; used only for floating-gate hot-hole physics, not a pure-BBHH recipe."
              }
            ],
            "variants": [
              {
                "id": "mechanism-model",
                "title": "BBHH Erase: Holes Reduce Negative FG Charge",
                "mechanism": "Band-to-Band Carrier Generation Followed by Hot-Hole Injection into FG",
                "summary": "A high-field region in silicon first produces electron/hole pairs. Some holes then cross the dielectric into FG. Silicon BBT and hot-carrier injection into FG are distinct physical steps.",
                "frames": [
                  {
                    "id": "erase-1",
                    "title": "Establish the High-Field Junction",
                    "state": "FG holds net negative charge from programming.",
                    "stimulus": "D* is positive relative to B; FG is lower than D*. Injection also requires local E⊥ toward FG.",
                    "caption": "Terminal relationships describe the model junction condition but do not alone guarantee the local vertical field. E⊥ toward FG is a separate condition; D* is not a current ymtp terminal specification.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-erase-0-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-erase-0-title\">Establish the High-Field Junction</title><defs><marker id=\"ymc-en-erase-0-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-0-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-0-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-0-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBHH · Hot-Hole Erase</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; B · FG &lt; D*</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"172\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"172\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"207\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"207\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"242\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"242\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"277\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"277\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><ellipse cx=\"308\" cy=\"217\" rx=\"35\" ry=\"30\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\" stroke-dasharray=\"5 4\"/><path d=\"M418 249L338 230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"454\" y=\"255\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBT</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Junction and Gate Fields at the Model High-Field</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">End</text></svg>",
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                      "physics-btbt-carriers",
                      "physics-fg-hole-erase"
                    ]
                  },
                  {
                    "id": "erase-2",
                    "title": "Generate Holes by BBT in Silicon",
                    "state": "Band bending in the high-field region permits BBT.",
                    "stimulus": "A valence-band electron tunnels into the conduction band, leaving a hole.",
                    "caption": "Electrons are collected by the high-field junction while holes move toward the channel/body side. This tunneling occurs in silicon, not across the FG oxide.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-erase-1-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-erase-1-title\">Generate Holes by BBT in Silicon</title><defs><marker id=\"ymc-en-erase-1-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-1-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-1-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-1-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBHH · Hot-Hole Erase</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; B · FG &lt; D*</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"172\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"172\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"207\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"207\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"242\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"242\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"277\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"277\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><ellipse cx=\"308\" cy=\"217\" rx=\"35\" ry=\"30\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\" stroke-dasharray=\"5 4\"/><path d=\"M418 249L338 230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"454\" y=\"255\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBT</text><circle cx=\"307\" cy=\"217\" r=\"10\" fill=\"#075f9d\"/><text x=\"307\" y=\"224\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"277\" cy=\"235\" r=\"10\" fill=\"#b52f43\"/><text x=\"277\" y=\"242\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">+</text><path d=\"M320 218H365\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-erase-1-electron)\"/><path d=\"M296 234H251\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-erase-1-hole)\"/><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"352\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">In Silicon: Valence → Conduction Band; e− / h+</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "physics-bbhh-fg",
                      "physics-btbt-carriers",
                      "physics-fg-hole-erase"
                    ]
                  },
                  {
                    "id": "erase-3",
                    "title": "Inject Hot Holes into FG",
                    "state": "Some holes have gained energy; local E⊥ points toward FG at the injection region.",
                    "stimulus": "Lateral acceleration combines with local E⊥ toward FG; hole force follows the field.",
                    "caption": "Under this local field condition, a few red holes cross the dielectric into FG and reduce negative charge. Silicon BBT generation and subsequent dielectric injection each require suitable conditions; neither FN electron removal nor DAHHI avalanche generation is substituted.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-erase-2-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-erase-2-title\">Inject Hot Holes into FG</title><defs><marker id=\"ymc-en-erase-2-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-2-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-2-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-2-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBHH · Hot-Hole Erase</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; B · FG &lt; D*</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"215\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"215\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"250\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"250\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><ellipse cx=\"308\" cy=\"217\" rx=\"35\" ry=\"30\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\" stroke-dasharray=\"5 4\"/><path d=\"M418 249L338 230\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"454\" y=\"255\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBT</text><circle cx=\"307\" cy=\"217\" r=\"10\" fill=\"#075f9d\"/><text x=\"307\" y=\"224\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><circle cx=\"277\" cy=\"235\" r=\"10\" fill=\"#b52f43\"/><text x=\"277\" y=\"242\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">+</text><path d=\"M320 218H365\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-erase-2-electron)\"/><path d=\"M296 234H251\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-erase-2-hole)\"/><path d=\"M264 230Q268 201 256 183\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-erase-2-hole)\"/><circle cx=\"264\" cy=\"202\" r=\"10\" fill=\"#b52f43\"/><text x=\"264\" y=\"209\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">+</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Some h+ Cross the Dielectric, Reducing Negative</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">FG Charge</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "physics-bbhh-fg",
                      "physics-btbt-carriers",
                      "physics-fg-hole-erase"
                    ]
                  },
                  {
                    "id": "erase-4",
                    "title": "Reach a Lower-Threshold State",
                    "state": "FG holds less net negative charge.",
                    "stimulus": "End erase stimulation and return to read conditions.",
                    "caption": "Vth is lower and I_R is larger at the same read bias. This qualitative direction does not guarantee neutrality, a fixed endpoint or self-convergent erase.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-erase-3-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-erase-3-title\">Reach a Lower-Threshold State</title><defs><marker id=\"ymc-en-erase-3-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-3-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-3-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-erase-3-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">BBHH · Hot-Hole Erase</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">D* &gt; B · FG &lt; D*</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><circle cx=\"180\" cy=\"165\" r=\"10\" fill=\"#075f9d\"/><text x=\"180\" y=\"172\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#fff\">−</text><text x=\"223\" y=\"246\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">|QFG| ↓</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"352\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG: fewer e− · Vth ↓ · I_R ↑</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "physics-bbhh-fg",
                      "physics-btbt-carriers",
                      "physics-fg-hole-erase"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / Cc / CG",
                    "meaning": "FG is a floating gate with no DC terminal. Cc is a functional coupling capacitor; CG is its external control terminal."
                  },
                  {
                    "symbol": "N+ / p / B",
                    "meaning": "N+ denotes model source/drain regions, p the nMOS body, and B its terminal. Concentrations, well layout and dimensions are unspecified."
                  },
                  {
                    "symbol": "S / D*",
                    "meaning": "S is the model source. D* is the selected high-field end and model drain, not a ymtp macro-pin mapping."
                  },
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue e− and arrows represent electrons; red h+ and arrows represent holes. Particle counts and animation speed are qualitative."
                  },
                  {
                    "symbol": "I / I_R / Iref",
                    "meaning": "Green I is conventional current, opposite to electron motion. I_R is read current and Iref is the sensing reference."
                  },
                  {
                    "symbol": "BBT / BBHH",
                    "meaning": "BBT is band-to-band tunneling in silicon. BBHH uses the resulting holes for hot-hole injection; crossing the dielectric is a subsequent step."
                  },
                  {
                    "symbol": "Vth / QFG",
                    "meaning": "Vth is the effective nMOS threshold and QFG is FG charge. The actual product defines biases, sensing margins and logic encoding."
                  }
                ],
                "sources": [
                  {
                    "id": "ymc-product",
                    "label": "YMC: Logic-Process ymtp MTP IP",
                    "url": "https://www.ymc.com.tw/index_en.php",
                    "kind": "Manufacturer Information",
                    "date": "Undated; accessed 2026-09-10",
                    "locator": "About YMC paragraph",
                    "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
                  },
                  {
                    "id": "ymc-1t1c",
                    "label": "YMC: 1T1C Core Technology",
                    "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                    "kind": "Manufacturer Information",
                    "date": "2024; accessed 2026-09-10",
                    "locator": "Pre-listing business presentation, page 25",
                    "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
                  },
                  {
                    "id": "physics-bbhh-fg",
                    "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
                    "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
                    "kind": "Original Research",
                    "date": "2007; accessed 2026-09-10",
                    "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
                    "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
                  },
                  {
                    "id": "physics-btbt-carriers",
                    "label": "Chu and Wu: BTBT Hot-Carrier Paths",
                    "url": "https://ir.lib.nycu.edu.tw/bitstream/11536/30685/1/000085620800010.pdf",
                    "kind": "Original Research",
                    "date": "2000-03; accessed 2026-09-10",
                    "locator": "IEEE EDL 21(3), page 123 Introduction; page 125 Figure 4; DOI 10.1109/55.823576",
                    "limit": "Supports silicon BBT carrier generation and field-assisted injection; Figure 3 is pMOS and is not copied into the nMOS model."
                  },
                  {
                    "id": "physics-fg-hole-erase",
                    "label": "IEEE: Hot-Hole Injection into a Floating Gate",
                    "url": "https://ieeexplore.ieee.org/document/748914/",
                    "kind": "Original Research",
                    "date": "1999-03; accessed 2026-09-10",
                    "locator": "IEEE EDL 20(3), pages 140–142; abstract; DOI 10.1109/55.748914",
                    "limit": "Observes BBT/possible avalanche enhancement during FN erase; used only for floating-gate hot-hole physics, not a pure-BBHH recipe."
                  }
                ],
                "caveat": "An independent CHI / BBHH teaching model; cited sources do not establish BBHH in current YMC ymtp products. It uses an equivalent 1T1C and qualitative directions rather than a current version-specific cross-section or bias table. Independent original research supports BBHH physics; YMC FN/DAHHI patent variants retain their distinct mechanisms."
              }
            ]
          },
          {
            "topicId": "ip-ymc-mtp",
            "operationId": "read",
            "title": "Read: Translate FG Charge into a Current Difference",
            "summary": "A and B are fixed alternative initial states, not sequential updates. At the same read bias, A has more negative charge, higher Vth and smaller current; B has the opposite. Reading preserves either state.",
            "sources": [
              {
                "id": "ymc-product",
                "label": "YMC: Logic-Process ymtp MTP IP",
                "url": "https://www.ymc.com.tw/index_en.php",
                "kind": "Manufacturer Information",
                "date": "Undated; accessed 2026-09-10",
                "locator": "About YMC paragraph",
                "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
              },
              {
                "id": "ymc-1t1c",
                "label": "YMC: 1T1C Core Technology",
                "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                "kind": "Manufacturer Information",
                "date": "2024; accessed 2026-09-10",
                "locator": "Pre-listing business presentation, page 25",
                "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
              },
              {
                "id": "ymc-pat-dahhi",
                "label": "YMC: DAHCI Program and DAHHI Erase Variant",
                "url": "https://patents.google.com/patent/US20070158733A1/en",
                "kind": "Public Patent",
                "date": "2007-07-12; accessed 2026-09-10",
                "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
                "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
              },
              {
                "id": "physics-bbhh-fg",
                "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
                "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
                "kind": "Original Research",
                "date": "2007; accessed 2026-09-10",
                "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
                "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
              }
            ],
            "variants": [
              {
                "id": "mechanism-model",
                "title": "Read: Translate FG Charge into a Current Difference",
                "mechanism": "nMOS Threshold Modulation and Reference-Current Sensing",
                "summary": "A and B are fixed alternative initial states, not sequential updates. At the same read bias, A has more negative charge, higher Vth and smaller current; B has the opposite. Reading preserves either state.",
                "frames": [
                  {
                    "id": "read-1",
                    "title": "Apply the Same Read Conditions",
                    "state": "A and B are two separately established alternative initial states.",
                    "stimulus": "CG couples a control potential; S/D* provide the same sensing conditions.",
                    "caption": "All four frames retain the same two-state comparison. There is no A-to-B program or erase and no carrier transfer across the dielectric.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-read-0-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-read-0-title\">Apply the Same Read Conditions</title><defs><marker id=\"ymc-en-read-0-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-0-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-0-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-0-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Read · Current Sensing</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A / B: Alternative States at the Same Read Bias</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><text x=\"230\" y=\"171\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG (A / B)</text><path d=\"M284 248H161\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-read-0-current)\"/><text x=\"223\" y=\"236\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I_R ↔ Iref</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A: More Negative Charge · High Vth · Small I_R</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B: Less Negative Charge · Low Vth · Large I_R</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-dahhi",
                      "physics-bbhh-fg"
                    ]
                  },
                  {
                    "id": "read-2",
                    "title": "Alternative State A: Lower Read Current",
                    "state": "Before reading, A already has more negative charge and higher Vth.",
                    "stimulus": "Apply the same read bias used for B while retaining A charge.",
                    "caption": "This is an independent read example for A. Higher Vth gives smaller I_R; reading does not add FG electrons.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-read-1-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-read-1-title\">Alternative State A: Lower Read Current</title><defs><marker id=\"ymc-en-read-1-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-1-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-1-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-1-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Read · Current Sensing</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A / B: Alternative States at the Same Read Bias</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><text x=\"230\" y=\"171\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG (A / B)</text><path d=\"M284 248H161\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-read-1-current)\"/><text x=\"223\" y=\"236\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I_R ↔ Iref</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A: More Negative Charge · High Vth · Small I_R</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B: Less Negative Charge · Low Vth · Large I_R</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-dahhi",
                      "physics-bbhh-fg"
                    ]
                  },
                  {
                    "id": "read-3",
                    "title": "Alternative State B: Higher Read Current",
                    "state": "Before reading, B already has less negative charge and lower Vth.",
                    "stimulus": "Apply the same read bias used for A while retaining B charge.",
                    "caption": "B is an alternative example, not a conversion from A in the previous frame. Lower Vth gives larger I_R; the green arrow denotes conventional current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-read-2-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-read-2-title\">Alternative State B: Higher Read Current</title><defs><marker id=\"ymc-en-read-2-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-2-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-2-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-2-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Read · Current Sensing</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A / B: Alternative States at the Same Read Bias</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><text x=\"230\" y=\"171\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG (A / B)</text><path d=\"M284 248H161\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-read-2-current)\"/><text x=\"223\" y=\"236\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I_R ↔ Iref</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A: More Negative Charge · High Vth · Small I_R</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B: Less Negative Charge · Low Vth · Large I_R</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-dahhi",
                      "physics-bbhh-fg"
                    ]
                  },
                  {
                    "id": "read-4",
                    "title": "Sense the Existing State with Iref",
                    "state": "A and B retain their respective charge and produce different read currents.",
                    "stimulus": "The sensing circuit compares I_R with Iref without updating FG.",
                    "caption": "Iref must separate the states with adequate margin; the comparison is unchanged from earlier frames. Process, temperature and usage history affect the window; product specifications define margins and 0/1 encoding.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 390\" role=\"img\" aria-labelledby=\"ymc-en-read-3-title\" style=\"font-family:Arial,'Microsoft JhengHei',sans-serif;background:#f7f9fc\"><title id=\"ymc-en-read-3-title\">Sense the Existing State with Iref</title><defs><marker id=\"ymc-en-read-3-electron\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-3-hole\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-3-current\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker><marker id=\"ymc-en-read-3-ink\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"30\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Read · Current Sensing</text><text x=\"280\" y=\"64\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A / B: Alternative States at the Same Read Bias</text><rect x=\"38\" y=\"208\" width=\"368\" height=\"91\" fill=\"#d7e6f0\" stroke=\"#16334c\" stroke-width=\"1.5\" rx=\"3\"/><rect x=\"58\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"306\" y=\"208\" width=\"80\" height=\"34\" fill=\"#92b6cf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"145\" y=\"187\" width=\"170\" height=\"21\" fill=\"#f6e9bf\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"150\" y=\"142\" width=\"160\" height=\"45\" fill=\"#d6bd81\" stroke=\"#16334c\" stroke-width=\"1.5\" /><text x=\"98\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"346\" y=\"233\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">N+</text><text x=\"240\" y=\"278\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">p</text><path d=\"M98 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"98\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">S</text><path d=\"M346 208V180\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"346\" y=\"169\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">D*</text><path d=\"M65 299V282\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"65\" y=\"276\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B</text><text x=\"230\" y=\"131\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">FG</text><path d=\"M448 101V120M416 120H480M416 143H480M448 143V154H397V108H320V165H310\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"448\" y=\"92\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">CG</text><text x=\"506\" y=\"140\" text-anchor=\"middle\" font-size=\"22\" font-weight=\"600\" fill=\"#16334c\">Cc</text><path d=\"M377 282H294\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"1.5\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"439\" y=\"284\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">Body</text><text x=\"230\" y=\"171\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">QFG (A / B)</text><path d=\"M284 248H161\" fill=\"none\" stroke=\"#087766\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" marker-end=\"url(#ymc-en-read-3-current)\"/><text x=\"223\" y=\"236\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#087766\">I_R ↔ Iref</text><rect x=\"10\" y=\"315\" width=\"540\" height=\"62\" rx=\"6\" fill=\"#e8eff5\"/><text x=\"280\" y=\"338\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">A: More Negative Charge · High Vth · Small I_R</text><text x=\"280\" y=\"362\" text-anchor=\"middle\" font-size=\"20\" font-weight=\"600\" fill=\"#16334c\">B: Less Negative Charge · Low Vth · Large I_R</text></svg>",
                    "sourceIds": [
                      "ymc-product",
                      "ymc-1t1c",
                      "ymc-pat-dahhi",
                      "physics-bbhh-fg"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / Cc / CG",
                    "meaning": "FG is a floating gate with no DC terminal. Cc is a functional coupling capacitor; CG is its external control terminal."
                  },
                  {
                    "symbol": "N+ / p / B",
                    "meaning": "N+ denotes model source/drain regions, p the nMOS body, and B its terminal. Concentrations, well layout and dimensions are unspecified."
                  },
                  {
                    "symbol": "S / D*",
                    "meaning": "S is the model source. D* is the selected high-field end and model drain, not a ymtp macro-pin mapping."
                  },
                  {
                    "symbol": "e− / h+",
                    "meaning": "Blue e− and arrows represent electrons; red h+ and arrows represent holes. Particle counts and animation speed are qualitative."
                  },
                  {
                    "symbol": "I / I_R / Iref",
                    "meaning": "Green I is conventional current, opposite to electron motion. I_R is read current and Iref is the sensing reference."
                  },
                  {
                    "symbol": "BBT / BBHH",
                    "meaning": "BBT is band-to-band tunneling in silicon. BBHH uses the resulting holes for hot-hole injection; crossing the dielectric is a subsequent step."
                  },
                  {
                    "symbol": "Vth / QFG",
                    "meaning": "Vth is the effective nMOS threshold and QFG is FG charge. The actual product defines biases, sensing margins and logic encoding."
                  }
                ],
                "sources": [
                  {
                    "id": "ymc-product",
                    "label": "YMC: Logic-Process ymtp MTP IP",
                    "url": "https://www.ymc.com.tw/index_en.php",
                    "kind": "Manufacturer Information",
                    "date": "Undated; accessed 2026-09-10",
                    "locator": "About YMC paragraph",
                    "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
                  },
                  {
                    "id": "ymc-1t1c",
                    "label": "YMC: 1T1C Core Technology",
                    "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
                    "kind": "Manufacturer Information",
                    "date": "2024; accessed 2026-09-10",
                    "locator": "Pre-listing business presentation, page 25",
                    "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
                  },
                  {
                    "id": "ymc-pat-dahhi",
                    "label": "YMC: DAHCI Program and DAHHI Erase Variant",
                    "url": "https://patents.google.com/patent/US20070158733A1/en",
                    "kind": "Public Patent",
                    "date": "2007-07-12; accessed 2026-09-10",
                    "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
                    "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
                  },
                  {
                    "id": "physics-bbhh-fg",
                    "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
                    "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
                    "kind": "Original Research",
                    "date": "2007; accessed 2026-09-10",
                    "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
                    "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
                  }
                ],
                "caveat": "An independent CHI / BBHH teaching model; cited sources do not establish BBHH in current YMC ymtp products. It uses an equivalent 1T1C and qualitative directions rather than a current version-specific cross-section or bias table. Independent original research supports BBHH physics; YMC FN/DAHHI patent variants retain their distinct mechanisms."
              }
            ]
          }
        ]
      },
      {
        "id": "impinj-aeon",
        "title": "AEON: An Impinj-Origin FN/FN MTP Family",
        "shortTitle": "AEON · FN/FN MTP",
        "vendor": "Impinj → Virage Logic → Synopsys",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "Follow the named 2009 AEON company account: electrons enter and leave FG by FN, then a read MOS senses the state. Business and brand succession have a separate timeline.",
        "program": "FN adds electrons to floating gate",
        "reverse": "FN removes electrons from floating gate",
        "readout": "Low-stimulus read-MOS current sensing",
        "lesson": "AEON is a named logic-process MTP family originating at Impinj. A 2009 Virage Logic company article explicitly supports FN program and erase. The diagram retains that physical scope through C, T_P, T_E and read-MOS roles, without assuming undisclosed p/n polarity, device count or current wiring.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "Floating-Gate MTP in This Chapter: PGM / ERS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation; it does not require every carrier to disappear. Whether the host issues a separate erase command depends on the macro or component interface.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "aeon-impinj-2007",
            "aeon-virage-fn-2009"
          ],
          "before": "FG retains negative charge from the previous program operation.",
          "mechanism": "FN — Erase is represented as electron removal, not neutralization by injected holes.",
          "after": "Electrical erase and reprogramming enable MTP. Particle counts do not imply endurance, speed or retention specifications."
        },
        "structure": {
          "title": "AEON MTP — Functional Cell Structure",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-structure-0-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-structure-0-title\">AEON MTP — Functional Cell Structure</title><defs><marker id=\"ip-impinj-aeon-en-structure-0-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-structure-0-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-structure-0-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P / T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C / T: functional roles; FG has no DC pin</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Not to scale; device count unspecified</text></svg>",
          "caption": "Public FN/FN functional model: coupling role C, isolated floating gate FG, tunnel counterparts and a read MOS. Floating-gate product positioning and named FN program/erase evidence are attributed separately. This original functional reconstruction leaves undisclosed physical wiring unspecified.",
          "legend": [
            {
              "symbol": "FG / e−",
              "meaning": "The brown FG is dielectric-isolated and has no external DC connection. Blue minus signs denote electrons; their count is qualitative."
            },
            {
              "symbol": "C / T_P / T_E",
              "meaning": "C denotes capacitive coupling. T_P and T_E denote program/erase tunnel counterparts. Reusing the enlarged window does not assert one physical terminal or a fixed device count."
            },
            {
              "symbol": "Si / Dielectric",
              "meaning": "Blue-gray regions represent silicon functions; pale yellow represents insulating dielectric. Doping, thickness, relative size and actual layout are unspecified."
            },
            {
              "symbol": "e− / E",
              "meaning": "Blue open arrows show electron motion. Brown arrows show the tunnel-region electric field E, opposite to electron force. Program adds FG electrons; erase removes them in this convention. No official 0/1 coding is assigned."
            },
            {
              "symbol": "A / B / I_R",
              "meaning": "A and B are functional read terminals, not official pins. The green arrow denotes conventional sensing current for A above B. MOS polarity is unspecified, so no carrier direction or fixed charge-to-ON/OFF relation is assigned."
            },
            {
              "symbol": "2009 AEON / FN–FN",
              "meaning": "The model follows the named 2009 AEON company article. Business transfers and Synopsys branding form a separate timeline and do not prove identical internal cells across generations."
            }
          ],
          "sourceIds": [
            "aeon-impinj-2007",
            "aeon-virage-fn-2009"
          ]
        },
        "operations": [
          {
            "topicId": "ip-impinj-aeon",
            "operationId": "write",
            "title": "AEON MTP — Program",
            "summary": "FN program in the 2009 AEON company account: electrons cross dielectric into isolated FG.",
            "sources": [
              {
                "id": "aeon-impinj-2007",
                "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                "date": "2007-09-26",
                "label": "Impinj AEON/MTP Floating-Gate Announcement",
                "kind": "Company product announcement",
                "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
              },
              {
                "id": "aeon-virage-fn-2009",
                "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                "date": "2009-06-30",
                "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                "kind": "Company-authored technical article",
                "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
              }
            ],
            "variants": [
              {
                "id": "aeon-fn-functional",
                "title": "2009 AEON Public Functional Model",
                "mechanism": "FN",
                "summary": "FN program in the 2009 AEON company account: electrons cross dielectric into isolated FG.",
                "frames": [
                  {
                    "id": "impinj-aeon-write-1",
                    "title": "Initial State",
                    "state": "FG holds less negative charge; this isolated charge controls the read MOS state.",
                    "stimulus": "Retention conditions; no FN high field has been established.",
                    "caption": "The initial charge is a relative illustration, not a claim that FG must be neutral.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-write-0-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-write-0-title\">AEON MTP — Program — Initial State</title><defs><marker id=\"ip-impinj-aeon-en-write-0-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-0-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-0-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Less Negative FG Charge</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN Conditions Not Yet Applied</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-write-2",
                    "title": "Establish the Tunnel Field",
                    "state": "Coupling and tunnel conditions establish a high field that can add electrons to FG.",
                    "stimulus": "Local E points from FG to T_P; electron force is opposite. No numerical biases are assigned.",
                    "caption": "Dielectric field enables FN; channel hot-electron injection is not substituted. C couples to FG through dielectric only.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-write-1-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-write-1-title\">AEON MTP — Program — Establish the Tunnel Field</title><defs><marker id=\"ip-impinj-aeon-en-write-1-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-1-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-1-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M388 188V127\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"field\" marker-end=\"url(#ip-impinj-aeon-en-write-1-field)\"/><text x=\"504\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Establish the Tunnel Field</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">E: FG → T_P</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-write-3",
                    "title": "Tunnel Electrons Into FG",
                    "state": "Electrons tunnel from T_P through dielectric into FG by FN, increasing stored negative charge.",
                    "stimulus": "Maintain program field: blue arrows point toward FG; brown E arrows toward T_P.",
                    "caption": "FN crosses dielectric. No metallic short or external DC injection wire is drawn into FG.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-write-2-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-write-2-title\">AEON MTP — Program — Tunnel Electrons Into FG</title><defs><marker id=\"ip-impinj-aeon-en-write-2-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-2-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-2-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M388 188V127\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"field\" marker-end=\"url(#ip-impinj-aeon-en-write-2-field)\"/><text x=\"504\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN</text><path d=\"M448 127V188\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"e\" marker-end=\"url(#ip-impinj-aeon-en-write-2-e)\"/><circle data-charge=\"mobile\" cx=\"448\" cy=\"150\" r=\"9\" fill=\"#075f9d\"/><text x=\"448\" y=\"157\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">e−: T_P → FG · FN</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">E: FG → T_P</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-write-4",
                    "title": "Retain the Programmed State",
                    "state": "After removing program stimulus, dielectric isolation retains the added FG charge.",
                    "stimulus": "Return to retention; FN and high-field arrows disappear.",
                    "caption": "The read device senses charge-dependent behavior. No fixed charge-to-ON or charge-to-logic-1 mapping is assumed.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-write-3-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-write-3-title\">AEON MTP — Program — Retain the Programmed State</title><defs><marker id=\"ip-impinj-aeon-en-write-3-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-3-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-write-3-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Remove High Field; Retain Charge</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Dielectric Isolates FG</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / e−",
                    "meaning": "The brown FG is dielectric-isolated and has no external DC connection. Blue minus signs denote electrons; their count is qualitative."
                  },
                  {
                    "symbol": "C / T_P / T_E",
                    "meaning": "C denotes capacitive coupling. T_P and T_E denote program/erase tunnel counterparts. Reusing the enlarged window does not assert one physical terminal or a fixed device count."
                  },
                  {
                    "symbol": "Si / Dielectric",
                    "meaning": "Blue-gray regions represent silicon functions; pale yellow represents insulating dielectric. Doping, thickness, relative size and actual layout are unspecified."
                  },
                  {
                    "symbol": "e− / E",
                    "meaning": "Blue open arrows show electron motion. Brown arrows show the tunnel-region electric field E, opposite to electron force. Program adds FG electrons; erase removes them in this convention. No official 0/1 coding is assigned."
                  },
                  {
                    "symbol": "A / B / I_R",
                    "meaning": "A and B are functional read terminals, not official pins. The green arrow denotes conventional sensing current for A above B. MOS polarity is unspecified, so no carrier direction or fixed charge-to-ON/OFF relation is assigned."
                  },
                  {
                    "symbol": "2009 AEON / FN–FN",
                    "meaning": "The model follows the named 2009 AEON company article. Business transfers and Synopsys branding form a separate timeline and do not prove identical internal cells across generations."
                  }
                ],
                "sources": [
                  {
                    "id": "aeon-impinj-2007",
                    "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                    "date": "2007-09-26",
                    "label": "Impinj AEON/MTP Floating-Gate Announcement",
                    "kind": "Company product announcement",
                    "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                    "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
                  },
                  {
                    "id": "aeon-virage-fn-2009",
                    "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                    "date": "2009-06-30",
                    "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                    "kind": "Company-authored technical article",
                    "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                    "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
                  }
                ],
                "caveat": "T_P/T_E are operating roles and must not be assumed to be one physical pin. MOS polarity, device count, wells, voltages and logic coding are unspecified. Do not substitute early Impinj hot-electron patents or the internal cell of every current Synopsys MTP product."
              }
            ]
          },
          {
            "topicId": "ip-impinj-aeon",
            "operationId": "erase",
            "title": "AEON MTP — Erase",
            "summary": "The same named source identifies FN erase; this model represents reverse updating by removing FG electrons.",
            "sources": [
              {
                "id": "aeon-impinj-2007",
                "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                "date": "2007-09-26",
                "label": "Impinj AEON/MTP Floating-Gate Announcement",
                "kind": "Company product announcement",
                "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
              },
              {
                "id": "aeon-virage-fn-2009",
                "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                "date": "2009-06-30",
                "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                "kind": "Company-authored technical article",
                "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
              }
            ],
            "variants": [
              {
                "id": "aeon-fn-functional",
                "title": "2009 AEON Public Functional Model",
                "mechanism": "FN",
                "summary": "The same named source identifies FN erase; this model represents reverse updating by removing FG electrons.",
                "frames": [
                  {
                    "id": "impinj-aeon-erase-1",
                    "title": "Programmed State",
                    "state": "FG retains negative charge from the previous program operation.",
                    "stimulus": "Retention conditions; no erase high field is applied.",
                    "caption": "Reverse updating begins from the stored charge state.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-erase-0-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-erase-0-title\">AEON MTP — Erase — Programmed State</title><defs><marker id=\"ip-impinj-aeon-en-erase-0-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-0-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-0-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG Retains Programmed Charge</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Erase High Field Not Yet Applied</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-erase-2",
                    "title": "Establish Erase Conditions",
                    "state": "Erase conditions establish a local field that can remove electrons from FG.",
                    "stimulus": "Local E points from T_E to FG; electron force points from FG to T_E.",
                    "caption": "T_E denotes the erase tunnel counterpart. Its physical relationship to T_P is not fully disclosed by these sources.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-erase-1-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-erase-1-title\">AEON MTP — Erase — Establish Erase Conditions</title><defs><marker id=\"ip-impinj-aeon-en-erase-1-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-1-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-1-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M388 127V188\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"field\" marker-end=\"url(#ip-impinj-aeon-en-erase-1-field)\"/><text x=\"504\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Establish Erase Conditions</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">E: T_E → FG</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-erase-3",
                    "title": "Tunnel Electrons Out of FG",
                    "state": "Electrons tunnel from FG through dielectric toward T_E by FN, reducing negative FG charge.",
                    "stimulus": "Maintain erase field; blue electron arrows oppose brown E arrows.",
                    "caption": "Erase is represented as electron removal, not neutralization by injected holes.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-erase-2-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-erase-2-title\">AEON MTP — Erase — Tunnel Electrons Out of FG</title><defs><marker id=\"ip-impinj-aeon-en-erase-2-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-2-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-2-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M388 127V188\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"field\" marker-end=\"url(#ip-impinj-aeon-en-erase-2-field)\"/><text x=\"504\" y=\"162\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FN</text><path d=\"M448 188V127\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"e\" marker-end=\"url(#ip-impinj-aeon-en-erase-2-e)\"/><circle data-charge=\"mobile\" cx=\"448\" cy=\"150\" r=\"9\" fill=\"#075f9d\"/><text x=\"448\" y=\"157\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">e−: FG → T_E · FN</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">E: T_E → FG</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-erase-4",
                    "title": "Retain a Reprogrammable State",
                    "state": "After removing high field, FG retains its updated charge and can receive another FN program operation.",
                    "stimulus": "Return to retention; tunneling stops.",
                    "caption": "Electrical erase and reprogramming enable MTP. Particle counts do not imply endurance, speed or retention specifications.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-erase-3-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-erase-3-title\">AEON MTP — Erase — Retain a Reprogrammable State</title><defs><marker id=\"ip-impinj-aeon-en-erase-3-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-3-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-erase-3-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Less Negative FG Charge</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Remove High Field; Reprogram Later</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / e−",
                    "meaning": "The brown FG is dielectric-isolated and has no external DC connection. Blue minus signs denote electrons; their count is qualitative."
                  },
                  {
                    "symbol": "C / T_P / T_E",
                    "meaning": "C denotes capacitive coupling. T_P and T_E denote program/erase tunnel counterparts. Reusing the enlarged window does not assert one physical terminal or a fixed device count."
                  },
                  {
                    "symbol": "Si / Dielectric",
                    "meaning": "Blue-gray regions represent silicon functions; pale yellow represents insulating dielectric. Doping, thickness, relative size and actual layout are unspecified."
                  },
                  {
                    "symbol": "e− / E",
                    "meaning": "Blue open arrows show electron motion. Brown arrows show the tunnel-region electric field E, opposite to electron force. Program adds FG electrons; erase removes them in this convention. No official 0/1 coding is assigned."
                  },
                  {
                    "symbol": "A / B / I_R",
                    "meaning": "A and B are functional read terminals, not official pins. The green arrow denotes conventional sensing current for A above B. MOS polarity is unspecified, so no carrier direction or fixed charge-to-ON/OFF relation is assigned."
                  },
                  {
                    "symbol": "2009 AEON / FN–FN",
                    "meaning": "The model follows the named 2009 AEON company article. Business transfers and Synopsys branding form a separate timeline and do not prove identical internal cells across generations."
                  }
                ],
                "sources": [
                  {
                    "id": "aeon-impinj-2007",
                    "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                    "date": "2007-09-26",
                    "label": "Impinj AEON/MTP Floating-Gate Announcement",
                    "kind": "Company product announcement",
                    "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                    "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
                  },
                  {
                    "id": "aeon-virage-fn-2009",
                    "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                    "date": "2009-06-30",
                    "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                    "kind": "Company-authored technical article",
                    "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                    "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
                  }
                ],
                "caveat": "T_P/T_E are operating roles and must not be assumed to be one physical pin. MOS polarity, device count, wells, voltages and logic coding are unspecified. Do not substitute early Impinj hot-electron patents or the internal cell of every current Synopsys MTP product."
              }
            ]
          },
          {
            "topicId": "ip-impinj-aeon",
            "operationId": "read",
            "title": "AEON MTP — Read",
            "summary": "Sense the read MOS under low stimulus; all frames retain the same charge without assigning p/n polarity or logic coding.",
            "sources": [
              {
                "id": "aeon-impinj-2007",
                "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                "date": "2007-09-26",
                "label": "Impinj AEON/MTP Floating-Gate Announcement",
                "kind": "Company product announcement",
                "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
              },
              {
                "id": "aeon-virage-fn-2009",
                "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                "date": "2009-06-30",
                "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                "kind": "Company-authored technical article",
                "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
              }
            ],
            "variants": [
              {
                "id": "aeon-fn-functional",
                "title": "2009 AEON Public Functional Model",
                "mechanism": "MOS current sensing",
                "summary": "Sense the read MOS under low stimulus; all frames retain the same charge without assigning p/n polarity or logic coding.",
                "frames": [
                  {
                    "id": "impinj-aeon-read-1",
                    "title": "Retain the Existing Charge",
                    "state": "All four frames preserve the same FG charge; reading is not a second program operation.",
                    "stimulus": "Sensing has not started.",
                    "caption": "Isolated charge affects MOS behavior. MOS polarity is unspecified, so no fixed ON/OFF mapping is imposed.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-read-0-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-read-0-title\">AEON MTP — Read — Retain the Existing Charge</title><defs><marker id=\"ip-impinj-aeon-en-read-0-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-0-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-0-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P / T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">The Same Stored State</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG Charge Remains Unchanged</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-read-2",
                    "title": "Select and Apply Read Conditions",
                    "state": "Read terminals establish a small sensing potential difference while FG charge remains unchanged.",
                    "stimulus": "The model takes A above B; the green arrow is conventional current from A to B.",
                    "caption": "Read conditions do not establish an FN update field. A and B are teaching terminals, not a macro pin table.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-read-1-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-read-1-title\">AEON MTP — Read — Select and Apply Read Conditions</title><defs><marker id=\"ip-impinj-aeon-en-read-1-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-1-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-1-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P / T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M130 323H470\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"i\" marker-end=\"url(#ip-impinj-aeon-en-read-1-i)\"/><text x=\"300\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R ↔ I_ref</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG Charge Remains Unchanged</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-read-3",
                    "title": "Sense the Channel Current",
                    "state": "The read path supplies I_R associated with the existing stored state.",
                    "stimulus": "Maintain read bias and measure sensing current.",
                    "caption": "Current flows through the read device, without transporting stored charge through FG or the tunnel dielectric.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-read-2-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-read-2-title\">AEON MTP — Read — Sense the Channel Current</title><defs><marker id=\"ip-impinj-aeon-en-read-2-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-2-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-2-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P / T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M130 323H470\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"i\" marker-end=\"url(#ip-impinj-aeon-en-read-2-i)\"/><text x=\"300\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R ↔ I_ref</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG Charge Remains Unchanged</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  },
                  {
                    "id": "impinj-aeon-read-4",
                    "title": "Compare and Preserve Data",
                    "state": "Compare I_R with a reference; FG charge still matches the first frame.",
                    "stimulus": "Sample the sensing result; read bias can then be removed.",
                    "caption": "Reference strategy, differential implementation and 0/1 coding belong to a specific macro. Automotive differential-cell options are not generalized to all AEON products.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" viewBox=\"0 0 560 430\" role=\"img\" aria-labelledby=\"ip-impinj-aeon-en-read-3-title\" style=\"font-family:Arial,Microsoft JhengHei,sans-serif;background:#f8fafc\"><title id=\"ip-impinj-aeon-en-read-3-title\">AEON MTP — Read — Compare and Preserve Data</title><defs><marker id=\"ip-impinj-aeon-en-read-3-e\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-3-field\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#a45410\" stroke-width=\"2\"/></marker><marker id=\"ip-impinj-aeon-en-read-3-i\" markerWidth=\"11\" markerHeight=\"11\" refX=\"9\" refY=\"5.5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L9 5.5L1 10\" fill=\"none\" stroke=\"#087968\" stroke-width=\"2\"/></marker></defs><text x=\"280\" y=\"31\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">AEON · FN/FN Functional Model</text><rect x=\"84\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"114\" width=\"105\" height=\"25\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"365\" y=\"139\" width=\"105\" height=\"22\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"84\" y=\"161\" width=\"386\" height=\"54\" fill=\"#c6a16b\" stroke=\"#16334c\" stroke-width=\"1.5\" data-storage-region=\"fg\"/><rect x=\"220\" y=\"215\" width=\"133\" height=\"25\" fill=\"#f4e0a9\" stroke=\"#16334c\" stroke-width=\"1.5\" /><rect x=\"168\" y=\"240\" width=\"260\" height=\"58\" fill=\"#bfd3e4\" stroke=\"#16334c\" stroke-width=\"1.5\" /><path d=\"M136 89V114M418 89V114M68 270H168M428 270H506\" fill=\"none\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"136\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">C</text><text x=\"418\" y=\"80\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">T_P / T_E</text><text x=\"136\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"418\" y=\"133\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Si</text><text x=\"111\" y=\"195\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><text x=\"298\" y=\"275\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ MOS</text><text x=\"97\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">A</text><text x=\"483\" y=\"255\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">B</text><circle data-charge=\"stored\" cx=\"183\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"183\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"219\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"219\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"255\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"255\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><circle data-charge=\"stored\" cx=\"291\" cy=\"188\" r=\"9\" fill=\"#075f9d\"/><text x=\"291\" y=\"195\" text-anchor=\"middle\" fill=\"#fff\" font-size=\"22\" font-weight=\"600\">−</text><path d=\"M130 323H470\" fill=\"none\" stroke=\"#087968\" stroke-width=\"3\" stroke-linecap=\"round\" stroke-linejoin=\"round\" data-path=\"i\" marker-end=\"url(#ip-impinj-aeon-en-read-3-i)\"/><text x=\"300\" y=\"350\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R</text><text x=\"280\" y=\"380\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">I_R ↔ I_ref</text><text x=\"280\" y=\"409\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG Charge Remains Unchanged</text></svg>",
                    "sourceIds": [
                      "aeon-impinj-2007",
                      "aeon-virage-fn-2009"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FG / e−",
                    "meaning": "The brown FG is dielectric-isolated and has no external DC connection. Blue minus signs denote electrons; their count is qualitative."
                  },
                  {
                    "symbol": "C / T_P / T_E",
                    "meaning": "C denotes capacitive coupling. T_P and T_E denote program/erase tunnel counterparts. Reusing the enlarged window does not assert one physical terminal or a fixed device count."
                  },
                  {
                    "symbol": "Si / Dielectric",
                    "meaning": "Blue-gray regions represent silicon functions; pale yellow represents insulating dielectric. Doping, thickness, relative size and actual layout are unspecified."
                  },
                  {
                    "symbol": "e− / E",
                    "meaning": "Blue open arrows show electron motion. Brown arrows show the tunnel-region electric field E, opposite to electron force. Program adds FG electrons; erase removes them in this convention. No official 0/1 coding is assigned."
                  },
                  {
                    "symbol": "A / B / I_R",
                    "meaning": "A and B are functional read terminals, not official pins. The green arrow denotes conventional sensing current for A above B. MOS polarity is unspecified, so no carrier direction or fixed charge-to-ON/OFF relation is assigned."
                  },
                  {
                    "symbol": "2009 AEON / FN–FN",
                    "meaning": "The model follows the named 2009 AEON company article. Business transfers and Synopsys branding form a separate timeline and do not prove identical internal cells across generations."
                  }
                ],
                "sources": [
                  {
                    "id": "aeon-impinj-2007",
                    "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
                    "date": "2007-09-26",
                    "label": "Impinj AEON/MTP Floating-Gate Announcement",
                    "kind": "Company product announcement",
                    "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
                    "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
                  },
                  {
                    "id": "aeon-virage-fn-2009",
                    "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
                    "date": "2009-06-30",
                    "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
                    "kind": "Company-authored technical article",
                    "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
                    "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
                  }
                ],
                "caveat": "T_P/T_E are operating roles and must not be assumed to be one physical pin. MOS polarity, device count, wells, voltages and logic coding are unspecified. Do not substitute early Impinj hot-electron patents or the internal cell of every current Synopsys MTP product."
              }
            ]
          }
        ]
      },
      {
        "id": "actt-cmt",
        "title": "Actt LogicFlash MTP: Logic-Process MTP from the CMT Lineage",
        "shortTitle": "Actt · LogicFlash MTP",
        "vendor": "Actt (CMT lineage)",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "Actt acquired CMT in 2016. The current public MTP product is LogicFlash: logic-compatible, 0–1 extra mask, Flash-like byte program and sector/chip erase. The storage-node material is unpublished.",
        "program": "Flash-class byte program; carrier path unpublished",
        "reverse": "Sector or chip electrical erase; carrier path unpublished",
        "readout": "Sense the existing state with the product circuit",
        "lesson": "CMT is a lineage name, not a current SKU. SuperMTP is marked under development and is not used here. Public evidence stops at the interface and update granularity; do not invent FN or HCI.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "Public Interface-Level MTP: PGM / ERS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same storage cell supports programming, electrical erase and subsequent programming. ERS restores a window suitable for another program operation. Whether the host issues a separate erase command depends on the macro interface.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "The public page lists byte PGM and sector/chip ERS. Confirm actual granularity on the target macro.",
          "limits": "Up to 10k cycles is product-page narrative, not a guarantee in this drawing. The storage-node material is unpublished; do not splice bias or mask assumptions from other MTP cells.",
          "sourceIds": [
            "ip-actt-envm",
            "ip-actt-andes-cmt"
          ],
          "before": "Programmed",
          "mechanism": "Public evidence stops at a Flash-class PGM/ERS interface and does not specify FN, HCI, or a trap layer. — CMT lineage explains origin and adds no physics.",
          "after": "CMT lineage explains origin and adds no physics."
        },
        "structure": {
          "title": "Actt LogicFlash MTP (CMT Lineage)",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-structure-0-en-title ip-actt-cmt-structure-0-en-desc\"><title id=\"ip-actt-cmt-structure-0-en-title\">Actt LogicFlash MTP (CMT Lineage)</title><desc id=\"ip-actt-cmt-structure-0-en-desc\">A logic-process MTP macro. The public page guarantees Flash-like byte program and sector/chip erase, not the storage-node material. CMT is the 2016 acquisition lineage.</desc><defs><marker id=\"ip-actt-cmt-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "A logic-process MTP macro. The public page guarantees Flash-like byte program and sector/chip erase, not the storage-node material. CMT is the 2016 acquisition lineage.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "e−",
              "meaning": "Blue dots denote electrons; the count is qualitative."
            }
          ],
          "sourceIds": [
            "ip-actt-envm",
            "ip-actt-andes-cmt"
          ]
        },
        "operations": [
          {
            "topicId": "ip-actt-cmt",
            "operationId": "write",
            "title": "Actt LogicFlash MTP (CMT Lineage) — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-actt-envm",
                "label": "Actt eNVM Product Page",
                "url": "https://www.analogcircuit.cn/product/envm.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
              },
              {
                "id": "ip-actt-andes-cmt",
                "label": "Andes: Actt Acquired CMT",
                "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                "kind": "news",
                "date": "2016-08-30",
                "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                "limit": "CMT is a lineage name, not a current public SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Interface-Level Teaching Model",
                "mechanism": "Public evidence stops at a Flash-class PGM/ERS interface and does not specify FN, HCI, or a trap layer.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-actt-cmt-write-1-en-frame",
                    "title": "Before Select: Reusable MTP Macro",
                    "state": "Empty node",
                    "stimulus": "Bias zero",
                    "caption": "The vendor proves Flash-like byte program, not a cell cross-section.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-write-1-en-title ip-actt-cmt-write-1-en-desc\"><title id=\"ip-actt-cmt-write-1-en-title\">Before Select: Reusable MTP Macro</title><desc id=\"ip-actt-cmt-write-1-en-desc\">The vendor proves Flash-like byte program, not a cell cross-section.</desc><defs><marker id=\"ip-actt-cmt-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-write-2-en-frame",
                    "title": "Host Issues a Program Command",
                    "state": "Programming",
                    "stimulus": "Internal HV from the macro",
                    "caption": "The drawing marks the interface command and does not invent an FN or HCI path.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-write-2-en-title ip-actt-cmt-write-2-en-desc\"><title id=\"ip-actt-cmt-write-2-en-title\">Host Issues a Program Command</title><desc id=\"ip-actt-cmt-write-2-en-desc\">The drawing marks the interface command and does not invent an FN or HCI path.</desc><defs><marker id=\"ip-actt-cmt-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">PGM</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-write-3-en-frame",
                    "title": "Retain the Programmed State after Verify",
                    "state": "Programmed state retained",
                    "stimulus": "Command removed",
                    "caption": "10k cycles is a product-page ceiling narrative, not a guarantee in this drawing.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-write-3-en-title ip-actt-cmt-write-3-en-desc\"><title id=\"ip-actt-cmt-write-3-en-title\">Retain the Programmed State after Verify</title><desc id=\"ip-actt-cmt-write-3-en-desc\">10k cycles is a product-page ceiling narrative, not a guarantee in this drawing.</desc><defs><marker id=\"ip-actt-cmt-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-actt-envm",
                    "label": "Actt eNVM Product Page",
                    "url": "https://www.analogcircuit.cn/product/envm.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                    "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
                  },
                  {
                    "id": "ip-actt-andes-cmt",
                    "label": "Andes: Actt Acquired CMT",
                    "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                    "kind": "news",
                    "date": "2016-08-30",
                    "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                    "limit": "CMT is a lineage name, not a current public SKU."
                  }
                ],
                "caveat": "SuperMTP is marked under development on the vendor page and is not used in this unit’s operation drawings."
              }
            ]
          },
          {
            "topicId": "ip-actt-cmt",
            "operationId": "erase",
            "title": "Actt LogicFlash MTP (CMT Lineage) — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-actt-envm",
                "label": "Actt eNVM Product Page",
                "url": "https://www.analogcircuit.cn/product/envm.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
              },
              {
                "id": "ip-actt-andes-cmt",
                "label": "Andes: Actt Acquired CMT",
                "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                "kind": "news",
                "date": "2016-08-30",
                "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                "limit": "CMT is a lineage name, not a current public SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Interface-Level Teaching Model",
                "mechanism": "Public evidence stops at a Flash-class PGM/ERS interface and does not specify FN, HCI, or a trap layer.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-actt-cmt-erase-1-en-frame",
                    "title": "Start Erase from a Programmed State",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "Public erase granularity is sector or chip, not a proven bit-level erase.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-erase-1-en-title ip-actt-cmt-erase-1-en-desc\"><title id=\"ip-actt-cmt-erase-1-en-title\">Start Erase from a Programmed State</title><desc id=\"ip-actt-cmt-erase-1-en-desc\">Public erase granularity is sector or chip, not a proven bit-level erase.</desc><defs><marker id=\"ip-actt-cmt-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-erase-2-en-frame",
                    "title": "Host Issues an Erase Command",
                    "state": "Erasing",
                    "stimulus": "Sector / chip ERS",
                    "caption": "The storage-node material remains unpublished.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-erase-2-en-title ip-actt-cmt-erase-2-en-desc\"><title id=\"ip-actt-cmt-erase-2-en-title\">Host Issues an Erase Command</title><desc id=\"ip-actt-cmt-erase-2-en-desc\">The storage-node material remains unpublished.</desc><defs><marker id=\"ip-actt-cmt-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">ERS</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-erase-3-en-frame",
                    "title": "Return to a Reprogrammable Window after Verify",
                    "state": "Erased",
                    "stimulus": "Command removed",
                    "caption": "CMT lineage explains origin and adds no physics.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-erase-3-en-title ip-actt-cmt-erase-3-en-desc\"><title id=\"ip-actt-cmt-erase-3-en-title\">Return to a Reprogrammable Window after Verify</title><desc id=\"ip-actt-cmt-erase-3-en-desc\">CMT lineage explains origin and adds no physics.</desc><defs><marker id=\"ip-actt-cmt-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-actt-envm",
                    "label": "Actt eNVM Product Page",
                    "url": "https://www.analogcircuit.cn/product/envm.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                    "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
                  },
                  {
                    "id": "ip-actt-andes-cmt",
                    "label": "Andes: Actt Acquired CMT",
                    "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                    "kind": "news",
                    "date": "2016-08-30",
                    "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                    "limit": "CMT is a lineage name, not a current public SKU."
                  }
                ],
                "caveat": "SuperMTP is marked under development on the vendor page and is not used in this unit’s operation drawings."
              }
            ]
          },
          {
            "topicId": "ip-actt-cmt",
            "operationId": "read",
            "title": "Actt LogicFlash MTP (CMT Lineage) — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-actt-envm",
                "label": "Actt eNVM Product Page",
                "url": "https://www.analogcircuit.cn/product/envm.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
              },
              {
                "id": "ip-actt-andes-cmt",
                "label": "Andes: Actt Acquired CMT",
                "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                "kind": "news",
                "date": "2016-08-30",
                "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                "limit": "CMT is a lineage name, not a current public SKU."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Interface-Level Teaching Model",
                "mechanism": "Public evidence stops at a Flash-class PGM/ERS interface and does not specify FN, HCI, or a trap layer.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-actt-cmt-read-1-en-frame",
                    "title": "Select a Retained Programmed or Erased State",
                    "state": "Existing charge; unknown material",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not invent a carrier mechanism in this drawing.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-read-1-en-title ip-actt-cmt-read-1-en-desc\"><title id=\"ip-actt-cmt-read-1-en-title\">Select a Retained Programmed or Erased State</title><desc id=\"ip-actt-cmt-read-1-en-desc\">Read does not invent a carrier mechanism in this drawing.</desc><defs><marker id=\"ip-actt-cmt-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-read-2-en-frame",
                    "title": "Sense Channel Current",
                    "state": "Reading",
                    "stimulus": "Small-bias sense",
                    "caption": "Current difference is decoded by the product sense circuit.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-read-2-en-title ip-actt-cmt-read-2-en-desc\"><title id=\"ip-actt-cmt-read-2-en-title\">Sense Channel Current</title><desc id=\"ip-actt-cmt-read-2-en-desc\">Current difference is decoded by the product sense circuit.</desc><defs><marker id=\"ip-actt-cmt-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  },
                  {
                    "id": "ip-actt-cmt-read-3-en-frame",
                    "title": "Latch then Isolate",
                    "state": "State retained",
                    "stimulus": "Selection removed",
                    "caption": "Read-disturb limits must be checked on the target macro.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-actt-cmt-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-actt-cmt-read-3-en-title ip-actt-cmt-read-3-en-desc\"><title id=\"ip-actt-cmt-read-3-en-title\">Latch then Isolate</title><desc id=\"ip-actt-cmt-read-3-en-desc\">Read-disturb limits must be checked on the target macro.</desc><defs><marker id=\"ip-actt-cmt-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-actt-cmt-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-actt-cmt-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-actt-cmt-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"118\" width=\"220\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"142\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Undisclosed Node</text><rect x=\"170\" y=\"154\" width=\"220\" height=\"18\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"172\" width=\"180\" height=\"38\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"196\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"80\" x2=\"280\" y2=\"118\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"98\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"240\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"280\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"320\" cy=\"136\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-actt-envm",
                      "ip-actt-andes-cmt"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-actt-envm",
                    "label": "Actt eNVM Product Page",
                    "url": "https://www.analogcircuit.cn/product/envm.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
                    "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
                  },
                  {
                    "id": "ip-actt-andes-cmt",
                    "label": "Andes: Actt Acquired CMT",
                    "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
                    "kind": "news",
                    "date": "2016-08-30",
                    "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
                    "limit": "CMT is a lineage name, not a current public SKU."
                  }
                ],
                "caveat": "SuperMTP is marked under development on the vendor page and is not used in this unit’s operation drawings."
              }
            ]
          }
        ]
      },
      {
        "id": "nscore-twinbit",
        "title": "NSCore TwinBit: Pch Schottky MTP",
        "shortTitle": "NSCore · TwinBit MTP",
        "vendor": "NSCore",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "TwinBit Gen-2 uses a Pch Schottky storage device with zero extra mask. Program is hot hole; erase is hot electron. Sibling PermSRAM is OTP and is not drawn in this unit.",
        "program": "Hot-hole program",
        "reverse": "Hot-electron erase",
        "readout": "Sense Schottky channel current at small bias",
        "lesson": "TwinBit and PermSRAM share a vendor, not a cell physics. Do not draw OTP SiN-spacer hot-carrier trapping as the MTP erase path.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "TwinBit MTP: Hot-Hole Program / Hot-Electron Erase",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same Schottky storage cell supports programming, electrical erase and subsequent programming. Erase uses hot electrons to compensate or remove the hot-hole effect and restore a reprogrammable window.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish bit-level host commands.",
          "limits": "40–22 nm and zero extra mask are vendor node narratives. No bias table is published. Gen-1 CMOS NMOS pairs are not mixed into the Gen-2 Schottky cross-section.",
          "sourceIds": [
            "ip-nscore-products",
            "ip-nscore-twinbit-g2"
          ],
          "before": "Programmed",
          "mechanism": "Program by hot hole; erase by hot electron. — 40–22 nm is a vendor node narrative, not a measurement in this drawing.",
          "after": "40–22 nm is a vendor node narrative, not a measurement in this drawing."
        },
        "structure": {
          "title": "NSCore TwinBit MTP",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-structure-0-en-title ip-nscore-twinbit-structure-0-en-desc\"><title id=\"ip-nscore-twinbit-structure-0-en-title\">NSCore TwinBit MTP</title><desc id=\"ip-nscore-twinbit-structure-0-en-desc\">Gen-2 uses a Pch Schottky transistor as the storage device with zero extra mask. PermSRAM is a sibling OTP that traps hot carriers in a SiN spacer and is not drawn here.</desc><defs><marker id=\"ip-nscore-twinbit-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Gen-2 uses a Pch Schottky transistor as the storage device with zero extra mask. PermSRAM is a sibling OTP that traps hot carriers in a SiN spacer and is not drawn here.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "h+",
              "meaning": "Red dots denote hot holes; the count is qualitative."
            },
            {
              "symbol": "e−",
              "meaning": "Blue dots denote hot electrons; the count is qualitative."
            }
          ],
          "sourceIds": [
            "ip-nscore-products",
            "ip-nscore-twinbit-g2"
          ]
        },
        "operations": [
          {
            "topicId": "ip-nscore-twinbit",
            "operationId": "write",
            "title": "NSCore TwinBit MTP — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-nscore-products",
                "label": "NSCore Products",
                "url": "https://www.nscore.com/products/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
              },
              {
                "id": "ip-nscore-twinbit-g2",
                "label": "NSCore TwinBit Gen-2",
                "url": "https://www.nscore.com/twinbit_g2.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                "limit": "No public bias table or junction dimensions."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Published Gen-2 Hot-Carrier Model",
                "mechanism": "Program by hot hole; erase by hot electron.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-nscore-twinbit-write-1-en-frame",
                    "title": "Pch Schottky Initial State",
                    "state": "Unprogrammed",
                    "stimulus": "Bias zero",
                    "caption": "Gen-2 is published as Pch Schottky with zero extra mask.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-write-1-en-title ip-nscore-twinbit-write-1-en-desc\"><title id=\"ip-nscore-twinbit-write-1-en-title\">Pch Schottky Initial State</title><desc id=\"ip-nscore-twinbit-write-1-en-desc\">Gen-2 is published as Pch Schottky with zero extra mask.</desc><defs><marker id=\"ip-nscore-twinbit-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-write-2-en-frame",
                    "title": "Hot-Hole Program",
                    "state": "Programming",
                    "stimulus": "Channel hot-hole injection",
                    "caption": "Arrows show hot-hole direction, not a bias table.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-write-2-en-title ip-nscore-twinbit-write-2-en-desc\"><title id=\"ip-nscore-twinbit-write-2-en-title\">Hot-Hole Program</title><desc id=\"ip-nscore-twinbit-write-2-en-desc\">Arrows show hot-hole direction, not a bias table.</desc><defs><marker id=\"ip-nscore-twinbit-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">PGM</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-write-3-en-frame",
                    "title": "Retain the Threshold Shift from Hot Holes",
                    "state": "Programmed",
                    "stimulus": "Bias removed",
                    "caption": "The PermSRAM SiN spacer is not drawn.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-write-3-en-title ip-nscore-twinbit-write-3-en-desc\"><title id=\"ip-nscore-twinbit-write-3-en-title\">Retain the Threshold Shift from Hot Holes</title><desc id=\"ip-nscore-twinbit-write-3-en-desc\">The PermSRAM SiN spacer is not drawn.</desc><defs><marker id=\"ip-nscore-twinbit-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "h+",
                    "meaning": "Red dots denote hot holes; the count is qualitative."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote hot electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-nscore-products",
                    "label": "NSCore Products",
                    "url": "https://www.nscore.com/products/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                    "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
                  },
                  {
                    "id": "ip-nscore-twinbit-g2",
                    "label": "NSCore TwinBit Gen-2",
                    "url": "https://www.nscore.com/twinbit_g2.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                    "limit": "No public bias table or junction dimensions."
                  }
                ],
                "caveat": "TwinBit is not drawn as PermSRAM spacer trapping, and bias numbers are unspecified."
              }
            ]
          },
          {
            "topicId": "ip-nscore-twinbit",
            "operationId": "erase",
            "title": "NSCore TwinBit MTP — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-nscore-products",
                "label": "NSCore Products",
                "url": "https://www.nscore.com/products/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
              },
              {
                "id": "ip-nscore-twinbit-g2",
                "label": "NSCore TwinBit Gen-2",
                "url": "https://www.nscore.com/twinbit_g2.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                "limit": "No public bias table or junction dimensions."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Published Gen-2 Hot-Carrier Model",
                "mechanism": "Program by hot hole; erase by hot electron.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-nscore-twinbit-erase-1-en-frame",
                    "title": "Start from the Hot-Hole Programmed State",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "TwinBit is electrically erasable and is kept separate from OTP PermSRAM.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-erase-1-en-title ip-nscore-twinbit-erase-1-en-desc\"><title id=\"ip-nscore-twinbit-erase-1-en-title\">Start from the Hot-Hole Programmed State</title><desc id=\"ip-nscore-twinbit-erase-1-en-desc\">TwinBit is electrically erasable and is kept separate from OTP PermSRAM.</desc><defs><marker id=\"ip-nscore-twinbit-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-erase-2-en-frame",
                    "title": "Hot-Electron Erase",
                    "state": "Erasing",
                    "stimulus": "Hot electrons compensate or remove the hole effect",
                    "caption": "The published statement is erase by hot electron.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-erase-2-en-title ip-nscore-twinbit-erase-2-en-desc\"><title id=\"ip-nscore-twinbit-erase-2-en-title\">Hot-Electron Erase</title><desc id=\"ip-nscore-twinbit-erase-2-en-desc\">The published statement is erase by hot electron.</desc><defs><marker id=\"ip-nscore-twinbit-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">ERS</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"232\" cy=\"120\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"260\" cy=\"120\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"288\" cy=\"120\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-erase-3-en-frame",
                    "title": "Return to a Reprogrammable State",
                    "state": "Erased",
                    "stimulus": "Bias removed",
                    "caption": "40–22 nm is a vendor node narrative, not a measurement in this drawing.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-erase-3-en-title ip-nscore-twinbit-erase-3-en-desc\"><title id=\"ip-nscore-twinbit-erase-3-en-title\">Return to a Reprogrammable State</title><desc id=\"ip-nscore-twinbit-erase-3-en-desc\">40–22 nm is a vendor node narrative, not a measurement in this drawing.</desc><defs><marker id=\"ip-nscore-twinbit-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "h+",
                    "meaning": "Red dots denote hot holes; the count is qualitative."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote hot electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-nscore-products",
                    "label": "NSCore Products",
                    "url": "https://www.nscore.com/products/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                    "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
                  },
                  {
                    "id": "ip-nscore-twinbit-g2",
                    "label": "NSCore TwinBit Gen-2",
                    "url": "https://www.nscore.com/twinbit_g2.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                    "limit": "No public bias table or junction dimensions."
                  }
                ],
                "caveat": "TwinBit is not drawn as PermSRAM spacer trapping, and bias numbers are unspecified."
              }
            ]
          },
          {
            "topicId": "ip-nscore-twinbit",
            "operationId": "read",
            "title": "NSCore TwinBit MTP — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-nscore-products",
                "label": "NSCore Products",
                "url": "https://www.nscore.com/products/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
              },
              {
                "id": "ip-nscore-twinbit-g2",
                "label": "NSCore TwinBit Gen-2",
                "url": "https://www.nscore.com/twinbit_g2.html",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                "limit": "No public bias table or junction dimensions."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Published Gen-2 Hot-Carrier Model",
                "mechanism": "Program by hot hole; erase by hot electron.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-nscore-twinbit-read-1-en-frame",
                    "title": "The Same Schottky Cell Awaits Read",
                    "state": "Existing threshold",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not repeat hot-carrier program.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-read-1-en-title ip-nscore-twinbit-read-1-en-desc\"><title id=\"ip-nscore-twinbit-read-1-en-title\">The Same Schottky Cell Awaits Read</title><desc id=\"ip-nscore-twinbit-read-1-en-desc\">Read does not repeat hot-carrier program.</desc><defs><marker id=\"ip-nscore-twinbit-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-read-2-en-frame",
                    "title": "Sense Channel Current",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "Threshold shift changes current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-read-2-en-title ip-nscore-twinbit-read-2-en-desc\"><title id=\"ip-nscore-twinbit-read-2-en-title\">Sense Channel Current</title><desc id=\"ip-nscore-twinbit-read-2-en-desc\">Threshold shift changes current.</desc><defs><marker id=\"ip-nscore-twinbit-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  },
                  {
                    "id": "ip-nscore-twinbit-read-3-en-frame",
                    "title": "Latch then Deselect",
                    "state": "State retained",
                    "stimulus": "Bias zero",
                    "caption": "The read window is set by supplier conditions.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-nscore-twinbit-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-nscore-twinbit-read-3-en-title ip-nscore-twinbit-read-3-en-desc\"><title id=\"ip-nscore-twinbit-read-3-en-title\">Latch then Deselect</title><desc id=\"ip-nscore-twinbit-read-3-en-desc\">The read window is set by supplier conditions.</desc><defs><marker id=\"ip-nscore-twinbit-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-nscore-twinbit-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-nscore-twinbit-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-nscore-twinbit-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"170\" y=\"100\" width=\"220\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"125\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Pch Schottky</text><rect x=\"190\" y=\"140\" width=\"180\" height=\"50\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"170\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel / Junction</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"100\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"76\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"220\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><circle data-charge=\"stored\" cx=\"248\" cy=\"120\" r=\"8\" fill=\"#b52f43\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-nscore-products",
                      "ip-nscore-twinbit-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "h+",
                    "meaning": "Red dots denote hot holes; the count is qualitative."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote hot electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-nscore-products",
                    "label": "NSCore Products",
                    "url": "https://www.nscore.com/products/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
                    "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
                  },
                  {
                    "id": "ip-nscore-twinbit-g2",
                    "label": "NSCore TwinBit Gen-2",
                    "url": "https://www.nscore.com/twinbit_g2.html",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
                    "limit": "No public bias table or junction dimensions."
                  }
                ],
                "caveat": "TwinBit is not drawn as PermSRAM spacer trapping, and bias numbers are unspecified."
              }
            ]
          }
        ]
      },
      {
        "id": "floadia-zt",
        "title": "Floadia LEE Flash ZT: FN Floating-Gate MTP",
        "shortTitle": "Floadia · LEE Flash ZT",
        "vendor": "Floadia",
        "group": "mtp",
        "hostTopic": "mtp",
        "summary": "Zero extra-mask floating-gate MTP. The vendor states both program and erase use FN; news names the storage node as a floating gate.",
        "program": "FN moves electrons into the floating gate",
        "reverse": "Reverse FN removes electrons from the floating gate",
        "readout": "Sense channel current after the coupling terminal turns on",
        "lesson": "ZT is rewritable MTP, not LEE Fuse ZA Anti-fuse. Cycle-count copy on the page conflicts with itself; no count is treated as a common guarantee.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "LEE Flash ZT: FN / FN Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same floating-gate cell supports programming, electrical erase and subsequent programming. Both directions use FN, not hot-carrier program.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "Cycle-count copy on the page conflicts with itself; neither 10K nor >100k is treated as a guarantee. Poly count and well structure remain unpublished.",
          "sourceIds": [
            "ip-floadia-zt",
            "ip-floadia-zt-news"
          ],
          "before": "Programmed",
          "mechanism": "Electrons enter and leave the floating gate by FN tunneling. — Zero extra mask is an integration claim, not a cross-section proof.",
          "after": "Zero extra mask is an integration claim, not a cross-section proof."
        },
        "structure": {
          "title": "Floadia LEE Flash ZT MTP",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-structure-0-en-title ip-floadia-zt-structure-0-en-desc\"><title id=\"ip-floadia-zt-structure-0-en-title\">Floadia LEE Flash ZT MTP</title><desc id=\"ip-floadia-zt-structure-0-en-desc\">Zero extra-mask floating-gate MTP; program and erase use FN. The teaching drawing shows only an equivalent FG and coupling terminal.</desc><defs><marker id=\"ip-floadia-zt-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Zero extra-mask floating-gate MTP; program and erase use FN. The teaching drawing shows only an equivalent FG and coupling terminal.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "e−",
              "meaning": "Blue dots denote electrons; the count is qualitative."
            }
          ],
          "sourceIds": [
            "ip-floadia-zt",
            "ip-floadia-zt-news"
          ]
        },
        "operations": [
          {
            "topicId": "ip-floadia-zt",
            "operationId": "write",
            "title": "Floadia LEE Flash ZT MTP — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-floadia-zt",
                "label": "Floadia LEE Flash ZT",
                "url": "https://floadia.com/product/lee-flash-zt/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
              },
              {
                "id": "ip-floadia-zt-news",
                "label": "Floadia ZT News: Floating Gate",
                "url": "https://floadia.com/news/422/",
                "kind": "vendor",
                "date": "2024-12-09",
                "locator": "ZT uses a floating gate as the storage node.",
                "limit": "The news item does not give poly count or well structure."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "FN Floating-Gate Teaching Model",
                "mechanism": "Electrons enter and leave the floating gate by FN tunneling.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-floadia-zt-write-1-en-frame",
                    "title": "Floating-Gate Initial State",
                    "state": "Few electrons",
                    "stimulus": "Bias zero",
                    "caption": "ZT news names the storage node as a floating gate.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-write-1-en-title ip-floadia-zt-write-1-en-desc\"><title id=\"ip-floadia-zt-write-1-en-title\">Floating-Gate Initial State</title><desc id=\"ip-floadia-zt-write-1-en-desc\">ZT news names the storage node as a floating gate.</desc><defs><marker id=\"ip-floadia-zt-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-write-2-en-frame",
                    "title": "FN Program: Electrons Enter FG",
                    "state": "Programming",
                    "stimulus": "FN tunneling",
                    "caption": "The vendor states both program and erase use FN.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-write-2-en-title ip-floadia-zt-write-2-en-desc\"><title id=\"ip-floadia-zt-write-2-en-title\">FN Program: Electrons Enter FG</title><desc id=\"ip-floadia-zt-write-2-en-desc\">The vendor states both program and erase use FN.</desc><defs><marker id=\"ip-floadia-zt-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">＋VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-write-3-en-frame",
                    "title": "Electrons Remain on FG after Bias Removal",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "Cycle counts do not follow the page’s conflicting numbers.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-write-3-en-title ip-floadia-zt-write-3-en-desc\"><title id=\"ip-floadia-zt-write-3-en-title\">Electrons Remain on FG after Bias Removal</title><desc id=\"ip-floadia-zt-write-3-en-desc\">Cycle counts do not follow the page’s conflicting numbers.</desc><defs><marker id=\"ip-floadia-zt-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-zt",
                    "label": "Floadia LEE Flash ZT",
                    "url": "https://floadia.com/product/lee-flash-zt/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                    "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
                  },
                  {
                    "id": "ip-floadia-zt-news",
                    "label": "Floadia ZT News: Floating Gate",
                    "url": "https://floadia.com/news/422/",
                    "kind": "vendor",
                    "date": "2024-12-09",
                    "locator": "ZT uses a floating gate as the storage node.",
                    "limit": "The news item does not give poly count or well structure."
                  }
                ],
                "caveat": "Cycle-count copy on the page conflicts with itself; no count is treated as a guarantee."
              }
            ]
          },
          {
            "topicId": "ip-floadia-zt",
            "operationId": "erase",
            "title": "Floadia LEE Flash ZT MTP — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-floadia-zt",
                "label": "Floadia LEE Flash ZT",
                "url": "https://floadia.com/product/lee-flash-zt/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
              },
              {
                "id": "ip-floadia-zt-news",
                "label": "Floadia ZT News: Floating Gate",
                "url": "https://floadia.com/news/422/",
                "kind": "vendor",
                "date": "2024-12-09",
                "locator": "ZT uses a floating gate as the storage node.",
                "limit": "The news item does not give poly count or well structure."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "FN Floating-Gate Teaching Model",
                "mechanism": "Electrons enter and leave the floating gate by FN tunneling.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-floadia-zt-erase-1-en-frame",
                    "title": "Start with More Electrons on FG",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "Erase remains FN, not hot carrier.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-erase-1-en-title ip-floadia-zt-erase-1-en-desc\"><title id=\"ip-floadia-zt-erase-1-en-title\">Start with More Electrons on FG</title><desc id=\"ip-floadia-zt-erase-1-en-desc\">Erase remains FN, not hot carrier.</desc><defs><marker id=\"ip-floadia-zt-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-erase-2-en-frame",
                    "title": "Reverse FN Removes Electrons from FG",
                    "state": "Erasing",
                    "stimulus": "Reverse FN",
                    "caption": "The teaching drawing does not specify well-potential numbers.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-erase-2-en-title ip-floadia-zt-erase-2-en-desc\"><title id=\"ip-floadia-zt-erase-2-en-title\">Reverse FN Removes Electrons from FG</title><desc id=\"ip-floadia-zt-erase-2-en-desc\">The teaching drawing does not specify well-potential numbers.</desc><defs><marker id=\"ip-floadia-zt-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">−VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-erase-3-en-frame",
                    "title": "FG Returns to a Reprogrammable Window",
                    "state": "Erased",
                    "stimulus": "Bias zero",
                    "caption": "Zero extra mask is an integration claim, not a cross-section proof.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-erase-3-en-title ip-floadia-zt-erase-3-en-desc\"><title id=\"ip-floadia-zt-erase-3-en-title\">FG Returns to a Reprogrammable Window</title><desc id=\"ip-floadia-zt-erase-3-en-desc\">Zero extra mask is an integration claim, not a cross-section proof.</desc><defs><marker id=\"ip-floadia-zt-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-zt",
                    "label": "Floadia LEE Flash ZT",
                    "url": "https://floadia.com/product/lee-flash-zt/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                    "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
                  },
                  {
                    "id": "ip-floadia-zt-news",
                    "label": "Floadia ZT News: Floating Gate",
                    "url": "https://floadia.com/news/422/",
                    "kind": "vendor",
                    "date": "2024-12-09",
                    "locator": "ZT uses a floating gate as the storage node.",
                    "limit": "The news item does not give poly count or well structure."
                  }
                ],
                "caveat": "Cycle-count copy on the page conflicts with itself; no count is treated as a guarantee."
              }
            ]
          },
          {
            "topicId": "ip-floadia-zt",
            "operationId": "read",
            "title": "Floadia LEE Flash ZT MTP — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-floadia-zt",
                "label": "Floadia LEE Flash ZT",
                "url": "https://floadia.com/product/lee-flash-zt/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
              },
              {
                "id": "ip-floadia-zt-news",
                "label": "Floadia ZT News: Floating Gate",
                "url": "https://floadia.com/news/422/",
                "kind": "vendor",
                "date": "2024-12-09",
                "locator": "ZT uses a floating gate as the storage node.",
                "limit": "The news item does not give poly count or well structure."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "FN Floating-Gate Teaching Model",
                "mechanism": "Electrons enter and leave the floating gate by FN tunneling.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-floadia-zt-read-1-en-frame",
                    "title": "The Same FG Awaits Read",
                    "state": "Existing FG charge",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not use program-level FN.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-read-1-en-title ip-floadia-zt-read-1-en-desc\"><title id=\"ip-floadia-zt-read-1-en-title\">The Same FG Awaits Read</title><desc id=\"ip-floadia-zt-read-1-en-desc\">Read does not use program-level FN.</desc><defs><marker id=\"ip-floadia-zt-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-read-2-en-frame",
                    "title": "Turn on Coupling and Sense the Channel",
                    "state": "Reading",
                    "stimulus": "Small coupling potential",
                    "caption": "Channel current reflects FG charge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-read-2-en-title ip-floadia-zt-read-2-en-desc\"><title id=\"ip-floadia-zt-read-2-en-title\">Turn on Coupling and Sense the Channel</title><desc id=\"ip-floadia-zt-read-2-en-desc\">Channel current reflects FG charge.</desc><defs><marker id=\"ip-floadia-zt-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  },
                  {
                    "id": "ip-floadia-zt-read-3-en-frame",
                    "title": "Latch then Isolate",
                    "state": "Charge retained",
                    "stimulus": "Bias zero",
                    "caption": "Automotive narrative must be checked against target product conditions.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-zt-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-zt-read-3-en-title ip-floadia-zt-read-3-en-desc\"><title id=\"ip-floadia-zt-read-3-en-title\">Latch then Isolate</title><desc id=\"ip-floadia-zt-read-3-en-desc\">Automotive narrative must be checked against target product conditions.</desc><defs><marker id=\"ip-floadia-zt-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-zt-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-zt-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-zt-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"86\" width=\"180\" height=\"28\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"105\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"210\" y=\"134\" width=\"140\" height=\"28\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"153\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"200\" y=\"162\" width=\"160\" height=\"14\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"176\" width=\"180\" height=\"34\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"198\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"86\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"230\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"274\" cy=\"148\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-zt",
                      "ip-floadia-zt-news"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-zt",
                    "label": "Floadia LEE Flash ZT",
                    "url": "https://floadia.com/product/lee-flash-zt/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
                    "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
                  },
                  {
                    "id": "ip-floadia-zt-news",
                    "label": "Floadia ZT News: Floating Gate",
                    "url": "https://floadia.com/news/422/",
                    "kind": "vendor",
                    "date": "2024-12-09",
                    "locator": "ZT uses a floating gate as the storage node.",
                    "limit": "The news item does not give poly count or well structure."
                  }
                ],
                "caveat": "Cycle-count copy on the page conflicts with itself; no count is treated as a guarantee."
              }
            ]
          }
        ]
      },
      {
        "id": "floadia-g1",
        "title": "Floadia LEE Flash G1: SONOS eFlash",
        "shortTitle": "Floadia · LEE Flash G1",
        "vendor": "Floadia",
        "group": "eflash",
        "hostTopic": "sonos",
        "summary": "SONOS charge-trap eFlash with 2–3 extra masks and FN program/erase. O-N-O is a teaching stack, not a measured thickness.",
        "program": "FN moves electrons into the nitride trap layer",
        "reverse": "Reverse FN removes electrons from the nitride trap layer",
        "readout": "Sense channel current at small bias",
        "lesson": "G1 is eFlash/SONOS, not zero-mask MTP ZT and not Anti-fuse ZA. A BCD narrative cannot be extrapolated to every logic node.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "LEE Flash G1: SONOS FN / FN Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same SONOS cell supports programming, electrical erase and subsequent programming. Electrons enter and leave the nitride trap layer by FN and restore a reprogrammable window.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish bit-level host commands.",
          "limits": "Two to three extra masks are integration cost, not an endurance guarantee. Nitride thickness and the bias table are unpublished.",
          "sourceIds": [
            "ip-floadia-g1"
          ],
          "before": "Programmed",
          "mechanism": "Electrons enter and leave the nitride trap layer by FN tunneling. — Mask count is integration cost, not an endurance guarantee.",
          "after": "Mask count is integration cost, not an endurance guarantee."
        },
        "structure": {
          "title": "Floadia LEE Flash G1 eFlash",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-structure-0-en-title ip-floadia-g1-structure-0-en-desc\"><title id=\"ip-floadia-g1-structure-0-en-title\">Floadia LEE Flash G1 eFlash</title><desc id=\"ip-floadia-g1-structure-0-en-desc\">SONOS charge-trap eFlash; 2–3 extra masks; FN program/erase. O-N-O is a teaching stack, not a measured thickness.</desc><defs><marker id=\"ip-floadia-g1-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "SONOS charge-trap eFlash; 2–3 extra masks; FN program/erase. O-N-O is a teaching stack, not a measured thickness.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "SiN",
              "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
            }
          ],
          "sourceIds": [
            "ip-floadia-g1"
          ]
        },
        "operations": [
          {
            "topicId": "ip-floadia-g1",
            "operationId": "write",
            "title": "Floadia LEE Flash G1 eFlash — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-floadia-g1",
                "label": "Floadia LEE Flash G1",
                "url": "https://floadia.com/product/lee-flash-g1/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                "limit": "No public nitride thickness or bias table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SONOS FN Teaching Model",
                "mechanism": "Electrons enter and leave the nitride trap layer by FN tunneling.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-floadia-g1-write-1-en-frame",
                    "title": "SONOS Trap-Layer Initial State",
                    "state": "Few trapped electrons",
                    "stimulus": "Bias zero",
                    "caption": "G1 is published as SONOS with 2–3 extra masks.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-write-1-en-title ip-floadia-g1-write-1-en-desc\"><title id=\"ip-floadia-g1-write-1-en-title\">SONOS Trap-Layer Initial State</title><desc id=\"ip-floadia-g1-write-1-en-desc\">G1 is published as SONOS with 2–3 extra masks.</desc><defs><marker id=\"ip-floadia-g1-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-write-2-en-frame",
                    "title": "FN Moves Electrons into the Nitride",
                    "state": "Programming",
                    "stimulus": "FN",
                    "caption": "Program and erase both use FN.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-write-2-en-title ip-floadia-g1-write-2-en-desc\"><title id=\"ip-floadia-g1-write-2-en-title\">FN Moves Electrons into the Nitride</title><desc id=\"ip-floadia-g1-write-2-en-desc\">Program and erase both use FN.</desc><defs><marker id=\"ip-floadia-g1-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">＋VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-write-3-en-frame",
                    "title": "Electrons Remain in the Trap Layer",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "O-N-O thickness is unpublished.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-write-3-en-title ip-floadia-g1-write-3-en-desc\"><title id=\"ip-floadia-g1-write-3-en-title\">Electrons Remain in the Trap Layer</title><desc id=\"ip-floadia-g1-write-3-en-desc\">O-N-O thickness is unpublished.</desc><defs><marker id=\"ip-floadia-g1-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g1",
                    "label": "Floadia LEE Flash G1",
                    "url": "https://floadia.com/product/lee-flash-g1/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                    "limit": "No public nitride thickness or bias table."
                  }
                ],
                "caveat": "A BCD narrative cannot be extrapolated to every logic node."
              }
            ]
          },
          {
            "topicId": "ip-floadia-g1",
            "operationId": "erase",
            "title": "Floadia LEE Flash G1 eFlash — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-floadia-g1",
                "label": "Floadia LEE Flash G1",
                "url": "https://floadia.com/product/lee-flash-g1/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                "limit": "No public nitride thickness or bias table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SONOS FN Teaching Model",
                "mechanism": "Electrons enter and leave the nitride trap layer by FN tunneling.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-floadia-g1-erase-1-en-frame",
                    "title": "Start from Trapped Electrons",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "Erase is not TwinBit hot-hole compensation.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-erase-1-en-title ip-floadia-g1-erase-1-en-desc\"><title id=\"ip-floadia-g1-erase-1-en-title\">Start from Trapped Electrons</title><desc id=\"ip-floadia-g1-erase-1-en-desc\">Erase is not TwinBit hot-hole compensation.</desc><defs><marker id=\"ip-floadia-g1-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-erase-2-en-frame",
                    "title": "Reverse FN Removes Electrons from Nitride",
                    "state": "Erasing",
                    "stimulus": "Reverse FN",
                    "caption": "A BCD narrative cannot be extrapolated to every logic platform.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-erase-2-en-title ip-floadia-g1-erase-2-en-desc\"><title id=\"ip-floadia-g1-erase-2-en-title\">Reverse FN Removes Electrons from Nitride</title><desc id=\"ip-floadia-g1-erase-2-en-desc\">A BCD narrative cannot be extrapolated to every logic platform.</desc><defs><marker id=\"ip-floadia-g1-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">−VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-erase-3-en-frame",
                    "title": "Return to a Reprogrammable Trap Window",
                    "state": "Erased",
                    "stimulus": "Bias zero",
                    "caption": "Mask count is integration cost, not an endurance guarantee.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-erase-3-en-title ip-floadia-g1-erase-3-en-desc\"><title id=\"ip-floadia-g1-erase-3-en-title\">Return to a Reprogrammable Trap Window</title><desc id=\"ip-floadia-g1-erase-3-en-desc\">Mask count is integration cost, not an endurance guarantee.</desc><defs><marker id=\"ip-floadia-g1-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g1",
                    "label": "Floadia LEE Flash G1",
                    "url": "https://floadia.com/product/lee-flash-g1/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                    "limit": "No public nitride thickness or bias table."
                  }
                ],
                "caveat": "A BCD narrative cannot be extrapolated to every logic node."
              }
            ]
          },
          {
            "topicId": "ip-floadia-g1",
            "operationId": "read",
            "title": "Floadia LEE Flash G1 eFlash — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-floadia-g1",
                "label": "Floadia LEE Flash G1",
                "url": "https://floadia.com/product/lee-flash-g1/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                "limit": "No public nitride thickness or bias table."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SONOS FN Teaching Model",
                "mechanism": "Electrons enter and leave the nitride trap layer by FN tunneling.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-floadia-g1-read-1-en-frame",
                    "title": "The Same SONOS Cell Awaits Read",
                    "state": "Existing trapped charge",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not use program-level FN.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-read-1-en-title ip-floadia-g1-read-1-en-desc\"><title id=\"ip-floadia-g1-read-1-en-title\">The Same SONOS Cell Awaits Read</title><desc id=\"ip-floadia-g1-read-1-en-desc\">Read does not use program-level FN.</desc><defs><marker id=\"ip-floadia-g1-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-read-2-en-frame",
                    "title": "Sense Channel Current",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "Trapped charge shifts threshold.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-read-2-en-title ip-floadia-g1-read-2-en-desc\"><title id=\"ip-floadia-g1-read-2-en-title\">Sense Channel Current</title><desc id=\"ip-floadia-g1-read-2-en-desc\">Trapped charge shifts threshold.</desc><defs><marker id=\"ip-floadia-g1-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  },
                  {
                    "id": "ip-floadia-g1-read-3-en-frame",
                    "title": "Latch then Isolate",
                    "state": "Charge retained",
                    "stimulus": "Bias zero",
                    "caption": "Read disturb must be checked on the target macro.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g1-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g1-read-3-en-title ip-floadia-g1-read-3-en-desc\"><title id=\"ip-floadia-g1-read-3-en-title\">Latch then Isolate</title><desc id=\"ip-floadia-g1-read-3-en-desc\">Read disturb must be checked on the target macro.</desc><defs><marker id=\"ip-floadia-g1-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g1-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g1-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g1-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g1"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g1",
                    "label": "Floadia LEE Flash G1",
                    "url": "https://floadia.com/product/lee-flash-g1/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
                    "limit": "No public nitride thickness or bias table."
                  }
                ],
                "caveat": "A BCD narrative cannot be extrapolated to every logic node."
              }
            ]
          }
        ]
      },
      {
        "id": "floadia-g2",
        "title": "Floadia LEE Flash G2: Sandwiched SONOS eFlash",
        "shortTitle": "Floadia · LEE Flash G2",
        "vendor": "Floadia",
        "group": "eflash",
        "hostTopic": "sonos",
        "summary": "A SONOS storage cell sandwiched by switch transistors, with four extra masks. The vendor emphasizes VDD read without high voltage on diffusion terminals, and marks ongoing development.",
        "program": "FN program through the side switches",
        "reverse": "Reverse FN erase through the side switches",
        "readout": "Sense after the side switches turn on at VDD",
        "lesson": "G2’s read claim is VDD plus side switches; it does not cancel charge-trap physics. An in-development note is not a production guarantee and is not a generic standard-cell library.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "LEE Flash G2: Sandwiched SONOS Cycle",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same sandwiched SONOS cell supports programming, electrical erase and subsequent programming. Side switches select the cell; storage remains in the nitride trap layer.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish bit-level host commands.",
          "limits": "The vendor marks ongoing development. VDD read does not mean erase needs no internal high-voltage generation. Four extra masks must not be extrapolated to G1 or ZT.",
          "sourceIds": [
            "ip-floadia-g2"
          ],
          "before": "Programmed",
          "mechanism": "Program/erase still use charge trapping; read selects through side switches at VDD. — An in-development note is not a production guarantee.",
          "after": "An in-development note is not a production guarantee."
        },
        "structure": {
          "title": "Floadia LEE Flash G2 eFlash",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-structure-0-en-title ip-floadia-g2-structure-0-en-desc\"><title id=\"ip-floadia-g2-structure-0-en-title\">Floadia LEE Flash G2 eFlash</title><desc id=\"ip-floadia-g2-structure-0-en-desc\">A SONOS storage cell sandwiched by switch transistors; 4 extra masks; read at VDD without high voltage on diffusion terminals.</desc><defs><marker id=\"ip-floadia-g2-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "A SONOS storage cell sandwiched by switch transistors; 4 extra masks; read at VDD without high voltage on diffusion terminals.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "SiN",
              "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
            }
          ],
          "sourceIds": [
            "ip-floadia-g2"
          ]
        },
        "operations": [
          {
            "topicId": "ip-floadia-g2",
            "operationId": "write",
            "title": "Floadia LEE Flash G2 eFlash — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-floadia-g2",
                "label": "Floadia LEE Flash G2",
                "url": "https://floadia.com/product/lee-flash-g2/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                "limit": "An in-development note is not a production guarantee."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Sandwiched SONOS Teaching Model",
                "mechanism": "Program/erase still use charge trapping; read selects through side switches at VDD.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-floadia-g2-write-1-en-frame",
                    "title": "Sandwiched SONOS Cell with Side Switches Off",
                    "state": "Few trapped electrons",
                    "stimulus": "Switches off",
                    "caption": "G2 sandwiches SONOS between switch transistors.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-write-1-en-title ip-floadia-g2-write-1-en-desc\"><title id=\"ip-floadia-g2-write-1-en-title\">Sandwiched SONOS Cell with Side Switches Off</title><desc id=\"ip-floadia-g2-write-1-en-desc\">G2 sandwiches SONOS between switch transistors.</desc><defs><marker id=\"ip-floadia-g2-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-write-2-en-frame",
                    "title": "Apply FN Program through Side Switches",
                    "state": "Programming",
                    "stimulus": "Side switches on; FN",
                    "caption": "Four extra masks is the published integration number.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-write-2-en-title ip-floadia-g2-write-2-en-desc\"><title id=\"ip-floadia-g2-write-2-en-title\">Apply FN Program through Side Switches</title><desc id=\"ip-floadia-g2-write-2-en-desc\">Four extra masks is the published integration number.</desc><defs><marker id=\"ip-floadia-g2-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">＋VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-write-3-en-frame",
                    "title": "Turn Switches Off; Charge Remains in Nitride",
                    "state": "Programmed",
                    "stimulus": "Switches off",
                    "caption": "The vendor marks ongoing development.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-write-3-en-title ip-floadia-g2-write-3-en-desc\"><title id=\"ip-floadia-g2-write-3-en-title\">Turn Switches Off; Charge Remains in Nitride</title><desc id=\"ip-floadia-g2-write-3-en-desc\">The vendor marks ongoing development.</desc><defs><marker id=\"ip-floadia-g2-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g2",
                    "label": "Floadia LEE Flash G2",
                    "url": "https://floadia.com/product/lee-flash-g2/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                    "limit": "An in-development note is not a production guarantee."
                  }
                ],
                "caveat": "The vendor marks ongoing development; this drawing teaches only the published structural principle."
              }
            ]
          },
          {
            "topicId": "ip-floadia-g2",
            "operationId": "erase",
            "title": "Floadia LEE Flash G2 eFlash — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-floadia-g2",
                "label": "Floadia LEE Flash G2",
                "url": "https://floadia.com/product/lee-flash-g2/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                "limit": "An in-development note is not a production guarantee."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Sandwiched SONOS Teaching Model",
                "mechanism": "Program/erase still use charge trapping; read selects through side switches at VDD.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-floadia-g2-erase-1-en-frame",
                    "title": "The Sandwiched Cell Still Holds Trapped Charge",
                    "state": "Programmed",
                    "stimulus": "Switches off",
                    "caption": "Erase remains charge-trap physics, not a fuse.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-erase-1-en-title ip-floadia-g2-erase-1-en-desc\"><title id=\"ip-floadia-g2-erase-1-en-title\">The Sandwiched Cell Still Holds Trapped Charge</title><desc id=\"ip-floadia-g2-erase-1-en-desc\">Erase remains charge-trap physics, not a fuse.</desc><defs><marker id=\"ip-floadia-g2-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-erase-2-en-frame",
                    "title": "Reverse FN Erase through Side Switches",
                    "state": "Erasing",
                    "stimulus": "Side switches on; reverse FN",
                    "caption": "No high voltage on diffusion is a vendor read/logic claim; erase may still need internal HV generation.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-erase-2-en-title ip-floadia-g2-erase-2-en-desc\"><title id=\"ip-floadia-g2-erase-2-en-title\">Reverse FN Erase through Side Switches</title><desc id=\"ip-floadia-g2-erase-2-en-desc\">No high voltage on diffusion is a vendor read/logic claim; erase may still need internal HV generation.</desc><defs><marker id=\"ip-floadia-g2-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">−VFN</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-erase-3-en-frame",
                    "title": "Turn Switches Off and Return to Reprogrammable",
                    "state": "Erased",
                    "stimulus": "Switches off",
                    "caption": "An in-development note is not a production guarantee.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-erase-3-en-title ip-floadia-g2-erase-3-en-desc\"><title id=\"ip-floadia-g2-erase-3-en-title\">Turn Switches Off and Return to Reprogrammable</title><desc id=\"ip-floadia-g2-erase-3-en-desc\">An in-development note is not a production guarantee.</desc><defs><marker id=\"ip-floadia-g2-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g2",
                    "label": "Floadia LEE Flash G2",
                    "url": "https://floadia.com/product/lee-flash-g2/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                    "limit": "An in-development note is not a production guarantee."
                  }
                ],
                "caveat": "The vendor marks ongoing development; this drawing teaches only the published structural principle."
              }
            ]
          },
          {
            "topicId": "ip-floadia-g2",
            "operationId": "read",
            "title": "Floadia LEE Flash G2 eFlash — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-floadia-g2",
                "label": "Floadia LEE Flash G2",
                "url": "https://floadia.com/product/lee-flash-g2/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                "limit": "An in-development note is not a production guarantee."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Sandwiched SONOS Teaching Model",
                "mechanism": "Program/erase still use charge trapping; read selects through side switches at VDD.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-floadia-g2-read-1-en-frame",
                    "title": "Select Side Switches before VDD Read",
                    "state": "Existing trapped charge",
                    "stimulus": "Prepare VDD read",
                    "caption": "The vendor emphasizes read at VDD.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-read-1-en-title ip-floadia-g2-read-1-en-desc\"><title id=\"ip-floadia-g2-read-1-en-title\">Select Side Switches before VDD Read</title><desc id=\"ip-floadia-g2-read-1-en-desc\">The vendor emphasizes read at VDD.</desc><defs><marker id=\"ip-floadia-g2-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-read-2-en-frame",
                    "title": "Side Switches Turn On at VDD and Sense",
                    "state": "Reading",
                    "stimulus": "VDD; switches on",
                    "caption": "Diffusion terminals do not take program-level high voltage.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-read-2-en-title ip-floadia-g2-read-2-en-desc\"><title id=\"ip-floadia-g2-read-2-en-title\">Side Switches Turn On at VDD and Sense</title><desc id=\"ip-floadia-g2-read-2-en-desc\">Diffusion terminals do not take program-level high voltage.</desc><defs><marker id=\"ip-floadia-g2-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">VDD</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  },
                  {
                    "id": "ip-floadia-g2-read-3-en-frame",
                    "title": "Latch then Turn Switches Off",
                    "state": "Charge retained",
                    "stimulus": "Switches off",
                    "caption": "Non-volatilized logic is product positioning, not proof of a generic standard-cell library.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-floadia-g2-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-floadia-g2-read-3-en-title ip-floadia-g2-read-3-en-desc\"><title id=\"ip-floadia-g2-read-3-en-title\">Latch then Turn Switches Off</title><desc id=\"ip-floadia-g2-read-3-en-desc\">Non-volatilized logic is product positioning, not proof of a generic standard-cell library.</desc><defs><marker id=\"ip-floadia-g2-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-floadia-g2-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-floadia-g2-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-floadia-g2-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"96\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"123\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"410\" y=\"150\" width=\"54\" height=\"50\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"437\" y=\"180\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SW</text><rect x=\"190\" y=\"96\" width=\"180\" height=\"22\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"112\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">CG</text><rect x=\"200\" y=\"118\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"200\" y=\"130\" width=\"160\" height=\"22\" fill=\"#d98762\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"146\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SiN</text><rect x=\"200\" y=\"152\" width=\"160\" height=\"12\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"190\" y=\"164\" width=\"180\" height=\"36\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"280\" y=\"186\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"280\" y1=\"54\" x2=\"280\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"296\" y=\"74\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"228\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"252\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"276\" cy=\"141\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-floadia-g2"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "SiN",
                    "meaning": "Terracotta marks the nitride trap layer; thickness is unpublished."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-floadia-g2",
                    "label": "Floadia LEE Flash G2",
                    "url": "https://floadia.com/product/lee-flash-g2/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
                    "limit": "An in-development note is not a production guarantee."
                  }
                ],
                "caveat": "The vendor marks ongoing development; this drawing teaches only the published structural principle."
              }
            ]
          }
        ]
      },
      {
        "id": "sst-superflash",
        "title": "SST SuperFlash: Split-Gate eFlash",
        "shortTitle": "SST · SuperFlash",
        "vendor": "SST / Microchip",
        "group": "eflash",
        "hostTopic": "nor",
        "summary": "Split-gate Flash: a select gate beside a floating gate. Program uses source-side injection; erase uses interpoly FN.",
        "program": "Source-side injection writes hot electrons into the floating gate",
        "reverse": "Interpoly FN removes electrons from the floating gate",
        "readout": "Sense channel current after the select gate turns on",
        "lesson": "SuperFlash program is SSI, not a generic CHE label; erase is inter-gate FN, not channel erase. A licensed process range is not proof of one production node.",
        "eraseCycle": {
          "kind": "electrical",
          "title": "SuperFlash: SSI Program / Interpoly FN Erase",
          "sequence": "PGM → ERS → PGM",
          "definition": "The same split-gate cell supports programming, electrical erase and subsequent programming. Erase lets electrons leave FG through the interpoly oxide and restores a reprogrammable window.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "Read structure and mechanism within the named SuperFlash generation. 2018 shipment and node tables are not guarantees for every product in 2026.",
          "sourceIds": [
            "ip-sst-home",
            "ip-sst-superflash"
          ],
          "before": "Programmed",
          "mechanism": "Hot electrons inject from the source side into FG; during erase, electrons leave FG through the interpoly oxide. — The teaching drawing is not a foundry metrology cross-section.",
          "after": "The teaching drawing is not a foundry metrology cross-section."
        },
        "structure": {
          "title": "SST SuperFlash eFlash",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-structure-0-en-title ip-sst-superflash-structure-0-en-desc\"><title id=\"ip-sst-superflash-structure-0-en-title\">SST SuperFlash eFlash</title><desc id=\"ip-sst-superflash-structure-0-en-desc\">Split-gate Flash: a select gate beside a floating gate. Program uses source-side injection; erase uses interpoly FN.</desc><defs><marker id=\"ip-sst-superflash-structure-0-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-structure-0-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-structure-0-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-structure-0-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-structure-0-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Split-gate Flash: a select gate beside a floating gate. Program uses source-side injection; erase uses interpoly FN.",
          "legend": [
            {
              "symbol": "Dielectric",
              "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
            },
            {
              "symbol": "Channel / Well",
              "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
            },
            {
              "symbol": "Bias / I",
              "meaning": "Green arrows denote bias or conventional current direction."
            },
            {
              "symbol": "e−",
              "meaning": "Blue dots denote electrons; the count is qualitative."
            }
          ],
          "sourceIds": [
            "ip-sst-home",
            "ip-sst-superflash"
          ]
        },
        "operations": [
          {
            "topicId": "ip-sst-superflash",
            "operationId": "write",
            "title": "SST SuperFlash eFlash — Write",
            "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
            "sources": [
              {
                "id": "ip-sst-home",
                "label": "SST Home and Services",
                "url": "https://www.sst.com/services/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
              },
              {
                "id": "ip-sst-superflash",
                "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "vendor",
                "date": "2018-03",
                "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SSI / Interpoly FN Teaching Model",
                "mechanism": "Hot electrons inject from the source side into FG; during erase, electrons leave FG through the interpoly oxide.",
                "summary": "Establish the programmed state by the published mechanism without splicing unpublished bias tables.",
                "frames": [
                  {
                    "id": "ip-sst-superflash-write-1-en-frame",
                    "title": "Split Gate: Select Gate beside Floating Gate",
                    "state": "Fewer FG electrons",
                    "stimulus": "Bias zero",
                    "caption": "SuperFlash is published as a split-gate architecture.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-write-1-en-title ip-sst-superflash-write-1-en-desc\"><title id=\"ip-sst-superflash-write-1-en-title\">Split Gate: Select Gate beside Floating Gate</title><desc id=\"ip-sst-superflash-write-1-en-desc\">SuperFlash is published as a split-gate architecture.</desc><defs><marker id=\"ip-sst-superflash-write-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-write-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-write-2-en-frame",
                    "title": "Source-Side Injection Writes Hot Electrons into FG",
                    "state": "Programming",
                    "stimulus": "SSI",
                    "caption": "The program mechanism is source-side injection, not a generic CHE label.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-write-2-en-title ip-sst-superflash-write-2-en-desc\"><title id=\"ip-sst-superflash-write-2-en-title\">Source-Side Injection Writes Hot Electrons into FG</title><desc id=\"ip-sst-superflash-write-2-en-desc\">The program mechanism is source-side injection, not a generic CHE label.</desc><defs><marker id=\"ip-sst-superflash-write-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-write-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">PGM</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><line x1=\"210\" y1=\"168\" x2=\"280\" y2=\"118\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-sst-superflash-write-2-en-electron)\"/><text x=\"400\" y=\"128\" text-anchor=\"start\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">SSI</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-write-3-en-frame",
                    "title": "Electrons Remain on FG",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "The licensed process range is not proof of one node.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-write-3-en-title ip-sst-superflash-write-3-en-desc\"><title id=\"ip-sst-superflash-write-3-en-title\">Electrons Remain on FG</title><desc id=\"ip-sst-superflash-write-3-en-desc\">The licensed process range is not proof of one node.</desc><defs><marker id=\"ip-sst-superflash-write-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-write-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-write-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sst-home",
                    "label": "SST Home and Services",
                    "url": "https://www.sst.com/services/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                    "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
                  },
                  {
                    "id": "ip-sst-superflash",
                    "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                    "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                    "kind": "vendor",
                    "date": "2018-03",
                    "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                    "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
                  }
                ],
                "caveat": "The process range is a licensing narrative, not proof of one production node."
              }
            ]
          },
          {
            "topicId": "ip-sst-superflash",
            "operationId": "erase",
            "title": "SST SuperFlash eFlash — Erase / Restore Limit",
            "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
            "sources": [
              {
                "id": "ip-sst-home",
                "label": "SST Home and Services",
                "url": "https://www.sst.com/services/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
              },
              {
                "id": "ip-sst-superflash",
                "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "vendor",
                "date": "2018-03",
                "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SSI / Interpoly FN Teaching Model",
                "mechanism": "Hot electrons inject from the source side into FG; during erase, electrons leave FG through the interpoly oxide.",
                "summary": "Electrically erase by the published mechanism so the cell returns to a reprogrammable window.",
                "frames": [
                  {
                    "id": "ip-sst-superflash-erase-1-en-frame",
                    "title": "FG Already Holds Injected Electrons",
                    "state": "Programmed",
                    "stimulus": "Bias zero",
                    "caption": "Erase uses interpoly FN, not a reverse SSI current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-erase-1-en-title ip-sst-superflash-erase-1-en-desc\"><title id=\"ip-sst-superflash-erase-1-en-title\">FG Already Holds Injected Electrons</title><desc id=\"ip-sst-superflash-erase-1-en-desc\">Erase uses interpoly FN, not a reverse SSI current.</desc><defs><marker id=\"ip-sst-superflash-erase-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-erase-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-erase-2-en-frame",
                    "title": "Interpoly FN Removes Electrons from FG",
                    "state": "Erasing",
                    "stimulus": "interpoly FN",
                    "caption": "Electrons cross the oxide between select gate and floating gate.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-erase-2-en-title ip-sst-superflash-erase-2-en-desc\"><title id=\"ip-sst-superflash-erase-2-en-title\">Interpoly FN Removes Electrons from FG</title><desc id=\"ip-sst-superflash-erase-2-en-desc\">Electrons cross the oxide between select gate and floating gate.</desc><defs><marker id=\"ip-sst-superflash-erase-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-erase-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">ERS</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><line x1=\"310\" y1=\"96\" x2=\"310\" y2=\"70\" stroke=\"#075f9d\" stroke-width=\"3\" stroke-linecap=\"round\" marker-end=\"url(#ip-sst-superflash-erase-2-en-electron)\"/><text x=\"20\" y=\"88\" text-anchor=\"start\" fill=\"#075f9d\" font-size=\"22\" font-weight=\"600\">FN off FG</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-erase-3-en-frame",
                    "title": "FG Returns to a Reprogrammable Window",
                    "state": "Erased",
                    "stimulus": "Bias zero",
                    "caption": "The teaching drawing is not a foundry metrology cross-section.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-erase-3-en-title ip-sst-superflash-erase-3-en-desc\"><title id=\"ip-sst-superflash-erase-3-en-title\">FG Returns to a Reprogrammable Window</title><desc id=\"ip-sst-superflash-erase-3-en-desc\">The teaching drawing is not a foundry metrology cross-section.</desc><defs><marker id=\"ip-sst-superflash-erase-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-erase-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-erase-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sst-home",
                    "label": "SST Home and Services",
                    "url": "https://www.sst.com/services/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                    "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
                  },
                  {
                    "id": "ip-sst-superflash",
                    "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                    "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                    "kind": "vendor",
                    "date": "2018-03",
                    "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                    "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
                  }
                ],
                "caveat": "The process range is a licensing narrative, not proof of one production node."
              }
            ]
          },
          {
            "topicId": "ip-sst-superflash",
            "operationId": "read",
            "title": "SST SuperFlash eFlash — Read",
            "summary": "Sense the retained state under product read conditions, then latch and isolate.",
            "sources": [
              {
                "id": "ip-sst-home",
                "label": "SST Home and Services",
                "url": "https://www.sst.com/services/",
                "kind": "vendor",
                "date": "2026-09-16",
                "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
              },
              {
                "id": "ip-sst-superflash",
                "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                "kind": "vendor",
                "date": "2018-03",
                "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "SSI / Interpoly FN Teaching Model",
                "mechanism": "Hot electrons inject from the source side into FG; during erase, electrons leave FG through the interpoly oxide.",
                "summary": "Sense the retained state under product read conditions, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-sst-superflash-read-1-en-frame",
                    "title": "The Same Split-Gate Cell Awaits Read",
                    "state": "Existing FG charge",
                    "stimulus": "Read bias is product-defined",
                    "caption": "Read does not repeat SSI program.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-read-1-en-title ip-sst-superflash-read-1-en-desc\"><title id=\"ip-sst-superflash-read-1-en-title\">The Same Split-Gate Cell Awaits Read</title><desc id=\"ip-sst-superflash-read-1-en-desc\">Read does not repeat SSI program.</desc><defs><marker id=\"ip-sst-superflash-read-1-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-1-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-1-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-1-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-read-1-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-read-2-en-frame",
                    "title": "Turn on Select Gate and Sense the Channel",
                    "state": "Reading",
                    "stimulus": "Small bias",
                    "caption": "Channel current reflects FG charge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-read-2-en-title ip-sst-superflash-read-2-en-desc\"><title id=\"ip-sst-superflash-read-2-en-title\">Turn on Select Gate and Sense the Channel</title><desc id=\"ip-sst-superflash-read-2-en-desc\">Channel current reflects FG charge.</desc><defs><marker id=\"ip-sst-superflash-read-2-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-2-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-2-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-2-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-read-2-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">READ</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#087766\" font-size=\"22\" font-weight=\"600\">ON</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  },
                  {
                    "id": "ip-sst-superflash-read-3-en-frame",
                    "title": "Latch then Turn off Select Gate",
                    "state": "Charge retained",
                    "stimulus": "Bias zero",
                    "caption": "Read-speed ratings must be checked on the licensed target version.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-sst-superflash-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-sst-superflash-read-3-en-title ip-sst-superflash-read-3-en-desc\"><title id=\"ip-sst-superflash-read-3-en-title\">Latch then Turn off Select Gate</title><desc id=\"ip-sst-superflash-read-3-en-desc\">Read-speed ratings must be checked on the licensed target version.</desc><defs><marker id=\"ip-sst-superflash-read-3-en-electron\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#075f9d\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-3-en-hole\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#b52f43\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-3-en-field\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#a34b10\" stroke-width=\"2\"/></marker><marker id=\"ip-sst-superflash-read-3-en-current\" markerWidth=\"10\" markerHeight=\"10\" refX=\"8\" refY=\"5\" orient=\"auto\" markerUnits=\"userSpaceOnUse\"><path d=\"M1 1L8 5L1 9\" fill=\"none\" stroke=\"#087766\" stroke-width=\"2\"/></marker></defs><style>#ip-sst-superflash-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px;font-weight:600}#ip-sst-superflash-read-3-en{background:#f7f9fc;color:#16334c}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#f7f9fc\" stroke=\"#16334c\" stroke-width=\"1.4\" rx=\"14\" stroke=\"none\"/><text x=\"88\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Select</text><text x=\"430\" y=\"54\" text-anchor=\"start\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><rect x=\"70\" y=\"210\" width=\"420\" height=\"90\" fill=\"#bed1e2\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"80\" y=\"292\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">P-well / Substrate</text><rect x=\"150\" y=\"96\" width=\"90\" height=\"36\" fill=\"#899ba9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"119\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">SG</text><rect x=\"250\" y=\"86\" width=\"120\" height=\"46\" fill=\"#c2a269\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"310\" y=\"113\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">FG</text><rect x=\"150\" y=\"132\" width=\"220\" height=\"16\" fill=\"#f3e2af\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"150\" y=\"148\" width=\"80\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><rect x=\"250\" y=\"148\" width=\"120\" height=\"40\" fill=\"#7299b9\" stroke=\"#16334c\" stroke-width=\"1.4\" /><text x=\"195\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Source</text><text x=\"310\" y=\"172\" text-anchor=\"middle\" fill=\"#16334c\" font-size=\"22\" font-weight=\"600\">Channel</text><line x1=\"195\" y1=\"54\" x2=\"195\" y2=\"96\" stroke=\"#16334c\" stroke-width=\"2\" stroke-linecap=\"round\"/><text x=\"211\" y=\"72\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">OFF</text><circle data-charge=\"stored\" cx=\"270\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"292\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><circle data-charge=\"stored\" cx=\"314\" cy=\"109\" r=\"8\" fill=\"#075f9d\"/><text x=\"20\" y=\"338\" text-anchor=\"start\" fill=\"#5b6f82\" font-size=\"22\" font-weight=\"600\">Original Structure Model; Not to Scale</text></svg>",
                    "sourceIds": [
                      "ip-sst-home",
                      "ip-sst-superflash"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Dielectric",
                    "meaning": "Pale yellow marks a dielectric; thickness and material are unspecified."
                  },
                  {
                    "symbol": "Channel / Well",
                    "meaning": "Blue-gray marks a silicon channel or well function, not a metrology cross-section."
                  },
                  {
                    "symbol": "Bias / I",
                    "meaning": "Green arrows denote bias or conventional current direction."
                  },
                  {
                    "symbol": "e−",
                    "meaning": "Blue dots denote electrons; the count is qualitative."
                  }
                ],
                "sources": [
                  {
                    "id": "ip-sst-home",
                    "label": "SST Home and Services",
                    "url": "https://www.sst.com/services/",
                    "kind": "vendor",
                    "date": "2026-09-16",
                    "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
                    "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
                  },
                  {
                    "id": "ip-sst-superflash",
                    "label": "SST / Microchip SuperFlash Brochure DS00001425F",
                    "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
                    "kind": "vendor",
                    "date": "2018-03",
                    "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
                    "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
                  }
                ],
                "caveat": "The process range is a licensing narrative, not proof of one production node."
              }
            ]
          }
        ]
      },
      {
        "id": "numem-mram",
        "title": "Numem: Embedded STT-MRAM IP Cell",
        "shortTitle": "Numem · STT-MRAM IP",
        "vendor": "Numem",
        "group": "mram",
        "hostTopic": "stt",
        "summary": "Connect foundry-standard STT-MRAM cells to embedded IP by identifying the magnetic junction, access transistor, bit line, source line and sensing path.",
        "program": "Spin-transfer torque switches magnetization",
        "reverse": "Opposite write current overwrites the state",
        "readout": "Magnetic-junction resistance contrast",
        "lesson": "Numem can use foundry-standard STT cells while integrating its layout, circuits and memory architecture. Understand the two junction states and access/sense paths before considering macro behavior; a control-architecture improvement is not a new storage mechanism.",
        "eraseCycle": {
          "kind": "magnetic",
          "title": "Erase Semantics: Direct Magnetic Overwrite, No Separate ERS",
          "sequence": "P ⇄ AP",
          "definition": "MRAM overwrites existing data by changing magnetic state, without a Flash-style erase-before-program step. Clearing to all zeros or ones is a series of target-state writes; the P/AP-to-data mapping is product-specific.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-numem-current",
            "ip-numem-2019",
            "ip-stt-physics"
          ],
          "before": "P",
          "mechanism": "MTJ free-layer magnetization stores information — Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.",
          "after": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step."
        },
        "structure": {
          "title": "Numem MRAM IP: STT Teaching Reconstruction",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-structure-0-en-title ip-study-numem-mram-structure-0-en-desc\"><title id=\"ip-study-numem-mram-structure-0-en-title\">Numem MRAM IP: STT Teaching Reconstruction</title><desc id=\"ip-study-numem-mram-structure-0-en-desc\">FL/tunnel barrier/RL represent STT functions; A/B are teaching terminals. WL/BL/SL follow the 2019 Numem architecture without claiming a layer-to-line mapping.</desc><style>#ip-study-numem-mram-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-structure-0-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><text x=\"28\" y=\"338\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "FL/tunnel barrier/RL represent STT functions; A/B are teaching terminals. WL/BL/SL follow the 2019 Numem architecture without claiming a layer-to-line mapping.",
          "legend": [
            {
              "symbol": "FL / RL",
              "meaning": "Free/reference layers; arrows are moments, not particle flow"
            },
            {
              "symbol": "Ic / e−",
              "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
            },
            {
              "symbol": "A / B; BL* / SL*",
              "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
            },
            {
              "symbol": "WL; P / AP",
              "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
            },
            {
              "symbol": "τSTT",
              "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
            }
          ],
          "sourceIds": [
            "ip-numem-current",
            "ip-numem-2019",
            "ip-stt-physics"
          ]
        },
        "operations": [
          {
            "topicId": "ip-numem-mram",
            "operationId": "write",
            "title": "Numem MRAM IP: STT Teaching Reconstruction — Write",
            "summary": "Write free-layer magnetization through spin-transfer torque.",
            "sources": [
              {
                "id": "ip-numem-current",
                "label": "Numem: Public MRAM IP Positioning",
                "url": "https://www.numem.com/",
                "kind": "Manufacturer product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "What is Numem MRAM?; Numem MRAM IP",
                "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
              },
              {
                "id": "ip-numem-2019",
                "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2019-08-05",
                "accessedAt": "2026-09-10",
                "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
              },
              {
                "id": "ip-stt-physics",
                "label": "Everspin: STT Family Physics",
                "url": "https://www.everspin.com/stt-mram-technology",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Public IP Architecture + Material-Unspecified STT Model",
                "mechanism": "MTJ free-layer magnetization stores information",
                "summary": "Write free-layer magnetization through spin-transfer torque.",
                "frames": [
                  {
                    "id": "ip-study-numem-mram-write-1-en",
                    "title": "Initial AP State",
                    "state": "AP",
                    "stimulus": "WL off; drive zero",
                    "caption": "WL is off and the cell retains AP; this sequence writes P.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-write-1-en-title ip-study-numem-mram-write-1-en-desc\"><title id=\"ip-study-numem-mram-write-1-en-title\">Initial AP State</title><desc id=\"ip-study-numem-mram-write-1-en-desc\">WL is off and the cell retains AP; this sequence writes P.</desc><style>#ip-study-numem-mram-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-write-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-write-2-en",
                    "title": "Select and Apply Spin Drive",
                    "state": "Switching",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "WL turns on and teaching drive A/B crosses the MTJ; electron and conventional-current arrows oppose each other. The actual BL/SL layer mapping requires the PDK.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-write-2-en-title ip-study-numem-mram-write-2-en-desc\"><title id=\"ip-study-numem-mram-write-2-en-title\">Select and Apply Spin Drive</title><desc id=\"ip-study-numem-mram-write-2-en-desc\">WL turns on and teaching drive A/B crosses the MTJ; electron and conventional-current arrows oppose each other. The actual BL/SL layer mapping requires the PDK.</desc><style>#ip-study-numem-mram-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-write-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Drive A</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" 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stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M304 88C321 89 322 108 308 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313 111L306 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313.89824305701336 106.68517015256216L306 111L313.89824305701336 115.31482984743782\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"360\" y=\"75\" text-anchor=\"start\" fill=\"#7f5899\" font-size=\"22\">τSTT</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-write-3-en",
                    "title": "Free Layer Switches to P",
                    "state": "P",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "Magnetization reaches P; the intermediate angle is not a measured trajectory or deterministic switching time.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-write-3-en-title ip-study-numem-mram-write-3-en-desc\"><title id=\"ip-study-numem-mram-write-3-en-title\">Free Layer Switches to P</title><desc id=\"ip-study-numem-mram-write-3-en-desc\">Magnetization reaches P; the intermediate angle is not a measured trajectory or deterministic switching time.</desc><style>#ip-study-numem-mram-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-write-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Drive A</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-write-4-en",
                    "title": "Remove Drive and Retain P",
                    "state": "P",
                    "stimulus": "WL off; drive zero",
                    "caption": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-write-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-write-4-en-title ip-study-numem-mram-write-4-en-desc\"><title id=\"ip-study-numem-mram-write-4-en-title\">Remove Drive and Retain P</title><desc id=\"ip-study-numem-mram-write-4-en-desc\">Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.</desc><style>#ip-study-numem-mram-write-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-write-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-numem-current",
                    "label": "Numem: Public MRAM IP Positioning",
                    "url": "https://www.numem.com/",
                    "kind": "Manufacturer product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "What is Numem MRAM?; Numem MRAM IP",
                    "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
                  },
                  {
                    "id": "ip-numem-2019",
                    "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                    "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2019-08-05",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                    "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
                  },
                  {
                    "id": "ip-stt-physics",
                    "label": "Everspin: STT Family Physics",
                    "url": "https://www.everspin.com/stt-mram-technology",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                    "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
                  }
                ],
                "caveat": "This reconstructs the public Numem IP architecture for teaching. Current sources do not disclose materials, thicknesses, vertical order, write-terminal polarity, or logic encoding. Directions A/B mean two calibrated opposite drives. The 2019 forced-current read is not a specification for every product."
              }
            ]
          },
          {
            "topicId": "ip-numem-mram",
            "operationId": "erase",
            "title": "Numem MRAM IP: STT Teaching Reconstruction — Reverse Overwrite",
            "summary": "Use the opposite MTJ drive to overwrite magnetization.",
            "sources": [
              {
                "id": "ip-numem-current",
                "label": "Numem: Public MRAM IP Positioning",
                "url": "https://www.numem.com/",
                "kind": "Manufacturer product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "What is Numem MRAM?; Numem MRAM IP",
                "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
              },
              {
                "id": "ip-numem-2019",
                "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2019-08-05",
                "accessedAt": "2026-09-10",
                "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
              },
              {
                "id": "ip-stt-physics",
                "label": "Everspin: STT Family Physics",
                "url": "https://www.everspin.com/stt-mram-technology",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Public IP Architecture + Material-Unspecified STT Model",
                "mechanism": "MTJ free-layer magnetization stores information",
                "summary": "Use the opposite MTJ drive to overwrite magnetization.",
                "frames": [
                  {
                    "id": "ip-study-numem-mram-erase-1-en",
                    "title": "Initial P State",
                    "state": "P",
                    "stimulus": "WL off; drive zero",
                    "caption": "WL is off and the cell retains P; this sequence overwrites AP.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-erase-1-en-title ip-study-numem-mram-erase-1-en-desc\"><title id=\"ip-study-numem-mram-erase-1-en-title\">Initial P State</title><desc id=\"ip-study-numem-mram-erase-1-en-desc\">WL is off and the cell retains P; this sequence overwrites AP.</desc><style>#ip-study-numem-mram-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-erase-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
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                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-erase-2-en",
                    "title": "Select and Apply Reverse Spin Drive",
                    "state": "Switching",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "WL turns on and teaching drive A/B crosses the MTJ; electron and conventional-current arrows oppose each other. The actual BL/SL layer mapping requires the PDK.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-erase-2-en-title ip-study-numem-mram-erase-2-en-desc\"><title id=\"ip-study-numem-mram-erase-2-en-title\">Select and Apply Reverse Spin Drive</title><desc id=\"ip-study-numem-mram-erase-2-en-desc\">WL turns on and teaching drive A/B crosses the MTJ; electron and conventional-current arrows oppose each other. The actual BL/SL layer mapping requires the PDK.</desc><style>#ip-study-numem-mram-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-erase-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Drive B</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M251.84430330899727 104.78828200655936L278.15569669100273 95.21171799344064\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272.2095346960003 101.96768998340542L278.15569669100273 95.21171799344064L269.2580172503072 93.8584624482372\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M304 88C321 89 322 108 308 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313 111L306 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313.89824305701336 106.68517015256216L306 111L313.89824305701336 115.31482984743782\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"360\" y=\"75\" text-anchor=\"start\" fill=\"#7f5899\" font-size=\"22\">τSTT</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-erase-3-en",
                    "title": "Free Layer Switches to AP",
                    "state": "AP",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-erase-3-en-title ip-study-numem-mram-erase-3-en-desc\"><title id=\"ip-study-numem-mram-erase-3-en-title\">Free Layer Switches to AP</title><desc id=\"ip-study-numem-mram-erase-3-en-desc\">Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.</desc><style>#ip-study-numem-mram-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-erase-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Drive B</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-erase-4-en",
                    "title": "Remove Drive and Retain AP",
                    "state": "AP",
                    "stimulus": "WL off; drive zero",
                    "caption": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-erase-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-erase-4-en-title ip-study-numem-mram-erase-4-en-desc\"><title id=\"ip-study-numem-mram-erase-4-en-title\">Remove Drive and Retain AP</title><desc id=\"ip-study-numem-mram-erase-4-en-desc\">Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.</desc><style>#ip-study-numem-mram-erase-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-erase-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-numem-current",
                    "label": "Numem: Public MRAM IP Positioning",
                    "url": "https://www.numem.com/",
                    "kind": "Manufacturer product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "What is Numem MRAM?; Numem MRAM IP",
                    "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
                  },
                  {
                    "id": "ip-numem-2019",
                    "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                    "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2019-08-05",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                    "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
                  },
                  {
                    "id": "ip-stt-physics",
                    "label": "Everspin: STT Family Physics",
                    "url": "https://www.everspin.com/stt-mram-technology",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                    "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
                  }
                ],
                "caveat": "This reconstructs the public Numem IP architecture for teaching. Current sources do not disclose materials, thicknesses, vertical order, write-terminal polarity, or logic encoding. Directions A/B mean two calibrated opposite drives. The 2019 forced-current read is not a specification for every product."
              }
            ]
          },
          {
            "topicId": "ip-numem-mram",
            "operationId": "read",
            "title": "Numem MRAM IP: STT Teaching Reconstruction — Read",
            "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
            "sources": [
              {
                "id": "ip-numem-current",
                "label": "Numem: Public MRAM IP Positioning",
                "url": "https://www.numem.com/",
                "kind": "Manufacturer product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "What is Numem MRAM?; Numem MRAM IP",
                "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
              },
              {
                "id": "ip-numem-2019",
                "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2019-08-05",
                "accessedAt": "2026-09-10",
                "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
              },
              {
                "id": "ip-stt-physics",
                "label": "Everspin: STT Family Physics",
                "url": "https://www.everspin.com/stt-mram-technology",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Public IP Architecture + Material-Unspecified STT Model",
                "mechanism": "MTJ free-layer magnetization stores information",
                "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-study-numem-mram-read-1-en",
                    "title": "Before Selection: P Is Retained",
                    "state": "P remains unchanged",
                    "stimulus": "WL off; read stimulus zero",
                    "caption": "The same cell starts in retained P with WL off; reading does not first reverse its moment.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-read-1-en-title ip-study-numem-mram-read-1-en-desc\"><title id=\"ip-study-numem-mram-read-1-en-title\">Before Selection: P Is Retained</title><desc id=\"ip-study-numem-mram-read-1-en-desc\">The same cell starts in retained P with WL off; reading does not first reverse its moment.</desc><style>#ip-study-numem-mram-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-read-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-read-2-en",
                    "title": "Forced Current Produces Sense Voltage",
                    "state": "P remains unchanged",
                    "stimulus": "WL on; small read stimulus",
                    "caption": "Following the 2019 architecture, a small forced current produces a voltage including access-path resistance; P voltage is below AP at equal current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-read-2-en-title ip-study-numem-mram-read-2-en-desc\"><title id=\"ip-study-numem-mram-read-2-en-title\">Forced Current Produces Sense Voltage</title><desc id=\"ip-study-numem-mram-read-2-en-desc\">Following the 2019 architecture, a small forced current produces a voltage including access-path resistance; P voltage is below AP at equal current.</desc><style>#ip-study-numem-mram-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-read-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ir</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 92L405 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">Ir</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><rect x=\"356\" y=\"235\" width=\"176\" height=\"47\" fill=\"#eaf3fa\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"7\"/><text x=\"444\" y=\"266\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">VP &lt; VAP</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  },
                  {
                    "id": "ip-study-numem-mram-read-3-en",
                    "title": "Latch and Remove Read Stimulus",
                    "state": "P remains unchanged",
                    "stimulus": "WL off; read stimulus zero",
                    "caption": "After the sensor latches, WL turns off; free/reference layers remain P without a read-restore cycle.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-numem-mram-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-numem-mram-read-3-en-title ip-study-numem-mram-read-3-en-desc\"><title id=\"ip-study-numem-mram-read-3-en-title\">Latch and Remove Read Stimulus</title><desc id=\"ip-study-numem-mram-read-3-en-desc\">After the sensor latches, WL turns off; free/reference layers remain P without a read-restore cycle.</desc><style>#ip-study-numem-mram-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-numem-mram-read-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 190L265 216\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><rect x=\"370\" y=\"116\" width=\"150\" height=\"64\" fill=\"#edf6f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"9\"/><text x=\"445\" y=\"155\" text-anchor=\"middle\" fill=\"#178084\" font-size=\"22\">SA: P</text></svg>",
                    "sourceIds": [
                      "ip-numem-current",
                      "ip-numem-2019",
                      "ip-stt-physics"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-numem-current",
                    "label": "Numem: Public MRAM IP Positioning",
                    "url": "https://www.numem.com/",
                    "kind": "Manufacturer product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "What is Numem MRAM?; Numem MRAM IP",
                    "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
                  },
                  {
                    "id": "ip-numem-2019",
                    "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
                    "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2019-08-05",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
                    "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
                  },
                  {
                    "id": "ip-stt-physics",
                    "label": "Everspin: STT Family Physics",
                    "url": "https://www.everspin.com/stt-mram-technology",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
                    "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
                  }
                ],
                "caveat": "This reconstructs the public Numem IP architecture for teaching. Current sources do not disclose materials, thicknesses, vertical order, write-terminal polarity, or logic encoding. Directions A/B mean two calibrated opposite drives. The 2019 forced-current read is not a specification for every product."
              }
            ]
          }
        ]
      },
      {
        "id": "gf-emram",
        "title": "GLOBALFOUNDRIES: 22FDX Embedded MRAM Cell",
        "shortTitle": "GF 22FDX · eMRAM Cell",
        "vendor": "GLOBALFOUNDRIES",
        "group": "mram",
        "hostTopic": "stt",
        "summary": "Use a publicly reported 22FDX research cell to examine 1T1MTJ, free and reference layers, and bidirectional switching under the source's current convention.",
        "program": "Switch under the named study's polarity convention",
        "reverse": "Reverse overwrite; no prior erase cycle",
        "readout": "Sense P/AP resistance with a small stimulus",
        "lesson": "A foundry embedded macro joins the magnetic junction to logic processing, the access transistor and reliability conditions. This figure retains the named study's materials and polarity convention for step-by-step reading; those details do not automatically describe every current 22FDX memory version.",
        "eraseCycle": {
          "kind": "magnetic",
          "title": "Erase Semantics: Direct Magnetic Overwrite, No Separate ERS",
          "sequence": "P ⇄ AP",
          "definition": "MRAM overwrites existing data by changing magnetic state, without a Flash-style erase-before-program step. Clearing to all zeros or ones is a series of target-state writes; the P/AP-to-data mapping is product-specific.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-gf-platform",
            "ip-gf-cell-2024"
          ],
          "before": "P",
          "mechanism": "P/AP magnetization and resistance in 1T1MTJ — Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.",
          "after": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step."
        },
        "structure": {
          "title": "GF 22FDX eMRAM: Published Research Cell",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-structure-0-en-title ip-study-gf-emram-structure-0-en-desc\"><title id=\"ip-study-gf-emram-structure-0-en-title\">GF 22FDX eMRAM: Published Research Cell</title><desc id=\"ip-study-gf-emram-structure-0-en-desc\">The 2024 research uses CoFeB free/reference layers, a tunnel barrier, SAF pinning, and an access transistor. Their vertical placement here defines a drawing coordinate.</desc><style>#ip-study-gf-emram-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-structure-0-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><text x=\"28\" y=\"338\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "The 2024 research uses CoFeB free/reference layers, a tunnel barrier, SAF pinning, and an access transistor. Their vertical placement here defines a drawing coordinate.",
          "legend": [
            {
              "symbol": "FL / RL",
              "meaning": "Free/reference layers; arrows are moments, not particle flow"
            },
            {
              "symbol": "Ic / e−",
              "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
            },
            {
              "symbol": "A / B; BL* / SL*",
              "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
            },
            {
              "symbol": "WL; P / AP",
              "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
            },
            {
              "symbol": "τSTT",
              "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
            }
          ],
          "sourceIds": [
            "ip-gf-platform",
            "ip-gf-cell-2024"
          ]
        },
        "operations": [
          {
            "topicId": "ip-gf-emram",
            "operationId": "write",
            "title": "GF 22FDX eMRAM: Published Research Cell — Write",
            "summary": "Write free-layer magnetization through spin-transfer torque.",
            "sources": [
              {
                "id": "ip-gf-platform",
                "label": "GF: 22FDX Embedded MRAM Platform",
                "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                "kind": "Original foundry announcement",
                "date": "2020-02-27",
                "accessedAt": "2026-09-10",
                "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
              },
              {
                "id": "ip-gf-cell-2024",
                "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                "kind": "Original research paper",
                "date": "2024-09-18",
                "accessedAt": "2026-09-10",
                "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "22FDX: CoFeB/Barrier/CoFeB and SAF",
                "mechanism": "P/AP magnetization and resistance in 1T1MTJ",
                "summary": "Write free-layer magnetization through spin-transfer torque.",
                "frames": [
                  {
                    "id": "ip-study-gf-emram-write-1-en",
                    "title": "Initial AP State",
                    "state": "AP",
                    "stimulus": "WL off; drive zero",
                    "caption": "WL is off and the cell retains AP; this sequence writes P.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-write-1-en-title ip-study-gf-emram-write-1-en-desc\"><title id=\"ip-study-gf-emram-write-1-en-title\">Initial AP State</title><desc id=\"ip-study-gf-emram-write-1-en-desc\">WL is off and the cell retains AP; this sequence writes P.</desc><style>#ip-study-gf-emram-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-write-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-write-2-en",
                    "title": "Select and Apply Spin Drive",
                    "state": "Switching",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "WL turns on; conventional current RL-to-FL applies STT, with opposite electron flow.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-write-2-en-title ip-study-gf-emram-write-2-en-desc\"><title id=\"ip-study-gf-emram-write-2-en-title\">Select and Apply Spin Drive</title><desc id=\"ip-study-gf-emram-write-2-en-desc\">WL turns on; conventional current RL-to-FL applies STT, with opposite electron flow.</desc><style>#ip-study-gf-emram-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-write-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">I+</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M251.84430330899727 104.78828200655936L278.15569669100273 95.21171799344064\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272.2095346960003 101.96768998340542L278.15569669100273 95.21171799344064L269.2580172503072 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/><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" 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fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M304 88C321 89 322 108 308 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313 111L306 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313.89824305701336 106.68517015256216L306 111L313.89824305701336 115.31482984743782\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"360\" y=\"75\" text-anchor=\"start\" fill=\"#7f5899\" font-size=\"22\">τSTT</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-write-3-en",
                    "title": "Free Layer Switches to P",
                    "state": "P",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "Magnetization reaches P; the intermediate angle is not a measured trajectory or deterministic switching time.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-write-3-en-title ip-study-gf-emram-write-3-en-desc\"><title id=\"ip-study-gf-emram-write-3-en-title\">Free Layer Switches to P</title><desc id=\"ip-study-gf-emram-write-3-en-desc\">Magnetization reaches P; the intermediate angle is not a measured trajectory or deterministic switching time.</desc><style>#ip-study-gf-emram-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-write-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">I+</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-write-4-en",
                    "title": "Remove Drive and Retain P",
                    "state": "P",
                    "stimulus": "WL off; drive zero",
                    "caption": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-write-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-write-4-en-title ip-study-gf-emram-write-4-en-desc\"><title id=\"ip-study-gf-emram-write-4-en-title\">Remove Drive and Retain P</title><desc id=\"ip-study-gf-emram-write-4-en-desc\">Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.</desc><style>#ip-study-gf-emram-write-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-write-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-gf-platform",
                    "label": "GF: 22FDX Embedded MRAM Platform",
                    "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                    "kind": "Original foundry announcement",
                    "date": "2020-02-27",
                    "accessedAt": "2026-09-10",
                    "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                    "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
                  },
                  {
                    "id": "ip-gf-cell-2024",
                    "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                    "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                    "kind": "Original research paper",
                    "date": "2024-09-18",
                    "accessedAt": "2026-09-10",
                    "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                    "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
                  }
                ],
                "caveat": "Polarity follows this paper: positive Ic flows RL-to-FL and writes P; reverse writes AP. This sign convention and recipe are not universal to MRAM. Obtain BL/SL layer mapping and values from the PDK; undisclosed barrier material and exact thicknesses are omitted."
              }
            ]
          },
          {
            "topicId": "ip-gf-emram",
            "operationId": "erase",
            "title": "GF 22FDX eMRAM: Published Research Cell — Reverse Overwrite",
            "summary": "Use the opposite MTJ drive to overwrite magnetization.",
            "sources": [
              {
                "id": "ip-gf-platform",
                "label": "GF: 22FDX Embedded MRAM Platform",
                "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                "kind": "Original foundry announcement",
                "date": "2020-02-27",
                "accessedAt": "2026-09-10",
                "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
              },
              {
                "id": "ip-gf-cell-2024",
                "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                "kind": "Original research paper",
                "date": "2024-09-18",
                "accessedAt": "2026-09-10",
                "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "22FDX: CoFeB/Barrier/CoFeB and SAF",
                "mechanism": "P/AP magnetization and resistance in 1T1MTJ",
                "summary": "Use the opposite MTJ drive to overwrite magnetization.",
                "frames": [
                  {
                    "id": "ip-study-gf-emram-erase-1-en",
                    "title": "Initial P State",
                    "state": "P",
                    "stimulus": "WL off; drive zero",
                    "caption": "WL is off and the cell retains P; this sequence overwrites AP.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-erase-1-en-title ip-study-gf-emram-erase-1-en-desc\"><title id=\"ip-study-gf-emram-erase-1-en-title\">Initial P State</title><desc id=\"ip-study-gf-emram-erase-1-en-desc\">WL is off and the cell retains P; this sequence overwrites AP.</desc><style>#ip-study-gf-emram-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-erase-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-erase-2-en",
                    "title": "Select and Apply Reverse Spin Drive",
                    "state": "Switching",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "WL turns on; conventional current FL-to-RL applies STT, with opposite electron flow.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-erase-2-en-title ip-study-gf-emram-erase-2-en-desc\"><title id=\"ip-study-gf-emram-erase-2-en-title\">Select and Apply Reverse Spin Drive</title><desc id=\"ip-study-gf-emram-erase-2-en-desc\">WL turns on; conventional current FL-to-RL applies STT, with opposite electron flow.</desc><style>#ip-study-gf-emram-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-erase-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">I−</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M251.84430330899727 104.78828200655936L278.15569669100273 95.21171799344064\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M272.2095346960003 101.96768998340542L278.15569669100273 95.21171799344064L269.2580172503072 93.8584624482372\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M304 88C321 89 322 108 308 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313 111L306 111\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M313.89824305701336 106.68517015256216L306 111L313.89824305701336 115.31482984743782\" stroke=\"#7f5899\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"360\" y=\"75\" text-anchor=\"start\" fill=\"#7f5899\" font-size=\"22\">τSTT</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-erase-3-en",
                    "title": "Free Layer Switches to AP",
                    "state": "AP",
                    "stimulus": "WL on; bidirectional MTJ drive",
                    "caption": "Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-erase-3-en-title ip-study-gf-emram-erase-3-en-desc\"><title id=\"ip-study-gf-emram-erase-3-en-title\">Free Layer Switches to AP</title><desc id=\"ip-study-gf-emram-erase-3-en-desc\">Magnetization reaches AP; the intermediate angle is not a measured trajectory or deterministic switching time.</desc><style>#ip-study-gf-emram-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-erase-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">I−</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" 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stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-erase-4-en",
                    "title": "Remove Drive and Retain AP",
                    "state": "AP",
                    "stimulus": "WL off; drive zero",
                    "caption": "Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-erase-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-erase-4-en-title ip-study-gf-emram-erase-4-en-desc\"><title id=\"ip-study-gf-emram-erase-4-en-title\">Remove Drive and Retain AP</title><desc id=\"ip-study-gf-emram-erase-4-en-desc\">Turn WL off and remove bias to retain the moment; the other drive overwrites the opposite data without a floating-gate erase step.</desc><style>#ip-study-gf-emram-erase-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-erase-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 86L265 114\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M260.6851701525622 106.10175694298664L265 114L269.3148298474378 106.10175694298664\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-gf-platform",
                    "label": "GF: 22FDX Embedded MRAM Platform",
                    "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                    "kind": "Original foundry announcement",
                    "date": "2020-02-27",
                    "accessedAt": "2026-09-10",
                    "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                    "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
                  },
                  {
                    "id": "ip-gf-cell-2024",
                    "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                    "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                    "kind": "Original research paper",
                    "date": "2024-09-18",
                    "accessedAt": "2026-09-10",
                    "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                    "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
                  }
                ],
                "caveat": "Polarity follows this paper: positive Ic flows RL-to-FL and writes P; reverse writes AP. This sign convention and recipe are not universal to MRAM. Obtain BL/SL layer mapping and values from the PDK; undisclosed barrier material and exact thicknesses are omitted."
              }
            ]
          },
          {
            "topicId": "ip-gf-emram",
            "operationId": "read",
            "title": "GF 22FDX eMRAM: Published Research Cell — Read",
            "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
            "sources": [
              {
                "id": "ip-gf-platform",
                "label": "GF: 22FDX Embedded MRAM Platform",
                "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                "kind": "Original foundry announcement",
                "date": "2020-02-27",
                "accessedAt": "2026-09-10",
                "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
              },
              {
                "id": "ip-gf-cell-2024",
                "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                "kind": "Original research paper",
                "date": "2024-09-18",
                "accessedAt": "2026-09-10",
                "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "22FDX: CoFeB/Barrier/CoFeB and SAF",
                "mechanism": "P/AP magnetization and resistance in 1T1MTJ",
                "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-study-gf-emram-read-1-en",
                    "title": "Before Selection: P Is Retained",
                    "state": "P remains unchanged",
                    "stimulus": "WL off; read stimulus zero",
                    "caption": "The same cell starts in retained P with WL off; reading does not first reverse its moment.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-read-1-en-title ip-study-gf-emram-read-1-en-desc\"><title id=\"ip-study-gf-emram-read-1-en-title\">Before Selection: P Is Retained</title><desc id=\"ip-study-gf-emram-read-1-en-desc\">The same cell starts in retained P with WL off; reading does not first reverse its moment.</desc><style>#ip-study-gf-emram-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-read-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-read-2-en",
                    "title": "Low Bias Produces Sense Current",
                    "state": "P remains unchanged",
                    "stimulus": "WL on; small read stimulus",
                    "caption": "WL enables a low-bias current through the MTJ/access device; P has greater current than AP at equal bias.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-read-2-en-title ip-study-gf-emram-read-2-en-desc\"><title id=\"ip-study-gf-emram-read-2-en-title\">Low Bias Produces Sense Current</title><desc id=\"ip-study-gf-emram-read-2-en-desc\">WL enables a low-bias current through the MTJ/access device; P has greater current than AP at equal bias.</desc><style>#ip-study-gf-emram-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-read-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Vr</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M405 92L405 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">Ir</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><rect x=\"356\" y=\"235\" width=\"176\" height=\"47\" fill=\"#eaf3fa\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"7\"/><text x=\"444\" y=\"266\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">IP &gt; IAP</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  },
                  {
                    "id": "ip-study-gf-emram-read-3-en",
                    "title": "Latch and Remove Read Stimulus",
                    "state": "P remains unchanged",
                    "stimulus": "WL off; read stimulus zero",
                    "caption": "After the sensor latches, WL turns off; free/reference layers remain P without a read-restore cycle.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-gf-emram-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-gf-emram-read-3-en-title ip-study-gf-emram-read-3-en-desc\"><title id=\"ip-study-gf-emram-read-3-en-title\">Latch and Remove Read Stimulus</title><desc id=\"ip-study-gf-emram-read-3-en-desc\">After the sensor latches, WL turns off; free/reference layers remain P without a read-restore cycle.</desc><style>#ip-study-gf-emram-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-gf-emram-read-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 46L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"286\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">A / BL*</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"42\" fill=\"#d9efee\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"121\" width=\"170\" height=\"27\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"148\" width=\"170\" height=\"42\" fill=\"#e2e8f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"108\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB FL</text><text x=\"20\" y=\"141\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Barrier</text><text x=\"20\" y=\"177\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">CoFeB RL</text><path d=\"M265 114L265 86\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 93.89824305701336L265 86L260.6851701525622 93.89824305701336\" stroke=\"#178084\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 183L265 155\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M269.3148298474378 162.89824305701336L265 155L260.6851701525622 162.89824305701336\" stroke=\"#4b6396\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"180\" y=\"190\" width=\"170\" height=\"26\" fill=\"#edf0f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"211\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SAF</text><path d=\"M240 212L240 194\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M244.31482984743784 201.89824305701336L240 194L235.68517015256216 201.89824305701336\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M290 194L290 212\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M285.6851701525622 204.10175694298664L290 212L294.3148298474378 204.10175694298664\" stroke=\"#4b6396\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 216L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">B / SL*</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><rect x=\"370\" y=\"116\" width=\"150\" height=\"64\" fill=\"#edf6f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"9\"/><text x=\"445\" y=\"155\" text-anchor=\"middle\" fill=\"#178084\" font-size=\"22\">SA: P</text></svg>",
                    "sourceIds": [
                      "ip-gf-platform",
                      "ip-gf-cell-2024"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "FL / RL",
                    "meaning": "Free/reference layers; arrows are moments, not particle flow"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Orange solid line: conventional current; blue dashed electrons flow oppositely"
                  },
                  {
                    "symbol": "A / B; BL* / SL*",
                    "meaning": "A/B define drawing terminals; asterisks mean the actual layer-to-array-line mapping is not asserted"
                  },
                  {
                    "symbol": "WL; P / AP",
                    "meaning": "Word-line selection; parallel low resistance / antiparallel high resistance"
                  },
                  {
                    "symbol": "τSTT",
                    "meaning": "Spin-transfer torque; the intermediate arrow only illustrates reversal"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-gf-platform",
                    "label": "GF: 22FDX Embedded MRAM Platform",
                    "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
                    "kind": "Original foundry announcement",
                    "date": "2020-02-27",
                    "accessedAt": "2026-09-10",
                    "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
                    "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
                  },
                  {
                    "id": "ip-gf-cell-2024",
                    "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
                    "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
                    "kind": "Original research paper",
                    "date": "2024-09-18",
                    "accessedAt": "2026-09-10",
                    "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
                    "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
                  }
                ],
                "caveat": "Polarity follows this paper: positive Ic flows RL-to-FL and writes P; reverse writes AP. This sign convention and recipe are not universal to MRAM. Obtain BL/SL layer mapping and values from the PDK; undisclosed barrier material and exact thicknesses are omitted."
              }
            ]
          }
        ]
      },
      {
        "id": "weebit-reram",
        "title": "Weebit Nano: Silicon-Oxide ReRAM IP Cell",
        "shortTitle": "Weebit · Silicon-Oxide ReRAM",
        "vendor": "Weebit Nano",
        "group": "reram",
        "hostTopic": "vcm",
        "summary": "Follow oxygen exchange, a defect-related conduction path and access-transistor current compliance in a public silicon-oxide research structure to understand embedded ReRAM SET, RESET and read.",
        "program": "SET establishes a low-resistance defect path",
        "reverse": "RESET changes oxygen and defect distributions",
        "readout": "Sense resistance with a small stimulus",
        "lesson": "In this named research example, the storage medium, oxygen-exchange electrode and access transistor jointly shape switching. Current compliance and read stimulus are part of cell operation. Materials and recipes remain scoped to the cited implementation.",
        "eraseCycle": {
          "kind": "resistance",
          "title": "Erase Semantics: RESET Followed by Another SET",
          "sequence": "SET → RESET → SET",
          "definition": "RESET is the reverse data-state update from low to high resistance; a later SET restores low resistance. This is reversible resistance switching rather than Flash-style block erase. The circuit defines logical zero/one encoding.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-weebit-product",
            "ip-weebit-bitcell",
            "ip-weebit-cell-2021"
          ],
          "before": "LRS",
          "mechanism": "Oxygen-ion exchange and an oxygen-vacancy conduction path — Oxygen recombines with vacancies and opens a critical BE-side gap; RESET does not restore the entire layer to its as-fabricated material.",
          "after": "HRS remains after bias removal; vacancies and interfacial oxygen may remain."
        },
        "structure": {
          "title": "Weebit ReRAM IP: CEA Research Cell",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-structure-0-en-title ip-study-weebit-reram-structure-0-en-desc\"><title id=\"ip-study-weebit-reram-structure-0-en-title\">Weebit ReRAM IP: CEA Research Cell</title><desc id=\"ip-study-weebit-reram-structure-0-en-desc\">Uses the coauthored CEA 130nm 1T1R: Ti top electrode, SiOx switching layer, and TiN bottom electrode. The access transistor selects and limits current.</desc><style>#ip-study-weebit-reram-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-structure-0-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"28\" y=\"338\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Uses the coauthored CEA 130nm 1T1R: Ti top electrode, SiOx switching layer, and TiN bottom electrode. The access transistor selects and limits current.",
          "legend": [
            {
              "symbol": "Ti / SiOx / TiN",
              "meaning": "Top electrode/switching oxide/bottom electrode, limited to the public CEA example"
            },
            {
              "symbol": "O²− / VO",
              "meaning": "Filled blue circles are oxygen ions; open orange circles are vacancies, with no silver metal"
            },
            {
              "symbol": "TE / BE; WL",
              "meaning": "Top/bottom electrodes and select gate; TE bias is referenced to BE"
            },
            {
              "symbol": "Ic / e−",
              "meaning": "Conventional current and electrons flow oppositely; neither denotes oxygen motion"
            }
          ],
          "sourceIds": [
            "ip-weebit-product",
            "ip-weebit-bitcell",
            "ip-weebit-cell-2021"
          ]
        },
        "operations": [
          {
            "topicId": "ip-weebit-reram",
            "operationId": "write",
            "title": "Weebit ReRAM IP: CEA Research Cell — SET Write",
            "summary": "Positive TE bias restores the conduction path and produces low resistance.",
            "sources": [
              {
                "id": "ip-weebit-product",
                "label": "Weebit: Embedded ReRAM IP",
                "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                "kind": "Manufacturer IP product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "IP module, design deliverables, control, and analog periphery",
                "limit": "Product identity does not imply every foundry node uses the same published research recipe."
              },
              {
                "id": "ip-weebit-bitcell",
                "label": "Weebit: ReRAM Bitcell",
                "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
              },
              {
                "id": "ip-weebit-cell-2021",
                "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                "kind": "Author-posted original research paper",
                "date": "2021-05",
                "accessedAt": "2026-09-10",
                "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ti/SiOx/TiN: 1T1R with an Oxygen-Exchange Interface",
                "mechanism": "Oxygen-ion exchange and an oxygen-vacancy conduction path",
                "summary": "Positive TE bias restores the conduction path and produces low resistance.",
                "frames": [
                  {
                    "id": "ip-study-weebit-reram-write-1-en",
                    "title": "Initial High-R Gap",
                    "state": "HRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "Start in a formed HRS with a local BE-side gap; forming is not repeated on every cycle.",
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                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-write-2-en",
                    "title": "Oxygen Moves toward the Ti Interface",
                    "state": "Switching",
                    "stimulus": "WL on; positive TE bias",
                    "caption": "Positive TE drives O²− toward Ti for interfacial exchange; the access transistor limits current.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-write-2-en-title ip-study-weebit-reram-write-2-en-desc\"><title id=\"ip-study-weebit-reram-write-2-en-title\">Oxygen Moves toward the Ti Interface</title><desc id=\"ip-study-weebit-reram-write-2-en-desc\">Positive TE drives O²− toward Ti for interfacial exchange; the access transistor limits current.</desc><style>#ip-study-weebit-reram-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-write-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">＋VSET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" 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                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-write-3-en",
                    "title": "Vacancy Path Reconnects",
                    "state": "LRS",
                    "stimulus": "WL on; positive TE bias",
                    "caption": "The oxygen-deficient conduction path reconnects; current rises under compliance.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-write-3-en-title ip-study-weebit-reram-write-3-en-desc\"><title id=\"ip-study-weebit-reram-write-3-en-title\">Vacancy Path Reconnects</title><desc id=\"ip-study-weebit-reram-write-3-en-desc\">The oxygen-deficient conduction path reconnects; current rises under compliance.</desc><style>#ip-study-weebit-reram-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-write-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text 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stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"283\" cy=\"111\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M280 111L286 111\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"307\" cy=\"111\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M304 111L310 111\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-write-4-en",
                    "title": "Remove Bias and Retain Low R",
                    "state": "LRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "After removing bias and WL selection, the path retains LRS.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-write-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-write-4-en-title ip-study-weebit-reram-write-4-en-desc\"><title id=\"ip-study-weebit-reram-write-4-en-title\">Remove Bias and Retain Low R</title><desc id=\"ip-study-weebit-reram-write-4-en-desc\">After removing bias and WL selection, the path retains LRS.</desc><style>#ip-study-weebit-reram-write-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-write-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"283\" cy=\"111\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M280 111L286 111\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"307\" cy=\"111\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M304 111L310 111\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ti / SiOx / TiN",
                    "meaning": "Top electrode/switching oxide/bottom electrode, limited to the public CEA example"
                  },
                  {
                    "symbol": "O²− / VO",
                    "meaning": "Filled blue circles are oxygen ions; open orange circles are vacancies, with no silver metal"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; TE bias is referenced to BE"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current and electrons flow oppositely; neither denotes oxygen motion"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-weebit-product",
                    "label": "Weebit: Embedded ReRAM IP",
                    "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                    "kind": "Manufacturer IP product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "IP module, design deliverables, control, and analog periphery",
                    "limit": "Product identity does not imply every foundry node uses the same published research recipe."
                  },
                  {
                    "id": "ip-weebit-bitcell",
                    "label": "Weebit: ReRAM Bitcell",
                    "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                    "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
                  },
                  {
                    "id": "ip-weebit-cell-2021",
                    "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                    "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                    "kind": "Author-posted original research paper",
                    "date": "2021-05",
                    "accessedAt": "2026-09-10",
                    "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                    "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
                  }
                ],
                "caveat": "This is the public Weebit/CEA-Leti/Silvaco research model, not a product recipe for every foundry node. SET: positive TE, O²− toward Ti. RESET: negative TE, oxygen returns into SiOx and recombines near the BE-side path. Forming is an initial condition, not every write."
              }
            ]
          },
          {
            "topicId": "ip-weebit-reram",
            "operationId": "erase",
            "title": "Weebit ReRAM IP: CEA Research Cell — Reverse RESET",
            "summary": "Reverse TE bias interrupts the conduction path and produces high resistance.",
            "sources": [
              {
                "id": "ip-weebit-product",
                "label": "Weebit: Embedded ReRAM IP",
                "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                "kind": "Manufacturer IP product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "IP module, design deliverables, control, and analog periphery",
                "limit": "Product identity does not imply every foundry node uses the same published research recipe."
              },
              {
                "id": "ip-weebit-bitcell",
                "label": "Weebit: ReRAM Bitcell",
                "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
              },
              {
                "id": "ip-weebit-cell-2021",
                "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                "kind": "Author-posted original research paper",
                "date": "2021-05",
                "accessedAt": "2026-09-10",
                "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ti/SiOx/TiN: 1T1R with an Oxygen-Exchange Interface",
                "mechanism": "Oxygen-ion exchange and an oxygen-vacancy conduction path",
                "summary": "Reverse TE bias interrupts the conduction path and produces high resistance.",
                "frames": [
                  {
                    "id": "ip-study-weebit-reram-erase-1-en",
                    "title": "Initial Vacancy Path Conducts",
                    "state": "LRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "A vacancy path already exists; this operation changes LRS to HRS.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-erase-1-en-title ip-study-weebit-reram-erase-1-en-desc\"><title id=\"ip-study-weebit-reram-erase-1-en-title\">Initial Vacancy Path Conducts</title><desc id=\"ip-study-weebit-reram-erase-1-en-desc\">A vacancy path already exists; this operation changes LRS to HRS.</desc><style>#ip-study-weebit-reram-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-erase-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-erase-2-en",
                    "title": "Reverse Bias Returns Oxygen",
                    "state": "Switching",
                    "stimulus": "WL on; negative TE bias",
                    "caption": "TE is negative relative to BE; oxygen returns from the Ti interface into SiOx. Blue arrows denote oxygen motion.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-erase-2-en-title ip-study-weebit-reram-erase-2-en-desc\"><title id=\"ip-study-weebit-reram-erase-2-en-title\">Reverse Bias Returns Oxygen</title><desc id=\"ip-study-weebit-reram-erase-2-en-desc\">TE is negative relative to BE; oxygen returns from the Ti interface into SiOx. Blue arrows denote oxygen motion.</desc><style>#ip-study-weebit-reram-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-erase-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">−VRESET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"284\" cy=\"128\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M281 128L287 128\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M288 126L288 195\" stroke=\"#1b80a2\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M283.6851701525622 187.10175694298664L288 195L292.3148298474378 187.10175694298664\" stroke=\"#1b80a2\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-erase-3-en",
                    "title": "The BE-Side Path Breaks",
                    "state": "HRS",
                    "stimulus": "WL on; negative TE bias",
                    "caption": "Oxygen recombines with vacancies and opens a critical BE-side gap; RESET does not restore the entire layer to its as-fabricated material.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-erase-3-en-title ip-study-weebit-reram-erase-3-en-desc\"><title id=\"ip-study-weebit-reram-erase-3-en-title\">The BE-Side Path Breaks</title><desc id=\"ip-study-weebit-reram-erase-3-en-desc\">Oxygen recombines with vacancies and opens a critical BE-side gap; RESET does not restore the entire layer to its as-fabricated material.</desc><style>#ip-study-weebit-reram-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-erase-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">−VRESET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"265\" cy=\"194\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M262 194L268 194\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 183H280M250 205H280\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"366\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-erase-4-en",
                    "title": "Remove Bias and Retain High R",
                    "state": "HRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "HRS remains after bias removal; vacancies and interfacial oxygen may remain.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-erase-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-erase-4-en-title ip-study-weebit-reram-erase-4-en-desc\"><title id=\"ip-study-weebit-reram-erase-4-en-title\">Remove Bias and Retain High R</title><desc id=\"ip-study-weebit-reram-erase-4-en-desc\">HRS remains after bias removal; vacancies and interfacial oxygen may remain.</desc><style>#ip-study-weebit-reram-erase-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-erase-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"265\" cy=\"194\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M262 194L268 194\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 183H280M250 205H280\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"366\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ti / SiOx / TiN",
                    "meaning": "Top electrode/switching oxide/bottom electrode, limited to the public CEA example"
                  },
                  {
                    "symbol": "O²− / VO",
                    "meaning": "Filled blue circles are oxygen ions; open orange circles are vacancies, with no silver metal"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; TE bias is referenced to BE"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current and electrons flow oppositely; neither denotes oxygen motion"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-weebit-product",
                    "label": "Weebit: Embedded ReRAM IP",
                    "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                    "kind": "Manufacturer IP product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "IP module, design deliverables, control, and analog periphery",
                    "limit": "Product identity does not imply every foundry node uses the same published research recipe."
                  },
                  {
                    "id": "ip-weebit-bitcell",
                    "label": "Weebit: ReRAM Bitcell",
                    "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                    "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
                  },
                  {
                    "id": "ip-weebit-cell-2021",
                    "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                    "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                    "kind": "Author-posted original research paper",
                    "date": "2021-05",
                    "accessedAt": "2026-09-10",
                    "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                    "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
                  }
                ],
                "caveat": "This is the public Weebit/CEA-Leti/Silvaco research model, not a product recipe for every foundry node. SET: positive TE, O²− toward Ti. RESET: negative TE, oxygen returns into SiOx and recombines near the BE-side path. Forming is an initial condition, not every write."
              }
            ]
          },
          {
            "topicId": "ip-weebit-reram",
            "operationId": "read",
            "title": "Weebit ReRAM IP: CEA Research Cell — Read",
            "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
            "sources": [
              {
                "id": "ip-weebit-product",
                "label": "Weebit: Embedded ReRAM IP",
                "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                "kind": "Manufacturer IP product page",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "IP module, design deliverables, control, and analog periphery",
                "limit": "Product identity does not imply every foundry node uses the same published research recipe."
              },
              {
                "id": "ip-weebit-bitcell",
                "label": "Weebit: ReRAM Bitcell",
                "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                "kind": "Manufacturer mechanism explanation",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
              },
              {
                "id": "ip-weebit-cell-2021",
                "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                "kind": "Author-posted original research paper",
                "date": "2021-05",
                "accessedAt": "2026-09-10",
                "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ti/SiOx/TiN: 1T1R with an Oxygen-Exchange Interface",
                "mechanism": "Oxygen-ion exchange and an oxygen-vacancy conduction path",
                "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-study-weebit-reram-read-1-en",
                    "title": "Before Selection: Low-R Structure Is Retained",
                    "state": "LRS structure retained",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "The same cell starts in retained LRS with selection off. HRS can follow the same read sequence.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-read-1-en-title ip-study-weebit-reram-read-1-en-desc\"><title id=\"ip-study-weebit-reram-read-1-en-title\">Before Selection: Low-R Structure Is Retained</title><desc id=\"ip-study-weebit-reram-read-1-en-desc\">The same cell starts in retained LRS with selection off. HRS can follow the same read sequence.</desc><style>#ip-study-weebit-reram-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-read-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-read-2-en",
                    "title": "Sense the Path at Small Bias",
                    "state": "LRS structure retained",
                    "stimulus": "WL on; small positive TE bias",
                    "caption": "A small bias senses the vacancy path; ILRS > IHRS at equal bias, without using the read pulse to rearrange oxygen.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-read-2-en-title ip-study-weebit-reram-read-2-en-desc\"><title id=\"ip-study-weebit-reram-read-2-en-title\">Sense the Path at Small Bias</title><desc id=\"ip-study-weebit-reram-read-2-en-desc\">A small bias senses the vacancy path; ILRS &gt; IHRS at equal bias, without using the read pulse to rearrange oxygen.</desc><style>#ip-study-weebit-reram-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-read-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">＋Vr</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M405 92L405 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">Ir</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><rect x=\"362\" y=\"235\" width=\"170\" height=\"47\" fill=\"#eaf3fa\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"7\"/><text x=\"447\" y=\"266\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">IL &gt; IH</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  },
                  {
                    "id": "ip-study-weebit-reram-read-3-en",
                    "title": "Latch and Isolate the Cell",
                    "state": "LRS structure retained",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "After latching, remove bias and retain the original path; actual read-disturb limits remain supplier-specific.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-weebit-reram-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-weebit-reram-read-3-en-title ip-study-weebit-reram-read-3-en-desc\"><title id=\"ip-study-weebit-reram-read-3-en-title\">Latch and Isolate the Cell</title><desc id=\"ip-study-weebit-reram-read-3-en-desc\">After latching, remove bias and retain the original path; actual read-disturb limits remain supplier-specific.</desc><style>#ip-study-weebit-reram-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-weebit-reram-read-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ti</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">SiOx</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TiN</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><circle cx=\"265\" cy=\"122\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"141\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"160\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"179\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"265\" cy=\"199\" r=\"7\" fill=\"#ffffff\" stroke=\"#b66b21\" stroke-width=\"2.6\"/><circle cx=\"206\" cy=\"129\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M203 129L209 129\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"227\" cy=\"174\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M224 174L230 174\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"317\" cy=\"151\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M314 151L320 151\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"302\" cy=\"195\" r=\"6\" fill=\"#1b80a2\" /><path d=\"M299 195L305 195\" stroke=\"#ffffff\" stroke-width=\"1.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><rect x=\"370\" y=\"116\" width=\"150\" height=\"64\" fill=\"#edf6f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"9\"/><text x=\"445\" y=\"155\" text-anchor=\"middle\" fill=\"#178084\" font-size=\"22\">SA: LRS</text></svg>",
                    "sourceIds": [
                      "ip-weebit-product",
                      "ip-weebit-bitcell",
                      "ip-weebit-cell-2021"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ti / SiOx / TiN",
                    "meaning": "Top electrode/switching oxide/bottom electrode, limited to the public CEA example"
                  },
                  {
                    "symbol": "O²− / VO",
                    "meaning": "Filled blue circles are oxygen ions; open orange circles are vacancies, with no silver metal"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; TE bias is referenced to BE"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current and electrons flow oppositely; neither denotes oxygen motion"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-weebit-product",
                    "label": "Weebit: Embedded ReRAM IP",
                    "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
                    "kind": "Manufacturer IP product page",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "IP module, design deliverables, control, and analog periphery",
                    "limit": "Product identity does not imply every foundry node uses the same published research recipe."
                  },
                  {
                    "id": "ip-weebit-bitcell",
                    "label": "Weebit: ReRAM Bitcell",
                    "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
                    "kind": "Manufacturer mechanism explanation",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
                    "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
                  },
                  {
                    "id": "ip-weebit-cell-2021",
                    "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
                    "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
                    "kind": "Author-posted original research paper",
                    "date": "2021-05",
                    "accessedAt": "2026-09-10",
                    "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
                    "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
                  }
                ],
                "caveat": "This is the public Weebit/CEA-Leti/Silvaco research model, not a product recipe for every foundry node. SET: positive TE, O²− toward Ti. RESET: negative TE, oxygen returns into SiOx and recombines near the BE-side path. Forming is an initial condition, not every write."
              }
            ]
          }
        ]
      },
      {
        "id": "crossbar-reram",
        "title": "Crossbar: Metallic-Path Embedded ReRAM Cell",
        "shortTitle": "Crossbar · Metallic-Path ReRAM",
        "vendor": "Crossbar",
        "group": "reram",
        "hostTopic": "ecm",
        "summary": "Read Crossbar's public patent and historical embedded-macro materials through metallic-path extension, retraction and low-stimulus sensing.",
        "program": "SET extends the metallic path",
        "reverse": "RESET retracts or disconnects the path",
        "readout": "Conduction paths and interparticle transport",
        "lesson": "This figure follows the named patent's metal/amorphous-silicon model. Do not substitute another ECM cell's nucleation direction or an ideal continuous silver bridge. Evidence for the embedded macro and for the historical cell embodiment is identified separately.",
        "eraseCycle": {
          "kind": "resistance",
          "title": "Erase Semantics: RESET Followed by Another SET",
          "sequence": "SET → RESET → SET",
          "definition": "RESET is the reverse data-state update from low to high resistance; a later SET restores low resistance. This is reversible resistance switching rather than Flash-style block erase. The circuit defines logical zero/one encoding.",
          "verification": "After the prescribed pulse or internal update cycle completes, use the specified read/verify criteria to confirm the target state before accepting new data. Do not invent a universal verification threshold, pulse count or completion time.",
          "granularity": "Selection and update granularity follow the named array and interface. Cell-level reversibility does not establish byte, word, page or block command granularity.",
          "limits": "This sequence explains state reuse, not unlimited endurance. Qualify cycling, retention, disturb and interrupted-update behavior for the target product; do not merge maxima or bias recipes from different implementations.",
          "sourceIds": [
            "ip-crossbar-macro",
            "ip-crossbar-2015",
            "ip-crossbar-cell-2012"
          ],
          "before": "LRS",
          "mechanism": "Extension/retraction from an upper metal region changes interparticle tunneling — The effective lower-side spacing increases and tunneling current falls; the upper residual metal region remains.",
          "after": "HRS remains after bias removal. This is reverse RESET, without a preceding block-erase cycle."
        },
        "structure": {
          "title": "Crossbar ReRAM IP: Historical Patent Cell",
          "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-structure-0-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-structure-0-en-title ip-study-crossbar-reram-structure-0-en-desc\"><title id=\"ip-study-crossbar-reram-structure-0-en-title\">Crossbar ReRAM IP: Historical Patent Cell</title><desc id=\"ip-study-crossbar-reram-structure-0-en-desc\">Selects the Ag/amorphous-Si/p+ poly-Si embodiment of US20120007035A1; an access transistor represents the separately published embedded 1T1R integration.</desc><style>#ip-study-crossbar-reram-structure-0-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-structure-0-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><text x=\"28\" y=\"338\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Original Structure Model; Not to Scale</text></svg>",
          "caption": "Selects the Ag/amorphous-Si/p+ poly-Si embodiment of US20120007035A1; an access transistor represents the separately published embedded 1T1R integration.",
          "legend": [
            {
              "symbol": "Ag / a-Si / p+ poly-Si",
              "meaning": "Silver top electrode/amorphous silicon/selected lower buffer-contact embodiment"
            },
            {
              "symbol": "Ag",
              "meaning": "Purple region and dots denote metal region/particles without asserting each charge state"
            },
            {
              "symbol": "TE / BE; WL",
              "meaning": "Top/bottom electrodes and select gate; 1T1R integration has a separate manufacturer source"
            },
            {
              "symbol": "Ic / e−",
              "meaning": "Conventional current opposes electron motion; electrons may tunnel between neighboring particles"
            }
          ],
          "sourceIds": [
            "ip-crossbar-macro",
            "ip-crossbar-2015",
            "ip-crossbar-cell-2012"
          ]
        },
        "operations": [
          {
            "topicId": "ip-crossbar-reram",
            "operationId": "write",
            "title": "Crossbar ReRAM IP: Historical Patent Cell — SET Write",
            "summary": "Positive TE bias restores the conduction path and produces low resistance.",
            "sources": [
              {
                "id": "ip-crossbar-macro",
                "label": "Crossbar: High-Performance ReRAM IP Brief",
                "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                "kind": "Manufacturer public product brief",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
              },
              {
                "id": "ip-crossbar-2015",
                "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2015",
                "accessedAt": "2026-09-10",
                "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
              },
              {
                "id": "ip-crossbar-cell-2012",
                "label": "Crossbar: Published Patent Application US20120007035A1",
                "url": "https://patents.google.com/patent/US20120007035A1/en",
                "kind": "Original published patent application",
                "date": "2012-01-12",
                "accessedAt": "2026-09-10",
                "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ag/a-Si/p+ poly-Si: 1T1R Particle-Path Model",
                "mechanism": "Extension/retraction from an upper metal region changes interparticle tunneling",
                "summary": "Positive TE bias restores the conduction path and produces low resistance.",
                "frames": [
                  {
                    "id": "ip-study-crossbar-reram-write-1-en",
                    "title": "High-R State after Forming",
                    "state": "HRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "Forming has established an upper metal region; the HRS particle path does not yet extend effectively toward the lower contact.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-write-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-write-1-en-title ip-study-crossbar-reram-write-1-en-desc\"><title id=\"ip-study-crossbar-reram-write-1-en-title\">High-R State after Forming</title><desc id=\"ip-study-crossbar-reram-write-1-en-desc\">Forming has established an upper metal region; the HRS particle path does not yet extend effectively toward the lower contact.</desc><style>#ip-study-crossbar-reram-write-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-write-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><path d=\"M247 189H283M247 206H283\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"365\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-write-2-en",
                    "title": "Positive Bias Extends the Particle Path",
                    "state": "Switching",
                    "stimulus": "WL on; positive TE bias",
                    "caption": "Positive TE bias extends the path from the upper metal region toward BE, following this patent rather than assuming generic upward cathodic nucleation.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-write-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-write-2-en-title ip-study-crossbar-reram-write-2-en-desc\"><title id=\"ip-study-crossbar-reram-write-2-en-title\">Positive Bias Extends the Particle Path</title><desc id=\"ip-study-crossbar-reram-write-2-en-desc\">Positive TE bias extends the path from the upper metal region toward BE, following this patent rather than assuming generic upward cathodic nucleation.</desc><style>#ip-study-crossbar-reram-write-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-write-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">＋VSET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><path d=\"M302 149L302 199\" stroke=\"#82639d\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M297.6851701525622 191.10175694298664L302 199L306.3148298474378 191.10175694298664\" stroke=\"#82639d\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"363\" y=\"174\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><path d=\"M247 189H283M247 206H283\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"365\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-write-3-en",
                    "title": "Interparticle Tunneling Path Strengthens",
                    "state": "LRS",
                    "stimulus": "WL on; positive TE bias",
                    "caption": "Closer neighboring metal particles strengthen tunneling conduction; the dots do not claim a fully solid silver bridge.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-write-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-write-3-en-title ip-study-crossbar-reram-write-3-en-desc\"><title id=\"ip-study-crossbar-reram-write-3-en-title\">Interparticle Tunneling Path Strengthens</title><desc id=\"ip-study-crossbar-reram-write-3-en-desc\">Closer neighboring metal particles strengthen tunneling conduction; the dots do not claim a fully solid silver bridge.</desc><style>#ip-study-crossbar-reram-write-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-write-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">＋VSET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><path d=\"M405 92L405 191\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-write-4-en",
                    "title": "Remove Bias and Retain Low R",
                    "state": "LRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "Turn selection off and remove bias to retain the low-R path.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-write-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-write-4-en-title ip-study-crossbar-reram-write-4-en-desc\"><title id=\"ip-study-crossbar-reram-write-4-en-title\">Remove Bias and Retain Low R</title><desc id=\"ip-study-crossbar-reram-write-4-en-desc\">Turn selection off and remove bias to retain the low-R path.</desc><style>#ip-study-crossbar-reram-write-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-write-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><path d=\"M25 333h60v-17h240v17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ag / a-Si / p+ poly-Si",
                    "meaning": "Silver top electrode/amorphous silicon/selected lower buffer-contact embodiment"
                  },
                  {
                    "symbol": "Ag",
                    "meaning": "Purple region and dots denote metal region/particles without asserting each charge state"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; 1T1R integration has a separate manufacturer source"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current opposes electron motion; electrons may tunnel between neighboring particles"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-crossbar-macro",
                    "label": "Crossbar: High-Performance ReRAM IP Brief",
                    "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                    "kind": "Manufacturer public product brief",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                    "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
                  },
                  {
                    "id": "ip-crossbar-2015",
                    "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                    "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2015",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                    "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
                  },
                  {
                    "id": "ip-crossbar-cell-2012",
                    "label": "Crossbar: Published Patent Application US20120007035A1",
                    "url": "https://patents.google.com/patent/US20120007035A1/en",
                    "kind": "Original published patent application",
                    "date": "2012-01-12",
                    "accessedAt": "2026-09-10",
                    "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                    "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
                  }
                ],
                "caveat": "This is a published patent embodiment associated with historical embedded IP, not proof of current macro recipes or newly licensable nodes in 2026. The patent describes metal particles and interparticle tunneling; the path is not equated to a solid silver bridge or generic cathode-nucleated ECM."
              }
            ]
          },
          {
            "topicId": "ip-crossbar-reram",
            "operationId": "erase",
            "title": "Crossbar ReRAM IP: Historical Patent Cell — Reverse RESET",
            "summary": "Reverse TE bias interrupts the conduction path and produces high resistance.",
            "sources": [
              {
                "id": "ip-crossbar-macro",
                "label": "Crossbar: High-Performance ReRAM IP Brief",
                "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                "kind": "Manufacturer public product brief",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
              },
              {
                "id": "ip-crossbar-2015",
                "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2015",
                "accessedAt": "2026-09-10",
                "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
              },
              {
                "id": "ip-crossbar-cell-2012",
                "label": "Crossbar: Published Patent Application US20120007035A1",
                "url": "https://patents.google.com/patent/US20120007035A1/en",
                "kind": "Original published patent application",
                "date": "2012-01-12",
                "accessedAt": "2026-09-10",
                "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ag/a-Si/p+ poly-Si: 1T1R Particle-Path Model",
                "mechanism": "Extension/retraction from an upper metal region changes interparticle tunneling",
                "summary": "Reverse TE bias interrupts the conduction path and produces high resistance.",
                "frames": [
                  {
                    "id": "ip-study-crossbar-reram-erase-1-en",
                    "title": "Initial Particle Path Is Low R",
                    "state": "LRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "Start with the existing low-R particle path; the upper metal region and narrow path are shown separately.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-erase-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-erase-1-en-title ip-study-crossbar-reram-erase-1-en-desc\"><title id=\"ip-study-crossbar-reram-erase-1-en-title\">Initial Particle Path Is Low R</title><desc id=\"ip-study-crossbar-reram-erase-1-en-desc\">Start with the existing low-R particle path; the upper metal region and narrow path are shown separately.</desc><style>#ip-study-crossbar-reram-erase-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-erase-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M50 310L50 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-erase-2-en",
                    "title": "Reverse Bias Retracts the Path",
                    "state": "Switching",
                    "stimulus": "WL on; negative TE bias",
                    "caption": "Negative TE bias retracts or disconnects the narrow particle path toward the upper metal region; each particle charge state is unspecified.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-erase-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-erase-2-en-title ip-study-crossbar-reram-erase-2-en-desc\"><title id=\"ip-study-crossbar-reram-erase-2-en-title\">Reverse Bias Retracts the Path</title><desc id=\"ip-study-crossbar-reram-erase-2-en-desc\">Negative TE bias retracts or disconnects the narrow particle path toward the upper metal region; each particle charge state is unspecified.</desc><style>#ip-study-crossbar-reram-erase-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-erase-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">−VRESET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><path d=\"M302 200L302 148\" stroke=\"#82639d\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M306.3148298474378 155.89824305701336L302 148L297.6851701525622 155.89824305701336\" stroke=\"#82639d\" stroke-width=\"3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"363\" y=\"174\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><path d=\"M247 189H283M247 206H283\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"365\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M140 310L140 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-erase-3-en",
                    "title": "A Larger Gap Forms in the Particle Path",
                    "state": "HRS",
                    "stimulus": "WL on; negative TE bias",
                    "caption": "The effective lower-side spacing increases and tunneling current falls; the upper residual metal region remains.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-erase-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-erase-3-en-title ip-study-crossbar-reram-erase-3-en-desc\"><title id=\"ip-study-crossbar-reram-erase-3-en-title\">A Larger Gap Forms in the Particle Path</title><desc id=\"ip-study-crossbar-reram-erase-3-en-desc\">The effective lower-side spacing increases and tunneling current falls; the upper residual metal region remains.</desc><style>#ip-study-crossbar-reram-erase-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-erase-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">−VRESET</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><path d=\"M247 189H283M247 206H283\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"365\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M405 191L405 92\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M409.3148298474378 99.89824305701336L405 92L400.6851701525622 99.89824305701336\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 92L470 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M465.6851701525622 183.10175694298664L470 191L474.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#bd6827\" font-size=\"22\">Ic</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M250 310L250 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-erase-4-en",
                    "title": "Remove Bias and Retain High R",
                    "state": "HRS",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "HRS remains after bias removal. This is reverse RESET, without a preceding block-erase cycle.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-erase-4-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-erase-4-en-title ip-study-crossbar-reram-erase-4-en-desc\"><title id=\"ip-study-crossbar-reram-erase-4-en-title\">Remove Bias and Retain High R</title><desc id=\"ip-study-crossbar-reram-erase-4-en-desc\">HRS remains after bias removal. This is reverse RESET, without a preceding block-erase cycle.</desc><style>#ip-study-crossbar-reram-erase-4-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-erase-4-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><path d=\"M247 189H283M247 206H283\" stroke=\"#bd6827\" stroke-width=\"2.3\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"365\" y=\"262\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Gap</text><path d=\"M25 316h60v17h240v-17h70\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M365 310L365 343\" stroke=\"#bd6827\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"416\" y=\"339\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">t →</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ag / a-Si / p+ poly-Si",
                    "meaning": "Silver top electrode/amorphous silicon/selected lower buffer-contact embodiment"
                  },
                  {
                    "symbol": "Ag",
                    "meaning": "Purple region and dots denote metal region/particles without asserting each charge state"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; 1T1R integration has a separate manufacturer source"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current opposes electron motion; electrons may tunnel between neighboring particles"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-crossbar-macro",
                    "label": "Crossbar: High-Performance ReRAM IP Brief",
                    "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                    "kind": "Manufacturer public product brief",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                    "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
                  },
                  {
                    "id": "ip-crossbar-2015",
                    "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                    "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2015",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                    "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
                  },
                  {
                    "id": "ip-crossbar-cell-2012",
                    "label": "Crossbar: Published Patent Application US20120007035A1",
                    "url": "https://patents.google.com/patent/US20120007035A1/en",
                    "kind": "Original published patent application",
                    "date": "2012-01-12",
                    "accessedAt": "2026-09-10",
                    "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                    "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
                  }
                ],
                "caveat": "This is a published patent embodiment associated with historical embedded IP, not proof of current macro recipes or newly licensable nodes in 2026. The patent describes metal particles and interparticle tunneling; the path is not equated to a solid silver bridge or generic cathode-nucleated ECM."
              }
            ]
          },
          {
            "topicId": "ip-crossbar-reram",
            "operationId": "read",
            "title": "Crossbar ReRAM IP: Historical Patent Cell — Read",
            "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
            "sources": [
              {
                "id": "ip-crossbar-macro",
                "label": "Crossbar: High-Performance ReRAM IP Brief",
                "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                "kind": "Manufacturer public product brief",
                "date": null,
                "accessedAt": "2026-09-10",
                "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
              },
              {
                "id": "ip-crossbar-2015",
                "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                "kind": "Manufacturer public conference presentation",
                "date": "2015",
                "accessedAt": "2026-09-10",
                "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
              },
              {
                "id": "ip-crossbar-cell-2012",
                "label": "Crossbar: Published Patent Application US20120007035A1",
                "url": "https://patents.google.com/patent/US20120007035A1/en",
                "kind": "Original published patent application",
                "date": "2012-01-12",
                "accessedAt": "2026-09-10",
                "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
              }
            ],
            "variants": [
              {
                "id": "published-model",
                "title": "Ag/a-Si/p+ poly-Si: 1T1R Particle-Path Model",
                "mechanism": "Extension/retraction from an upper metal region changes interparticle tunneling",
                "summary": "Select the same cell, sense its retained resistance with a small stimulus, then latch and isolate.",
                "frames": [
                  {
                    "id": "ip-study-crossbar-reram-read-1-en",
                    "title": "Before Selection: Low-R Structure Is Retained",
                    "state": "LRS structure retained",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "The same cell starts in retained LRS with selection off. HRS can follow the same read sequence.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-read-1-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-read-1-en-title ip-study-crossbar-reram-read-1-en-desc\"><title id=\"ip-study-crossbar-reram-read-1-en-title\">Before Selection: Low-R Structure Is Retained</title><desc id=\"ip-study-crossbar-reram-read-1-en-desc\">The same cell starts in retained LRS with selection off. HRS can follow the same read sequence.</desc><style>#ip-study-crossbar-reram-read-1-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-read-1-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-read-2-en",
                    "title": "Sense the Path at Small Bias",
                    "state": "LRS structure retained",
                    "stimulus": "WL on; small positive TE bias",
                    "caption": "A small bias senses the metal-particle path; ILRS > IHRS at equal bias and transport can involve interparticle tunneling.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-read-2-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-read-2-en-title ip-study-crossbar-reram-read-2-en-desc\"><title id=\"ip-study-crossbar-reram-read-2-en-title\">Sense the Path at Small Bias</title><desc id=\"ip-study-crossbar-reram-read-2-en-desc\">A small bias senses the metal-particle path; ILRS &gt; IHRS at equal bias and transport can involve interparticle tunneling.</desc><style>#ip-study-crossbar-reram-read-2-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-read-2-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">＋Vr</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#bd6827\" stroke-width=\"4\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#bd6827\" font-size=\"22\">ON</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><path d=\"M405 92L405 191\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M400.6851701525622 183.10175694298664L405 191L409.3148298474378 183.10175694298664\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M470 191L470 92\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 5\"/><path d=\"M474.3148298474378 99.89824305701336L470 92L465.6851701525622 99.89824305701336\" stroke=\"#236fab\" stroke-width=\"2.5\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"405\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">Ir</text><text x=\"470\" y=\"223\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">e−</text><rect x=\"362\" y=\"235\" width=\"170\" height=\"47\" fill=\"#eaf3fa\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"7\"/><text x=\"447\" y=\"266\" text-anchor=\"middle\" fill=\"#236fab\" font-size=\"22\">IL &gt; IH</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  },
                  {
                    "id": "ip-study-crossbar-reram-read-3-en",
                    "title": "Latch and Isolate the Cell",
                    "state": "LRS structure retained",
                    "stimulus": "WL off; TE bias zero",
                    "caption": "After latching, remove bias and retain the original path; actual read-disturb limits remain supplier-specific.",
                    "svg": "<svg xmlns=\"http://www.w3.org/2000/svg\" id=\"ip-study-crossbar-reram-read-3-en\" viewBox=\"0 0 560 360\" role=\"img\" aria-labelledby=\"ip-study-crossbar-reram-read-3-en-title ip-study-crossbar-reram-read-3-en-desc\"><title id=\"ip-study-crossbar-reram-read-3-en-title\">Latch and Isolate the Cell</title><desc id=\"ip-study-crossbar-reram-read-3-en-desc\">After latching, remove bias and retain the original path; actual read-disturb limits remain supplier-specific.</desc><style>#ip-study-crossbar-reram-read-3-en text{font-family:Arial,'Microsoft JhengHei',sans-serif;font-size:22px}#ip-study-crossbar-reram-read-3-en{background:#fff;color:#173449}</style><rect x=\"1\" y=\"1\" width=\"558\" height=\"358\" fill=\"#ffffff\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"14\"/><path d=\"M265 47L265 79\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"20\" y=\"54\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">TE</text><text x=\"286\" y=\"55\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">0</text><rect x=\"180\" y=\"79\" width=\"170\" height=\"34\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"113\" width=\"170\" height=\"99\" fill=\"#edf3f7\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><rect x=\"180\" y=\"212\" width=\"170\" height=\"29\" fill=\"#bdd0dc\" stroke=\"#6b8492\" stroke-width=\"1.5\" /><text x=\"20\" y=\"102\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">Ag</text><text x=\"20\" y=\"167\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">a-Si</text><text x=\"20\" y=\"234\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">p+ poly-Si</text><path d=\"M265 241L265 243\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 243L256 253\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M256 253L256 287\" stroke=\"#6b8492\" stroke-width=\"2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" stroke-dasharray=\"6 3\"/><path d=\"M256 287L265 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M240 250L240 290\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M187 270L240 270\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><path d=\"M265 299L465 299\" stroke=\"#6b8492\" stroke-width=\"2.2\" fill=\"none\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><text x=\"122\" y=\"278\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">WL</text><text x=\"482\" y=\"307\" text-anchor=\"start\" fill=\"#173449\" font-size=\"22\">BE / SL</text><text x=\"287\" y=\"279\" text-anchor=\"start\" fill=\"#536c7c\" font-size=\"22\">OFF</text><path d=\"M246 113L282 113L274 143L256 147Z\" stroke=\"#82639d\" stroke-width=\"1\" fill=\"#82639d\" stroke-linecap=\"round\" stroke-linejoin=\"round\" /><circle cx=\"263\" cy=\"153\" r=\"6\" fill=\"#82639d\" /><circle cx=\"265\" cy=\"166\" r=\"6\" fill=\"#82639d\" /><circle cx=\"267\" cy=\"179\" r=\"6\" fill=\"#82639d\" /><circle cx=\"263\" cy=\"192\" r=\"6\" fill=\"#82639d\" /><rect x=\"370\" y=\"116\" width=\"150\" height=\"64\" fill=\"#edf6f4\" stroke=\"#6b8492\" stroke-width=\"1.5\" rx=\"9\"/><text x=\"445\" y=\"155\" text-anchor=\"middle\" fill=\"#178084\" font-size=\"22\">SA: LRS</text></svg>",
                    "sourceIds": [
                      "ip-crossbar-macro",
                      "ip-crossbar-2015",
                      "ip-crossbar-cell-2012"
                    ]
                  }
                ],
                "legend": [
                  {
                    "symbol": "Ag / a-Si / p+ poly-Si",
                    "meaning": "Silver top electrode/amorphous silicon/selected lower buffer-contact embodiment"
                  },
                  {
                    "symbol": "Ag",
                    "meaning": "Purple region and dots denote metal region/particles without asserting each charge state"
                  },
                  {
                    "symbol": "TE / BE; WL",
                    "meaning": "Top/bottom electrodes and select gate; 1T1R integration has a separate manufacturer source"
                  },
                  {
                    "symbol": "Ic / e−",
                    "meaning": "Conventional current opposes electron motion; electrons may tunnel between neighboring particles"
                  }
                ],
                "sources": [
                  {
                    "id": "ip-crossbar-macro",
                    "label": "Crossbar: High-Performance ReRAM IP Brief",
                    "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
                    "kind": "Manufacturer public product brief",
                    "date": null,
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
                    "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
                  },
                  {
                    "id": "ip-crossbar-2015",
                    "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
                    "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
                    "kind": "Manufacturer public conference presentation",
                    "date": "2015",
                    "accessedAt": "2026-09-10",
                    "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
                    "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
                  },
                  {
                    "id": "ip-crossbar-cell-2012",
                    "label": "Crossbar: Published Patent Application US20120007035A1",
                    "url": "https://patents.google.com/patent/US20120007035A1/en",
                    "kind": "Original published patent application",
                    "date": "2012-01-12",
                    "accessedAt": "2026-09-10",
                    "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
                    "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
                  }
                ],
                "caveat": "This is a published patent embodiment associated with historical embedded IP, not proof of current macro recipes or newly licensable nodes in 2026. The patent describes metal particles and interparticle tunneling; the path is not equated to a solid silver bridge or generic cathode-nucleated ECM."
              }
            ]
          }
        ]
      }
    ],
    "sources": [
      {
        "id": "ip-neobit",
        "label": "NeoBit Technical Principles",
        "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoBit",
        "kind": "Primary Technical Source",
        "date": "Undated; checked 2026-09-10",
        "locator": "Technical Principles",
        "limit": "Current product principle; full biases and layout are not disclosed."
      },
      {
        "id": "ip-neobit-pat",
        "label": "Historical NeoBit Charge-Retention Patent",
        "url": "https://patents.google.com/patent/US6914825B2/en",
        "kind": "Public Patent",
        "date": "2005-07-05",
        "locator": "Figures 2(a), 2(b), 6; claims 1, 4",
        "limit": "Historical p+ floating-gate model linked by 2005 company news; not every current process."
      },
      {
        "id": "ip-neobit-link",
        "label": "Official NeoBit-to-Patent Link",
        "url": "https://www.ememory.com.tw/en-US/News/News?guid=19081915004414",
        "kind": "Primary Technical Source",
        "date": "2005-10-04",
        "locator": "Second body paragraph: patent title and inventors",
        "limit": "Direct historical association between NeoBit and the named patent."
      },
      {
        "id": "ip-neobit-uv",
        "label": "Published NeoBit UV-Erase Boundary",
        "url": "https://www.ememory.com.tw/Content/Upload/files/Product%20Brief/07_NeoBit%C2%AE%E2%80%93%20Most%20Widely%20Used%20OTP%20Solution_20210330.pdf",
        "kind": "Primary Technical Source",
        "date": "2021; filename version 2021-03-30",
        "locator": "Page 1: Feature/Advantage, Other benefits; UV erase",
        "limit": "UV erase was published; this does not make every current package UV erasable."
      },
      {
        "id": "ip-neobit-pgm-pat",
        "label": "Series-PMOS Embedded EPROM Write-Bias Patent",
        "url": "https://patents.google.com/patent/US6678190B2/en",
        "kind": "Public Patent",
        "date": "2004-01-13",
        "locator": "Figures 5, 9 and 10; write-“1”: VSL/VNW 3–8 V; Ig peak near Vd −5 to −6 V",
        "limit": "Embodiment biases belong to this no-control-gate PMOS cell; not a 3.3 V/5 V to 6.5 V/7.5 V rule."
      },
      {
        "id": "ip-neobit-io-pat",
        "label": "I/O-Device Single-Poly NVM Patent",
        "url": "https://patents.google.com/patent/US6920067B2/en",
        "kind": "Public Patent",
        "date": "2005-07-19",
        "locator": "I/O such as 3.3 V; cell transistors share I/O electrical behavior; preferred write about 5 V",
        "limit": "Supports I/O-device rules; does not require 7.5 V PGM for a 5 V I/O cell."
      },
      {
        "id": "ip-neobit-eetimes-2003",
        "label": "EE Times: 0.35 µm NeoBit Programs at 6–6.5 V",
        "url": "https://www.eetimes.com/flash-maker-ememory-gaining-foundry-converts-2/",
        "kind": "Primary Technical Source",
        "date": "2003-11-05",
        "locator": "Hsu: 0.35 micron programming voltage 6 to 6.5 volts versus about 10 volts for EEPROM",
        "limit": "A 0.35 µm-generation public comparison; not 180 nm core-GOX breakdown."
      },
      {
        "id": "ip-neobit-io-pgm-author",
        "label": "Public Literature / Architecture-Class: I/O PMOS Floating-Gate OTP Program Voltages",
        "url": "https://patents.google.com/patent/US6920067B2/en",
        "kind": "Architecture-class Reference",
        "date": "reviewed 2026-09-11",
        "locator": "About 6.5 V PGM for a 3.3 V I/O PMOS cell; about 7.5 V for a 5 V cell; NMOS at the same node needs a higher Vpgm",
        "limit": "Architecture-class pairing from public patents, industry reporting, and I/O floating-gate cell teaching literature. Unpublished file pages are not quoted. Do not move onto gate-oxide-breakdown AntiFuse."
      },
      {
        "id": "ip-neofuse",
        "label": "NeoFuse Technical Principles",
        "url": "https://www.ememory.com.tw/en-US/Products/OTP/NeoFuse",
        "kind": "Primary Technical Source",
        "date": "Undated; checked 2026-09-10",
        "locator": "Technical Principles",
        "limit": "Impedance-based OTP and GIDL suppression; full dielectric materials are undisclosed."
      },
      {
        "id": "ip-neofuse-dt",
        "label": "Quantum Tunneling Mechanism in NeoFuse",
        "url": "https://www.chipestimate.com/Quantum-Tunneling-Mechanism-in-NeoFuse/eMemory/Technical-Article/2021/01/19",
        "kind": "Primary Technical Source",
        "date": "2021-01-19",
        "locator": "Figures 1–3; core nFET, gate oxide, dangling bonds, direct tunneling",
        "limit": "eMemory-authored article; an ultrathin-oxide DT model, not a metallic filament for all generations."
      },
      {
        "id": "ip-neofuse-3t",
        "label": "Named NeoFuse Three-Transistor Architecture",
        "url": "https://www.ememory.com.tw/en-US/News/2024-12-09/Powering-the-NVM-and-Embedded-Chip-Security-Technologies",
        "kind": "Officially Reposted Executive Interview",
        "date": "2024-12-09",
        "locator": "NeoFuse: patented 3T design and regulating transistor",
        "limit": "Confirms 3T and a regulating function, not every current netlist or cross-section."
      },
      {
        "id": "ip-neofuse-pat",
        "label": "Related Three-Transistor Antifuse Patent",
        "url": "https://patents.google.com/patent/US20250024668A1/en",
        "kind": "Public Patent",
        "date": "2025-01-16",
        "locator": "Figures 2, 3A, 3B; first 3T embodiment; gate dielectric 262/264/266/268",
        "limit": "Related same-company embodiment, not explicitly branded NeoFuse."
      },
      {
        "id": "ip-neofuse-9v-2016",
        "label": "Named example: 0.18 µm 1.8 V NeoFuse core sustains 9 V during program",
        "url": "https://www.ememory.com.tw/en-US/News/2016-01-14/eMemory%E2%80%99s-NeoFuse-Technology-A-Major-Advance-in-Automotive-Panel-Driver-IC",
        "kind": "Primary Technical Source",
        "date": "2016-01-14",
        "locator": "0.18um 1.8V/13.5V example: core device can sustain 9V high-voltage stress during programming",
        "limit": "Named source-driver program stress; not a node-independent breakdown voltage and not FG HCI."
      },
      {
        "id": "ip-kilopass-xpm-2007",
        "url": "https://patents.google.com/patent/WO2007090089A2/en",
        "date": "2007-08-09",
        "accessedAt": "2026-09-10",
        "kind": "Public Patent",
        "label": "Historical Kilopass XPM 2T Patent Diagram",
        "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
        "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
      },
      {
        "id": "ip-kilopass-2t-2012",
        "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
        "date": "2012-05-15",
        "accessedAt": "2026-09-10",
        "kind": "Republished Vendor Announcement",
        "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
        "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
        "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
      },
      {
        "id": "ip-lineage-kilopass-2018",
        "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
        "date": "2018-01-10",
        "accessedAt": "2026-09-10",
        "kind": "Official Acquisition Announcement",
        "label": "Synopsys Acquisition of Kilopass",
        "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
        "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
      },
      {
        "id": "ip-synopsys-otp-current",
        "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official Technical Article",
        "label": "Synopsys OTP NVM 1T/2T Portfolio",
        "locator": "Synopsys OTP NVM IP Solutions",
        "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
      },
      {
        "id": "ip-synopsys-advanced-otp",
        "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "kind": "Official Technical Article",
        "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
        "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
        "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
      },
      {
        "id": "ip-sidense-cell-2007",
        "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
        "date": "2007-12-18",
        "accessedAt": "2026-09-10",
        "kind": "Original-Author Technical Article",
        "label": "Sidense 1T-Fuse Original-Author Cell Section",
        "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
        "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
      },
      {
        "id": "ip-sidense-irreversible-2017",
        "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
        "date": "2017-09-05",
        "accessedAt": "2026-09-10",
        "kind": "Original-Author Technical Article",
        "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
        "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
        "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
      },
      {
        "id": "ip-sidense-patent-2006",
        "url": "https://patents.google.com/patent/US20060244099A1/en",
        "date": "2006-11-02",
        "accessedAt": "2026-09-10",
        "kind": "Public Patent",
        "label": "Historical Sidense Split-Channel Antifuse Patent",
        "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
        "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
      },
      {
        "id": "ip-lineage-sidense-2017",
        "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
        "date": "2017-10-17",
        "accessedAt": "2026-09-10",
        "kind": "Official Acquisition Announcement",
        "label": "Synopsys Acquisition of Sidense",
        "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
        "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
      },
      {
        "id": "ip-cfx-otpip",
        "label": "Chuangfeixin OTP IP",
        "url": "https://www.chuangfeixin.com/otpip",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "CMOS-compatible OTP IP product line.",
        "limit": "The page does not lock a single physics mechanism."
      },
      {
        "id": "ip-cfx-news-routes",
        "label": "CFX: Three OTP Routes",
        "url": "https://www.chuangfeixin.com/newsinfo/8119214.html",
        "kind": "vendor",
        "date": "2026-04-09",
        "locator": "Public narrative lists Anti-fuse, eFuse, and Floating Gate OTP routes.",
        "limit": "Do not collapse the three routes into one bit cell."
      },
      {
        "id": "ip-cfx-semiiphub",
        "label": "Semi IP Hub: CFX Gate-Oxide Breakdown",
        "url": "https://semiiphub.com/vendor/cfx-semiconductor/",
        "kind": "catalog",
        "date": "2026-09-16",
        "locator": "Some named HV macros use a high-voltage pulse for gate-to-substrate oxide breakdown.",
        "limit": "The catalog description does not cover every CFX OTP SKU."
      },
      {
        "id": "ip-attop-home",
        "label": "Attopsemi Home",
        "url": "https://www.attopsemi.com/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "I-fuse is positioned as OTP; explicitly not AntiFuse and not explosive eFuse.",
        "limit": "The home page does not draw I-fuse as MOS gate-oxide breakdown."
      },
      {
        "id": "ip-attop-ifuse",
        "label": "Attopsemi I-fuse Technology",
        "url": "https://www.attopsemi.com/ifuse-technology/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "Heat-assisted electromigration below thermal runaway; poly / metal-gate / metal fuse, not MOS.",
        "limit": "No public fuse cross-section dimensions or program current table."
      },
      {
        "id": "ip-floadia-za",
        "label": "Floadia LEE Fuse ZA",
        "url": "https://floadia.com/product/lee-fuse-za/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "Anti-fuse OTP, zero extra mask, 180 nm to sub-10 nm; DRAM 1xnm production track.",
        "limit": "The page once writes LEE Flash ZA; the product name is LEE Fuse ZA. No public breakdown-site cross-section."
      },
      {
        "id": "ip-neoee",
        "label": "NeoEE Technical Principles",
        "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoEE",
        "kind": "Primary Technical Source",
        "date": "Undated; checked 2026-09-10",
        "locator": "Technical Principles; capacitive-coupling MOS devices and selectors",
        "limit": "Current FN/FN; exact device count, p/n arrangement and biases are undisclosed."
      },
      {
        "id": "ip-neoee-history",
        "label": "Historical NeoEE Conceptual Cell",
        "url": "https://www.chipestimate.com/Value-Propositions-that-NeoEETM-Technology-can-Delivery/eMemory/Technical-Article/2010/10/19",
        "kind": "Primary Technical Source",
        "date": "2010-10-19",
        "locator": "NeoEE Technology; Figure 1(b), Tej tunneling junction",
        "limit": "Historical family includes CHE/FN and FN/FN; it does not override the current route."
      },
      {
        "id": "ip-neomtp",
        "label": "NeoMTP Technical Principles",
        "url": "https://www.ememory.com.tw/en-US/Products/MTP/NeoMTP",
        "kind": "Primary Technical Source",
        "date": "Undated; checked 2026-09-10",
        "locator": "Technical Principles; p-type FG-MOSFET; extra erase gate",
        "limit": "Hot-hole-induced electron injection and FN from FG to erase gate; full cross-section is undisclosed."
      },
      {
        "id": "ip-neomtp-pat",
        "label": "Related pMOS and Edge-Erase-Gate Patent",
        "url": "https://patents.google.com/patent/US20030235082A1/en",
        "kind": "Public Patent",
        "date": "2003-12-25",
        "locator": "Figures 2, 3A–3C, 4, 5; paragraphs 0019–0035",
        "limit": "Historical same-company patent; lateral n+ EG is not established as current NeoMTP."
      },
      {
        "id": "ymc-product",
        "label": "YMC: Logic-Process ymtp MTP IP",
        "url": "https://www.ymc.com.tw/index_en.php",
        "kind": "Manufacturer Information",
        "date": "Undated; accessed 2026-09-10",
        "locator": "About YMC paragraph",
        "limit": "Confirms product positioning; no cell or operating-bias disclosure for a specific version."
      },
      {
        "id": "ymc-1t1c",
        "label": "YMC: 1T1C Core Technology",
        "url": "https://www.ymc.com.tw/upload/files/6423%E5%84%84%E8%80%8C%E5%BE%97%E4%B8%8A%E5%B8%82%E5%89%8D%E6%A5%AD%E7%B8%BE%E7%99%BC%E8%A1%A8%E6%9C%83_%E7%B0%A1%E5%A0%B10416(%E4%B8%8A).pdf#page=25",
        "kind": "Manufacturer Information",
        "date": "2024; accessed 2026-09-10",
        "locator": "Pre-listing business presentation, page 25",
        "limit": "Confirms a 1T1C family and multiple generations; does not establish this model as a current product cross-section."
      },
      {
        "id": "ymc-pat-7423903",
        "label": "YMC: Historical Single-Floating-Gate Example",
        "url": "https://patents.google.com/patent/US7423903B2/en",
        "kind": "Public Patent",
        "date": "2008-09-09; accessed 2026-09-10",
        "locator": "Figures 1, 2A and 2B; first embodiment; FN erase in Summary",
        "limit": "Four-terminal nMOS/N-type capacitor example; its stated FN erase is not evidence for BBHH."
      },
      {
        "id": "ymc-pat-dahhi",
        "label": "YMC: DAHCI Program and DAHHI Erase Variant",
        "url": "https://patents.google.com/patent/US20070158733A1/en",
        "kind": "Public Patent",
        "date": "2007-07-12; accessed 2026-09-10",
        "locator": "Figures 3B, 5A, 6B and 8A with adjacent description",
        "limit": "Supports hot-carrier and threshold directions; avalanche-based DAHHI is distinct from BBHH."
      },
      {
        "id": "physics-bbhh-fg",
        "label": "Wu et al.: BBHH and Floating-Gate Demonstration",
        "url": "https://pure.lib.cgu.edu.tw/en/publications/a-nand-type-flash-memory-using-impact-ionization-generated-substr/",
        "kind": "Original Research",
        "date": "2007; accessed 2026-09-10",
        "locator": "IEDM 2007, pages 87–90; author-institution abstract; DOI 10.1109/IEDM.2007.4418870",
        "limit": "Uses BBHH and reports a floating-gate demonstration; its NAND structure, IIHE programming and values are not transferred to the YMC model."
      },
      {
        "id": "physics-btbt-carriers",
        "label": "Chu and Wu: BTBT Hot-Carrier Paths",
        "url": "https://ir.lib.nycu.edu.tw/bitstream/11536/30685/1/000085620800010.pdf",
        "kind": "Original Research",
        "date": "2000-03; accessed 2026-09-10",
        "locator": "IEEE EDL 21(3), page 123 Introduction; page 125 Figure 4; DOI 10.1109/55.823576",
        "limit": "Supports silicon BBT carrier generation and field-assisted injection; Figure 3 is pMOS and is not copied into the nMOS model."
      },
      {
        "id": "physics-fg-hole-erase",
        "label": "IEEE: Hot-Hole Injection into a Floating Gate",
        "url": "https://ieeexplore.ieee.org/document/748914/",
        "kind": "Original Research",
        "date": "1999-03; accessed 2026-09-10",
        "locator": "IEEE EDL 20(3), pages 140–142; abstract; DOI 10.1109/55.748914",
        "limit": "Observes BBT/possible avalanche enhancement during FN erase; used only for floating-gate hot-hole physics, not a pure-BBHH recipe."
      },
      {
        "id": "aeon-impinj-2007",
        "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
        "date": "2007-09-26",
        "label": "Impinj AEON/MTP Floating-Gate Announcement",
        "kind": "Company product announcement",
        "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
        "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
      },
      {
        "id": "aeon-virage-fn-2009",
        "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
        "date": "2009-06-30",
        "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
        "kind": "Company-authored technical article",
        "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
        "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
      },
      {
        "id": "ip-actt-envm",
        "label": "Actt eNVM Product Page",
        "url": "https://www.analogcircuit.cn/product/envm.html",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "LogicFlash MTP: logic-compatible, 0–1 extra mask, Flash-like byte PGM / sector or chip ERS, up to 10k cycles; SuperMTP marked under development; no public bit-cell cross-section.",
        "limit": "\"Flash-like\" proves interface and update granularity, not FN, HCI, or a trap layer."
      },
      {
        "id": "ip-actt-andes-cmt",
        "label": "Andes: Actt Acquired CMT",
        "url": "https://www.andestech.com/en/2016/08/30/andes-technology-and-actt-announce-strategic-partnership/",
        "kind": "news",
        "date": "2016-08-30",
        "locator": "Actt acquired Chip Memory Technology (CMT) in 2016.",
        "limit": "CMT is a lineage name, not a current public SKU."
      },
      {
        "id": "ip-nscore-products",
        "label": "NSCore Products",
        "url": "https://www.nscore.com/products/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "TwinBit MTP is listed beside PermSRAM OTP; TwinBit is sold as CMOS, zero extra mask.",
        "limit": "The products page does not describe TwinBit as PermSRAM hotspot-into-SiN."
      },
      {
        "id": "ip-nscore-twinbit-g2",
        "label": "NSCore TwinBit Gen-2",
        "url": "https://www.nscore.com/twinbit_g2.html",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "Gen-2 Pch Schottky; program by hot hole, erase by hot electron; 40–22 nm, zero extra mask.",
        "limit": "No public bias table or junction dimensions."
      },
      {
        "id": "ip-floadia-zt",
        "label": "Floadia LEE Flash ZT",
        "url": "https://floadia.com/product/lee-flash-zt/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "Zero extra-mask MTP; FN program and erase; 180BCD sample; automotive narrative.",
        "limit": "Body 10K vs table >100k is inconsistent; do not take cycle counts as a common guarantee."
      },
      {
        "id": "ip-floadia-zt-news",
        "label": "Floadia ZT News: Floating Gate",
        "url": "https://floadia.com/news/422/",
        "kind": "vendor",
        "date": "2024-12-09",
        "locator": "ZT uses a floating gate as the storage node.",
        "limit": "The news item does not give poly count or well structure."
      },
      {
        "id": "ip-floadia-g1",
        "label": "Floadia LEE Flash G1",
        "url": "https://floadia.com/product/lee-flash-g1/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "SONOS eFlash, 2–3 extra masks, FN program/erase, BCD.",
        "limit": "No public nitride thickness or bias table."
      },
      {
        "id": "ip-floadia-g2",
        "label": "Floadia LEE Flash G2",
        "url": "https://floadia.com/product/lee-flash-g2/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "SONOS cell sandwiched by switch transistors; 4 extra masks; VDD read / non-volatilized logic; marked ongoing development.",
        "limit": "An in-development note is not a production guarantee."
      },
      {
        "id": "ip-sst-home",
        "label": "SST Home and Services",
        "url": "https://www.sst.com/services/",
        "kind": "vendor",
        "date": "2026-09-16",
        "locator": "SuperFlash embedded Flash process-integration and licensing entry.",
        "limit": "The services page proves the product family; it does not replace brochure SSI / interpoly FN detail."
      },
      {
        "id": "ip-sst-superflash",
        "label": "SST / Microchip SuperFlash Brochure DS00001425F",
        "url": "https://ww1.microchip.com/downloads/aemDocuments/documents/sst/product-documents/brochures/00001425F.pdf",
        "kind": "vendor",
        "date": "2018-03",
        "locator": "Pages 2–3: split-gate, source-side injection program, interpoly FN erase.",
        "limit": "Read structure and mechanism within the named SuperFlash generation; 2018 shipment and node tables are not 2026 product guarantees."
      },
      {
        "id": "ip-numem-current",
        "label": "Numem: Public MRAM IP Positioning",
        "url": "https://www.numem.com/",
        "kind": "Manufacturer product page",
        "date": null,
        "accessedAt": "2026-09-10",
        "locator": "What is Numem MRAM?; Numem MRAM IP",
        "limit": "Supports embedded IP and foundry-standard STT cells; current material recipes are not disclosed."
      },
      {
        "id": "ip-numem-2019",
        "label": "Numem: First-Generation 22nm Embedded MRAM Presentation",
        "url": "https://files.futurememorystorage.com/proceedings/2019/08-05-Monday/20190805_MRAMDD_EmbeddedMRAM_Hendrickson.pdf",
        "kind": "Manufacturer public conference presentation",
        "date": "2019-08-05",
        "accessedAt": "2026-09-10",
        "locator": "Pages 2, 4, 5, 7: test chip, WL/BL/SL, forced-current sensing, RMTJ",
        "limit": "This is a first-generation test-chip architecture; its measured values are not treated as current NuRAM specifications."
      },
      {
        "id": "ip-stt-physics",
        "label": "Everspin: STT Family Physics",
        "url": "https://www.everspin.com/stt-mram-technology",
        "kind": "Manufacturer mechanism explanation",
        "date": null,
        "accessedAt": "2026-09-10",
        "locator": "Spin-transfer Torque MRAM Technology: current direction, free layer, P/AP resistance",
        "limit": "Supports STT family physics only, not Numem product, material, or performance evidence."
      },
      {
        "id": "ip-gf-platform",
        "label": "GF: 22FDX Embedded MRAM Platform",
        "url": "https://investors.gf.com/news-releases/news-release-details/globalfoundries-delivers-industrys-first-production-ready-emram",
        "kind": "Original foundry announcement",
        "date": "2020-02-27",
        "accessedAt": "2026-09-10",
        "locator": "Opening and Custom design kits: production entry and drop-in silicon-validated MRAM macros",
        "limit": "Platform identity is separate from the research-cell recipe; confirm macro availability, nodes, and conditions with the supplier."
      },
      {
        "id": "ip-gf-cell-2024",
        "label": "GF Coauthored Research: 22FDX STT-MRAM Cells",
        "url": "https://pmc.ncbi.nlm.nih.gov/articles/PMC11409953/",
        "kind": "Original research paper",
        "date": "2024-09-18",
        "accessedAt": "2026-09-10",
        "locator": "Materials and Methods: MRAM array structure and fabrication; Figure 2",
        "limit": "Limited to the reported CoFeB/SAF and 1T1MTJ example; positive Ic is RL-to-FL and writes P. Barrier material is not specified here."
      },
      {
        "id": "ip-weebit-product",
        "label": "Weebit: Embedded ReRAM IP",
        "url": "https://www.weebit-nano.com/products/embedded-reram-ip/",
        "kind": "Manufacturer IP product page",
        "date": null,
        "accessedAt": "2026-09-10",
        "locator": "IP module, design deliverables, control, and analog periphery",
        "limit": "Product identity does not imply every foundry node uses the same published research recipe."
      },
      {
        "id": "ip-weebit-bitcell",
        "label": "Weebit: ReRAM Bitcell",
        "url": "https://www.weebit-nano.com/technology/reram-bitcell/",
        "kind": "Manufacturer mechanism explanation",
        "date": null,
        "accessedAt": "2026-09-10",
        "locator": "Two electrodes/thin oxide, forming, positive SET, and reverse RESET",
        "limit": "Forming is distinct from recurring SET; the page does not specify all materials or terminal voltages."
      },
      {
        "id": "ip-weebit-cell-2021",
        "label": "Weebit/CEA-Leti/Silvaco: Original Oxide ReRAM Model",
        "url": "https://www.weebit-nano.com/wp-content/uploads/2021/05/Weebit-nano_Silvaco_ReRAM-TCAD_Oxide-Based-Model_IMW_OxRAM_2021_published-on-IEEE_V3-1.pdf",
        "kind": "Author-posted original research paper",
        "date": "2021-05",
        "accessedAt": "2026-09-10",
        "locator": "PDF pages 2–5; Sections II–IV and Figures 1, 3, 5, 11: Ti/SiOx/TiN and oxygen exchange",
        "limit": "Model/electrical comparison for a CEA 130nm research cell; neither direct operando ion tracking nor a recipe disclosure for every SkyWater macro."
      },
      {
        "id": "ip-crossbar-macro",
        "label": "Crossbar: High-Performance ReRAM IP Brief",
        "url": "https://www.crossbar-inc.com/assets/white-papers/High-Performance-Memory-Product-Brief.pdf",
        "kind": "Manufacturer public product brief",
        "date": null,
        "accessedAt": "2026-09-10",
        "locator": "Pages 1–2: hard macro/architectural license, embedded macro, and overwrite",
        "limit": "Supports historical IP licensing forms; this review does not confirm a 2026 list of newly licensable nodes or macros."
      },
      {
        "id": "ip-crossbar-2015",
        "label": "Crossbar: Original Embedded 1T1R and Metallic-Path Presentation",
        "url": "https://www.crossbar-inc.com/assets/resources/presentations/FMS2015-Slides-Versatile-ReRAM-Technology-and-Applications.pdf",
        "kind": "Manufacturer public conference presentation",
        "date": "2015",
        "accessedAt": "2026-09-10",
        "locator": "Pages 3, 4, 7, 8, 15: metallic path, cell versus selector, BEOL 1T1R",
        "limit": "Embedded 1T1R and high-density 1S1R/1TnR have separate scopes and are not merged into one circuit."
      },
      {
        "id": "ip-crossbar-cell-2012",
        "label": "Crossbar: Published Patent Application US20120007035A1",
        "url": "https://patents.google.com/patent/US20120007035A1/en",
        "kind": "Original published patent application",
        "date": "2012-01-12",
        "accessedAt": "2026-09-10",
        "locator": "Figures 1–3; [0023]–[0025], [0037]: Ag/a-Si/p+ poly-Si, positive extension, negative retraction",
        "limit": "Selects a named embodiment with metal particles and tunneling paths; does not establish this recipe for all current macros or generic cathode-grown silver bridges."
      },
      {
        "id": "aeon-transfer-2008",
        "url": "https://www.sec.gov/Archives/edgar/data/1050776/000119312508145768/d8k.htm",
        "date": "2008-06-26",
        "label": "Virage Logic Filing on the Impinj NVM IP Business",
        "kind": "Original SEC filing",
        "locator": "Item 2.01; signed 2008-07-02; transaction 2008-06-26",
        "limit": "Supports acquisition of the logic NVM IP business assets by Virage Logic, not a direct Synopsys acquisition of Impinj."
      },
      {
        "id": "aeon-transfer-2010",
        "url": "https://news.synopsys.com/home?item=123195",
        "date": "2010-09-02",
        "label": "Synopsys Completes the Virage Logic Acquisition",
        "kind": "Company completion announcement",
        "locator": "Opening completion paragraph and added NVM portfolio",
        "limit": "Supports corporate acquisition and portfolio succession, not identical AEON internal cells across generations."
      },
      {
        "id": "aeon-synopsys-2013",
        "url": "https://news.synopsys.com/2013-11-20-Synopsys-New-Ultra-Low-Power-Non-Volatile-Memory-IP-Cuts-Power-by-90-Percent-and-Size-in-Half",
        "date": "2013-11-20",
        "label": "Synopsys DesignWare AEON MTP ULP Announcement",
        "kind": "Company product announcement",
        "locator": "Highlights, opening paragraph and Availability",
        "limit": "Explicitly continues AEON branding with MTP ULP. Performance comparisons are not used; branding does not establish a cell netlist."
      },
      {
        "id": "aeon-synopsys-current",
        "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-rfid.html",
        "date": null,
        "accessedAt": "2026-09-10",
        "label": "Synopsys Current MTP ULP NVM Product Page",
        "kind": "Current company product page",
        "locator": "Overview and Highlights; checked 2026-09-10",
        "limit": "Publishes single-poly, floating-gate and zero-mask-adder positioning. The page uses MTP ULP naming; this does not prove all current MTP shares the 2009 AEON cell."
      }
    ],
    "lineage": {
      "title": "IP Technology Lineage and Product Succession",
      "intro": "Follow three IP families into the Synopsys portfolio through original cells, product announcements and succession events. Each lineage links to its cell lesson, followed by subsequent public products and the physical scope supported by sources.",
      "sources": [
        {
          "id": "ip-kilopass-xpm-2007",
          "url": "https://patents.google.com/patent/WO2007090089A2/en",
          "date": "2007-08-09",
          "accessedAt": "2026-09-10",
          "kind": "Public Patent",
          "label": "Historical Kilopass XPM 2T Patent Diagram",
          "locator": "Figure 1; paragraphs [0025]–[0029]; Figure 2 contrast in [0031]",
          "limit": "Figure 1 explicitly names existing XPM. Reconstruct only its 2T function; exclude the intermediate output in Figure 2 and later self-sensing circuits."
        },
        {
          "id": "ip-kilopass-2t-2012",
          "url": "https://www.design-reuse.com/news/202521997-kilopass-nvm-ip-cores-first-to-deliver-footprint-and-pin-compatibility-across-eight-top-tier-silicon-foundries-for-the-130-110nm-process-node/",
          "date": "2012-05-15",
          "accessedAt": "2026-09-10",
          "kind": "Republished Vendor Announcement",
          "label": "Kilopass 130/110 nm XPM and Gusto 2T Announcement",
          "locator": "Body paragraphs naming 2T CMOS antifuse and XPM/Gusto",
          "limit": "Supports the 2T link for the named historical products and nodes, not every node, current macro, or identical layout across foundries."
        },
        {
          "id": "ip-lineage-kilopass-2018",
          "url": "https://news.synopsys.com/2018-01-10-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Kilopass-Technology",
          "date": "2018-01-10",
          "accessedAt": "2026-09-10",
          "kind": "Official Acquisition Announcement",
          "label": "Synopsys Acquisition of Kilopass",
          "locator": "Announcement date; XPM, Gusto, SecretCode and 1T/2T product paragraphs",
          "limit": "Confirms portfolio acquisition, not identity between historical cells and all current implementations."
        },
        {
          "id": "ip-sidense-cell-2007",
          "url": "https://www.chipestimate.com/1T-OTP-Memory-Delivering-Quality-and-Reliability/Sidense-a-part-of-Synopsys/Technical-Article/2007/12/18",
          "date": "2007-12-18",
          "accessedAt": "2026-09-10",
          "kind": "Original-Author Technical Article",
          "label": "Sidense 1T-Fuse Original-Author Cell Section",
          "locator": "Wlodek Kurjanowicz; Figure 2 and adjacent 1T-Fuse explanation",
          "limit": "Figure 2 is an n-type teaching structure with one continuous poly gate, thick/thin oxide, and one BL diffusion. Read arrows are inferred from this structure and the stated teaching bias, not a current macro bias table."
        },
        {
          "id": "ip-sidense-irreversible-2017",
          "url": "https://www.chipestimate.com/Enabling-Secure-Semiconductor-Supply-Chain-Management/Sidense-a-part-of-Synopsys/Technical-Article/2017/09/05",
          "date": "2017-09-05",
          "accessedAt": "2026-09-10",
          "kind": "Original-Author Technical Article",
          "label": "Sidense 1T-Fuse Irreversibility and eMTP Boundary",
          "locator": "Where NVM Fits In; Sidense Antifuse-based Split-channel 1T-Fuse Bit Cell; Figure 5",
          "limit": "Supports persistent thin-oxide conduction and emulated updates at system level; absolute security and competitor-comparison claims are excluded."
        },
        {
          "id": "ip-sidense-patent-2006",
          "url": "https://patents.google.com/patent/US20060244099A1/en",
          "date": "2006-11-02",
          "accessedAt": "2026-09-10",
          "kind": "Public Patent",
          "label": "Historical Sidense Split-Channel Antifuse Patent",
          "locator": "Figures 4, 5, 11, 12; paragraphs [0062]–[0067], [0087]–[0091]; claims 1–3, 12–13",
          "limit": "Corroborates thick/thin oxide and optional omission of the second diffusion. Detailed p-type biases are not transferred into the 2007 n-type product diagram."
        },
        {
          "id": "ip-lineage-sidense-2017",
          "url": "https://news.synopsys.com/2017-10-17-Synopsys-Expands-DesignWare-IP-Portfolio-with-Acquisition-of-Sidense-Corporation",
          "date": "2017-10-17",
          "accessedAt": "2026-09-10",
          "kind": "Official Acquisition Announcement",
          "label": "Synopsys Acquisition of Sidense",
          "locator": "Announcement date; single-transistor and split-channel 1T-Fuse paragraphs",
          "limit": "Directly links Sidense 1T-Fuse to the acquisition; does not establish one unchanged cross-section for all later OTP."
        },
        {
          "id": "ip-synopsys-otp-current",
          "url": "https://www.synopsys.com/articles/non-volatile-memory.html",
          "date": null,
          "accessedAt": "2026-09-10",
          "kind": "Official Technical Article",
          "label": "Synopsys OTP NVM 1T/2T Portfolio",
          "locator": "Synopsys OTP NVM IP Solutions",
          "limit": "Article is undated. Records the public 1T/2T antifuse portfolio as checked; does not assign every current product to a historical vendor cell."
        },
        {
          "id": "ip-synopsys-advanced-otp",
          "url": "https://www.synopsys.com/articles/reliable-secure-otp-ip.html",
          "date": null,
          "accessedAt": "2026-09-10",
          "kind": "Official Technical Article",
          "label": "Synopsys Advanced-Process OTP Reliability and Sensing",
          "locator": "Basic Operation; Figure 2; sensing, ECC and controller discussion",
          "limit": "Article is undated. Supports oxide breakdown, current sensing and macro-level improvements, but does not establish a separately named third cell."
        },
        {
          "id": "aeon-impinj-2007",
          "url": "https://www.impinj.com/about-us/news-room/2007/impinj-delivers-reprogrammable-nonvolatile-memory-ip-breakthrough---aeonmtp-worlds-first-25v-floatin",
          "date": "2007-09-26",
          "label": "Impinj AEON/MTP Floating-Gate Announcement",
          "kind": "Company product announcement",
          "locator": "Opening AEON/MTP and floating-gate transistor paragraphs",
          "limit": "Supports the floating-gate family. Process and voltage claims apply to that announcement; no complete cell section is disclosed."
        },
        {
          "id": "aeon-virage-fn-2009",
          "url": "https://www.chipestimate.com/Auto-Industry-Replaces-Fuse-Technology-with-Standard-CMOS-Based-MTP---Adds-Functionality-Testability-and-Reliability/Synopsys-formerly-Virage-Logic-products/Technical-Article/2009/06/30",
          "date": "2009-06-30",
          "label": "Virage Logic AEON MTP Program/Erase and Monitoring",
          "kind": "Company-authored technical article",
          "locator": "Craig Zajac; Architectural decisions, Manufacturing and author biography",
          "limit": "Explicitly identifies FN for program and erase. Differential cells and ECC concern the described automotive options. No terminal voltages, p/n polarity or physical geometry are disclosed."
        },
        {
          "id": "aeon-transfer-2008",
          "url": "https://www.sec.gov/Archives/edgar/data/1050776/000119312508145768/d8k.htm",
          "date": "2008-06-26",
          "label": "Virage Logic Filing on the Impinj NVM IP Business",
          "kind": "Original SEC filing",
          "locator": "Item 2.01; signed 2008-07-02; transaction 2008-06-26",
          "limit": "Supports acquisition of the logic NVM IP business assets by Virage Logic, not a direct Synopsys acquisition of Impinj."
        },
        {
          "id": "aeon-transfer-2010",
          "url": "https://news.synopsys.com/home?item=123195",
          "date": "2010-09-02",
          "label": "Synopsys Completes the Virage Logic Acquisition",
          "kind": "Company completion announcement",
          "locator": "Opening completion paragraph and added NVM portfolio",
          "limit": "Supports corporate acquisition and portfolio succession, not identical AEON internal cells across generations."
        },
        {
          "id": "aeon-synopsys-2013",
          "url": "https://news.synopsys.com/2013-11-20-Synopsys-New-Ultra-Low-Power-Non-Volatile-Memory-IP-Cuts-Power-by-90-Percent-and-Size-in-Half",
          "date": "2013-11-20",
          "label": "Synopsys DesignWare AEON MTP ULP Announcement",
          "kind": "Company product announcement",
          "locator": "Highlights, opening paragraph and Availability",
          "limit": "Explicitly continues AEON branding with MTP ULP. Performance comparisons are not used; branding does not establish a cell netlist."
        },
        {
          "id": "aeon-synopsys-current",
          "url": "https://www.synopsys.com/designware-ip/memories-logic-libraries/non-volatile-memory/mtp-rfid.html",
          "date": null,
          "accessedAt": "2026-09-10",
          "label": "Synopsys Current MTP ULP NVM Product Page",
          "kind": "Current company product page",
          "locator": "Overview and Highlights; checked 2026-09-10",
          "limit": "Publishes single-poly, floating-gate and zero-mask-adder positioning. The page uses MTP ULP naming; this does not prove all current MTP shares the 2009 AEON cell."
        }
      ],
      "entries": [
        {
          "id": "kilopass",
          "unitId": "kilopass-xpm",
          "title": "Kilopass XPM → Synopsys",
          "summary": "XPM stores a one-time state in a gate-oxide antifuse. Its historical 2T cell separates the storage and selection MOS roles. XPM later joined Synopsys with other Kilopass products.",
          "events": [
            {
              "date": "2007-08-09",
              "title": "Public Patent Identifies the Existing XPM 2T Cell",
              "body": "Figure 1 of WO2007090089A2 identifies the existing XPM with M0 for storage and M1 for selection. This is the structure reconstructed in the lesson.",
              "sourceIds": [
                "ip-kilopass-xpm-2007"
              ]
            },
            {
              "date": "2012-05-15",
              "title": "XPM/Gusto Announcement Links 130/110 nm 2T Products",
              "body": "A Kilopass announcement names XPM, Gusto and 2T CMOS antifuse, linking the named historical products to the cell approach.",
              "sourceIds": [
                "ip-kilopass-2t-2012"
              ]
            },
            {
              "date": "2018-01-10",
              "title": "Synopsys Announces Its Kilopass Acquisition",
              "body": "The official announcement includes XPM, Gusto and SecretCode in the acquired portfolio and describes an expanded 1T/2T OTP offering.",
              "sourceIds": [
                "ip-lineage-kilopass-2018"
              ]
            }
          ],
          "currentContext": "As checked on 2026-09-10, Synopsys publicly lists a 1T/2T antifuse OTP portfolio. Its advanced-node article discusses cell sizing, analog supply and sensing, repair, ECC and controller design. These span cell and macro design; the article does not trace every current product to an original vendor cell.",
          "cellBoundary": "The cell lesson uses the historical XPM 2T functional topology in patent Figure 1. It excludes the self-sensing node of Figure 2 and undisclosed current FinFET sections. Business succession and internal cell implementation have separate evidence scopes.",
          "sourceIds": [
            "ip-kilopass-xpm-2007",
            "ip-lineage-kilopass-2018",
            "ip-synopsys-otp-current",
            "ip-synopsys-advanced-otp"
          ]
        },
        {
          "id": "sidense",
          "unitId": "sidense-1t-fuse",
          "title": "Sidense 1T-Fuse → Synopsys",
          "summary": "1T-Fuse uses one continuous gate over thick and thin oxide, integrating channel selection and antifuse storage in a split-channel cell. This is the starting point for understanding the named Sidense 1T architecture.",
          "events": [
            {
              "date": "2007-12-18",
              "title": "Original Author Publishes the 1T-Fuse Cell Section",
              "body": "Figure 2 in the Sidense author article shows thick/thin oxide, continuous poly and one BL diffusion. The lesson distinguishes its selection region from the persistent conduction region.",
              "sourceIds": [
                "ip-sidense-cell-2007"
              ]
            },
            {
              "date": "2017-09-05",
              "title": "Technical Article Explains Persistent State and Emulated Updates",
              "body": "Thin-oxide conduction creates an irreversible 1T-Fuse cell state. Emulated MTP updates use multiple storage locations and management; they do not erase or repair the original antifuse.",
              "sourceIds": [
                "ip-sidense-irreversible-2017"
              ]
            },
            {
              "date": "2017-10-17",
              "title": "Synopsys Announces Its Sidense Acquisition",
              "body": "The official announcement names the single-transistor, split-channel 1T-Fuse technology, linking the original cell approach to the acquired portfolio.",
              "sourceIds": [
                "ip-lineage-sidense-2017"
              ]
            }
          ],
          "currentContext": "Current Synopsys OTP material lists 1T and 2T offerings. Later design descriptions cover oxide-breakdown control, leakage and sensing, plus macro repair and ECC. Public material does not map every current node to the historical Sidense section.",
          "cellBoundary": "The lesson retains the n-type structure and single BL diffusion shown by the original author in 2007; read arrows are inferred from that structure. It does not import p-type patent biases, extra terminals or undisclosed current macro wiring.",
          "sourceIds": [
            "ip-sidense-cell-2007",
            "ip-sidense-irreversible-2017",
            "ip-lineage-sidense-2017",
            "ip-synopsys-otp-current",
            "ip-synopsys-advanced-otp"
          ]
        },
        {
          "id": "aeon",
          "unitId": "impinj-aeon",
          "title": "Impinj AEON → Virage Logic → Synopsys",
          "summary": "AEON is a logic-process floating-gate MTP family originating at Impinj. Virage Logic acquired the business, which subsequently entered Synopsys with Virage Logic and continued in named AEON MTP ULP products.",
          "events": [
            {
              "date": "2007-09-26",
              "title": "Impinj Announces Floating-Gate AEON/MTP",
              "body": "The company announcement names AEON/MTP and floating-gate transistors. Its specifications apply to that product announcement.",
              "sourceIds": [
                "aeon-impinj-2007"
              ]
            },
            {
              "date": "2008-06-26",
              "title": "Virage Logic Acquires Impinj Logic NVM IP Business",
              "body": "The SEC filing records completion of an asset purchase on this date; Impinj as a whole was not acquired.",
              "sourceIds": [
                "aeon-transfer-2008"
              ]
            },
            {
              "date": "2009-06-30",
              "title": "Virage Logic Documents AEON FN Program and Erase",
              "body": "NVM manager Craig Zajac identifies FN for both operations in a company-authored article. This defines the cell lesson scope.",
              "sourceIds": [
                "aeon-virage-fn-2009"
              ]
            },
            {
              "date": "2010-09-02",
              "title": "Synopsys Completes Its Virage Logic Acquisition",
              "body": "The completion announcement includes NVM in the added portfolio, bringing this succession chain into Synopsys.",
              "sourceIds": [
                "aeon-transfer-2010"
              ]
            },
            {
              "date": "2013-11-20",
              "title": "Synopsys Announces DesignWare AEON MTP ULP",
              "body": "The announcement explicitly uses AEON branding, supporting product-family continuity without asserting identical internal wiring.",
              "sourceIds": [
                "aeon-synopsys-2013"
              ]
            }
          ],
          "currentContext": "The 2013 official announcement explicitly uses DesignWare AEON MTP ULP branding. As checked on 2026-09-10, the current Synopsys MTP ULP page describes single-poly, floating-gate and zero-mask-adder positioning. That is a check date, not a launch date or evidence of unchanged wiring across generations.",
          "cellBoundary": "The named FN/FN basis is a 2009 article by a Virage Logic NVM manager. The diagrams use coupling, tunneling roles, FG and read MOS to explain electron entry and removal. Undisclosed device count, p/n polarity and pin arrangement remain unspecified.",
          "sourceIds": [
            "aeon-impinj-2007",
            "aeon-virage-fn-2009",
            "aeon-transfer-2008",
            "aeon-transfer-2010",
            "aeon-synopsys-2013",
            "aeon-synopsys-current"
          ]
        }
      ]
    }
  },
  "provenance": {
    "sourceFiles": [
      "NVM全景導論英文.json",
      "NVM電荷專題英文.json",
      "NVM新興專題英文.json",
      "NVM比較與系統英文.json",
      "NVM晶圓代工路線圖英文.json",
      "NVMIP單元導論英文.json",
      "NVM產研比較英文.json"
    ],
    "engineeringSources": [
      "NVM專利附圖.json",
      "../scripts/NVM電荷操作圖.mjs",
      "../scripts/NVM新興操作圖.mjs",
      "../scripts/NVM專利圖解.mjs",
      "../scripts/NVM力旺IP圖解.mjs",
      "../scripts/NVM新興IP圖解.mjs",
      "../scripts/NVMYMCIP圖解.mjs",
      "../scripts/NVMSynopsysOTP圖解.mjs",
      "../scripts/NVMImpinjIP圖解.mjs",
      "../scripts/NVM補充IP圖解.mjs"
    ],
    "reviewScope": "Public-source research and instructional review; shared source for future presentations"
  }
}